openwrt/target/linux/bcm63xx/patches-5.4/515-board-bcm6348.patch
Adrian Schmutzler c4ab1b7dd9 bcm63xx: reorganize board patches into fewer files
At the moment, bcm63xx creates one patch for each board to add to
board_bcm963xx.c. While this is not really helpful to get an overview
in the first place, it is particularly painful if you want to change
something for an early file and have to refresh all the later patches
accordingly.

Since it does not look like these board patches are upstreamed either,
this commit consolidates all board additions into one patch per "board".
By this, both adding and editing boards should become much simpler,
and we drop about 1300 lines of "code" from patches as well.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-10-26 23:48:08 +01:00

329 lines
7.1 KiB
Diff

--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1092,6 +1092,275 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
};
+
+static struct board_info __initdata board_96348A_122 = {
+ .name = "96348A-122",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_96348_D4PW = {
+ .name = "D-4P-W",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_96348gw_10_AR1004G = {
+ .name = "AR1004G",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_96348sv = {
+ .name = "MAGIC",
+ .expected_cpu_id = 0x6348,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ /* it has BP_ENET_EXTERNAL_PHY */
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+/* NetGear DG834G v4 */
+static struct board_info __initdata board_96348W3 = {
+ .name = "96348W3",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_CPVA502plus = {
+ .name = "CPVA502+",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .ephy_reset_gpio = 4,
+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_ct536_ct5621 = {
+ .name = "CT536_CT5621",
+ .expected_cpu_id = 0x6348,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_FAST2604 = {
+ .name = "F@ST2604",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_gw6000 = {
+ .name = "GW6000",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_gw6200 = {
+ .name = "GW6200",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct sprom_fixup __initdata spw500v_fixups[] = {
+ { .offset = 46, .value = 0x3046 },
+ { .offset = 47, .value = 0x15a7 },
+ { .offset = 48, .value = 0xfa89 },
+ { .offset = 49, .value = 0xfe79 },
+ { .offset = 57, .value = 0x6a49 },
+};
+
+static struct board_info __initdata board_spw500v = {
+ .name = "SPW500V",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = spw500v_fixups,
+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
+ },
+};
+
+/* BT Voyager 2110 */
+static struct board_info __initdata board_V2110 = {
+ .name = "V2110",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_V2500V_BB = {
+ .name = "V2500V_BB",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6348 */
/*
@@ -1248,6 +1517,19 @@ static const struct board_info __initcon
&board_DV201AMR,
&board_96348gw_a,
&board_rta1025w_16,
+ &board_96348A_122,
+ &board_96348_D4PW,
+ &board_96348gw_10_AR1004G,
+ &board_96348sv,
+ &board_96348W3,
+ &board_CPVA502plus,
+ &board_ct536_ct5621,
+ &board_FAST2604,
+ &board_gw6000,
+ &board_gw6200,
+ &board_spw500v,
+ &board_V2110,
+ &board_V2500V_BB,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1295,15 +1577,29 @@ static struct of_device_id const bcm963x
{ .compatible = "dynalink,rta770w", .data = &board_rta770w, },
#endif /* CONFIG_BCM63XX_CPU_6345 */
#ifdef CONFIG_BCM63XX_CPU_6348
+ { .compatible = "asmax,ar-1004g", .data = &board_96348gw_10_AR1004G, },
{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348r", .data = &board_96348r, },
{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
+ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
{ .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
{ .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "sagem,fast-2604", .data = &board_FAST2604, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ { .compatible = "telsey,cpva502plus", .data = &board_CPVA502plus, },
+ { .compatible = "telsey,magic", .data = &board_96348sv, },
{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
{ .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
#endif /* CONFIG_BCM63XX_CPU_6348 */