bcm63xx: reorganize board patches into fewer files

At the moment, bcm63xx creates one patch for each board to add to
board_bcm963xx.c. While this is not really helpful to get an overview
in the first place, it is particularly painful if you want to change
something for an early file and have to refresh all the later patches
accordingly.

Since it does not look like these board patches are upstreamed either,
this commit consolidates all board additions into one patch per "board".
By this, both adding and editing boards should become much simpler,
and we drop about 1300 lines of "code" from patches as well.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit is contained in:
Adrian Schmutzler 2020-10-04 18:00:28 +02:00
parent 8087499ac5
commit c4ab1b7dd9
75 changed files with 2730 additions and 4067 deletions

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@ -1,74 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -49,6 +49,53 @@ static struct board_info __initdata boar
#endif /* CONFIG_BCM63XX_CPU_3368 */
/*
+ * known 6318 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6318
+static struct board_info __initdata board_96318ref = {
+ .name = "96318REF",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_6318 */
+
+/*
* known 6328 boards
*/
#ifdef CONFIG_BCM63XX_CPU_6328
@@ -410,6 +457,9 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_3368
&board_cvg834g,
#endif /* CONFIG_BCM63XX_CPU_3368 */
+#ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
+#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
#endif /* CONFIG_BCM63XX_CPU_6328 */
@@ -444,6 +494,7 @@ static struct of_device_id const bcm963x
{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
#endif /* CONFIG_BCM63XX_CPU_3368 */
#ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },

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@ -1,15 +1,6 @@
From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Tue, 29 May 2012 10:52:25 +0200
Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
---
arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++
1 files changed, 77 insertions(+), 0 deletions(-)
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -321,6 +321,32 @@ static struct board_info __initdata boar
@@ -64,6 +64,32 @@ static struct board_info __initdata boar
.use_fullspeed = 0,
.port_no = 0,
},

View File

@ -1,6 +1,6 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1468,6 +1468,7 @@ static struct board_info __initdata boar
@@ -426,6 +426,7 @@ static struct board_info __initdata boar
},
.has_ohci0 = 1,

View File

@ -1,67 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -93,6 +93,48 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_96318ref_p300 = {
+ .name = "96318REF_P300",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6318 */
/*
@@ -459,6 +501,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_3368 */
#ifdef CONFIG_BCM63XX_CPU_6318
&board_96318ref,
+ &board_96318ref_p300,
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
@@ -495,6 +538,7 @@ static struct of_device_id const bcm963x
#endif /* CONFIG_BCM63XX_CPU_3368 */
#ifdef CONFIG_BCM63XX_CPU_6318
{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },

View File

@ -1,91 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -135,6 +135,72 @@ static struct board_info __initdata boar
},
},
};
+
+static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
+ { .offset = 96, .value = 0x2046 },
+ { .offset = 97, .value = 0xfe9d },
+ { .offset = 98, .value = 0x1854 },
+ { .offset = 99, .value = 0xfa59 },
+ { .offset = 112, .value = 0x2046 },
+ { .offset = 113, .value = 0xfe79 },
+ { .offset = 114, .value = 0x17f5 },
+ { .offset = 115, .value = 0xfa47 },
+ { .offset = 161, .value = 0x2222 },
+ { .offset = 162, .value = 0x2222 },
+ { .offset = 169, .value = 0x2222 },
+ { .offset = 170, .value = 0x2222 },
+ { .offset = 171, .value = 0x5555 },
+ { .offset = 172, .value = 0x5555 },
+ { .offset = 173, .value = 0x4444 },
+ { .offset = 174, .value = 0x4444 },
+ { .offset = 175, .value = 0x5555 },
+ { .offset = 176, .value = 0x5555 },
+};
+
+static struct board_info __initdata board_dsl_2751b_d1 = {
+ .name = "AW5200B",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = dsl2751b_e1_fixups,
+ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6318 */
/*
@@ -502,6 +568,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6318
&board_96318ref,
&board_96318ref_p300,
+ &board_dsl_2751b_d1,
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
@@ -539,6 +606,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6318
{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
{ .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },

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@ -1,68 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -201,6 +201,49 @@ static struct board_info __initdata boar
.num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
},
};
+
+static struct board_info __initdata board_FAST2704N = {
+ .name = "F@ST2704N",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6318 */
/*
@@ -569,6 +612,7 @@ static const struct board_info __initcon
&board_96318ref,
&board_96318ref_p300,
&board_dsl_2751b_d1,
+ &board_FAST2704N,
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
@@ -607,6 +651,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
{ .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
{ .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
+ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },

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@ -1,84 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -136,6 +136,65 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata ar5315u_fixups[] = {
+ { .offset = 6, .value = 0x1c00 },
+ { .offset = 65, .value = 0x1255 },
+ { .offset = 97, .value = 0xfe55 },
+ { .offset = 98, .value = 0x171d },
+ { .offset = 99, .value = 0xfa42 },
+ { .offset = 113, .value = 0xfeb7 },
+ { .offset = 114, .value = 0x18cd },
+ { .offset = 115, .value = 0xfa4f },
+ { .offset = 162, .value = 0x6444 },
+ { .offset = 170, .value = 0x6444 },
+ { .offset = 172, .value = 0x6444 },
+};
+
+static struct board_info __initdata board_AR5315u = {
+ .name = "96318A-1441N1",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN4",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ar5315u_fixups,
+ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups),
+ },
+};
+
static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
{ .offset = 96, .value = 0x2046 },
{ .offset = 97, .value = 0xfe9d },
@@ -611,6 +670,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6318
&board_96318ref,
&board_96318ref_p300,
+ &board_AR5315u,
&board_dsl_2751b_d1,
&board_FAST2704N,
#endif /* CONFIG_BCM63XX_CPU_6318 */
@@ -650,6 +710,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6318
{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
{ .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, },
{ .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
{ .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
#endif /* CONFIG_BCM63XX_CPU_6318 */

View File

@ -0,0 +1,292 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -49,6 +49,263 @@ static struct board_info __initdata boar
#endif /* CONFIG_BCM63XX_CPU_3368 */
/*
+ * known 6318 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6318
+static struct board_info __initdata board_96318ref = {
+ .name = "96318REF",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_96318ref_p300 = {
+ .name = "96318REF_P300",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
+
+static struct sprom_fixup __initdata ar5315u_fixups[] = {
+ { .offset = 6, .value = 0x1c00 },
+ { .offset = 65, .value = 0x1255 },
+ { .offset = 97, .value = 0xfe55 },
+ { .offset = 98, .value = 0x171d },
+ { .offset = 99, .value = 0xfa42 },
+ { .offset = 113, .value = 0xfeb7 },
+ { .offset = 114, .value = 0x18cd },
+ { .offset = 115, .value = 0xfa4f },
+ { .offset = 162, .value = 0x6444 },
+ { .offset = 170, .value = 0x6444 },
+ { .offset = 172, .value = 0x6444 },
+};
+
+static struct board_info __initdata board_AR5315u = {
+ .name = "96318A-1441N1",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN4",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ar5315u_fixups,
+ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups),
+ },
+};
+
+static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
+ { .offset = 96, .value = 0x2046 },
+ { .offset = 97, .value = 0xfe9d },
+ { .offset = 98, .value = 0x1854 },
+ { .offset = 99, .value = 0xfa59 },
+ { .offset = 112, .value = 0x2046 },
+ { .offset = 113, .value = 0xfe79 },
+ { .offset = 114, .value = 0x17f5 },
+ { .offset = 115, .value = 0xfa47 },
+ { .offset = 161, .value = 0x2222 },
+ { .offset = 162, .value = 0x2222 },
+ { .offset = 169, .value = 0x2222 },
+ { .offset = 170, .value = 0x2222 },
+ { .offset = 171, .value = 0x5555 },
+ { .offset = 172, .value = 0x5555 },
+ { .offset = 173, .value = 0x4444 },
+ { .offset = 174, .value = 0x4444 },
+ { .offset = 175, .value = 0x5555 },
+ { .offset = 176, .value = 0x5555 },
+};
+
+static struct board_info __initdata board_dsl_2751b_d1 = {
+ .name = "AW5200B",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = dsl2751b_e1_fixups,
+ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
+ },
+};
+
+static struct board_info __initdata board_FAST2704N = {
+ .name = "F@ST2704N",
+ .expected_cpu_id = 0x6318,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_6318 */
+
+/*
* known 6328 boards
*/
#ifdef CONFIG_BCM63XX_CPU_6328
@@ -437,6 +694,13 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_3368
&board_cvg834g,
#endif /* CONFIG_BCM63XX_CPU_3368 */
+#ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
+ &board_96318ref_p300,
+ &board_AR5315u,
+ &board_dsl_2751b_d1,
+ &board_FAST2704N,
+#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
#endif /* CONFIG_BCM63XX_CPU_6328 */
@@ -471,6 +735,11 @@ static struct of_device_id const bcm963x
{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
#endif /* CONFIG_BCM63XX_CPU_3368 */
#ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, },
+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
+ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },

View File

@ -0,0 +1,521 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -348,6 +348,482 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_963281TAN = {
+ .name = "963281TAN",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_A4001N = {
+ .name = "96328dg2x2",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+
+static struct board_info __initdata board_A4001N1 = {
+ .name = "963281T_TEF",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+
+static struct sprom_fixup __initdata ad1018_fixups[] = {
+ { .offset = 6, .value = 0x1c00 },
+ { .offset = 65, .value = 0x1256 },
+ { .offset = 96, .value = 0x2046 },
+ { .offset = 97, .value = 0xfe69 },
+ { .offset = 98, .value = 0x1726 },
+ { .offset = 99, .value = 0xfa5c },
+ { .offset = 112, .value = 0x2046 },
+ { .offset = 113, .value = 0xfea8 },
+ { .offset = 114, .value = 0x1978 },
+ { .offset = 115, .value = 0xfa26 },
+ { .offset = 161, .value = 0x2222 },
+ { .offset = 169, .value = 0x2222 },
+ { .offset = 171, .value = 0x2222 },
+ { .offset = 173, .value = 0x2222 },
+ { .offset = 174, .value = 0x4444 },
+ { .offset = 175, .value = 0x2222 },
+ { .offset = 176, .value = 0x4444 },
+};
+
+static struct board_info __initdata board_AD1018 = {
+ .name = "96328avngr",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "FIBRE",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ad1018_fixups,
+ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
+ },
+};
+
+static struct sprom_fixup __initdata ar5381u_fixups[] = {
+ { .offset = 97, .value = 0xfee5 },
+ { .offset = 98, .value = 0x157c },
+ { .offset = 99, .value = 0xfae7 },
+ { .offset = 113, .value = 0xfefa },
+ { .offset = 114, .value = 0x15d6 },
+ { .offset = 115, .value = 0xfaf8 },
+};
+
+static struct board_info __initdata board_AR5381u = {
+ .name = "96328A-1241N",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ar5381u_fixups,
+ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
+ },
+};
+
+static struct sprom_fixup __initdata ar5387un_fixups[] = {
+ { .offset = 2, .value = 0x05bb },
+ { .offset = 65, .value = 0x1204 },
+ { .offset = 78, .value = 0x0303 },
+ { .offset = 79, .value = 0x0202 },
+ { .offset = 80, .value = 0xff02 },
+ { .offset = 87, .value = 0x0315 },
+ { .offset = 88, .value = 0x0315 },
+ { .offset = 96, .value = 0x2048 },
+ { .offset = 97, .value = 0xff11 },
+ { .offset = 98, .value = 0x1567 },
+ { .offset = 99, .value = 0xfb24 },
+ { .offset = 100, .value = 0x3e3c },
+ { .offset = 101, .value = 0x4038 },
+ { .offset = 102, .value = 0xfe7f },
+ { .offset = 103, .value = 0x1279 },
+ { .offset = 112, .value = 0x2048 },
+ { .offset = 113, .value = 0xff03 },
+ { .offset = 114, .value = 0x154c },
+ { .offset = 115, .value = 0xfb27 },
+ { .offset = 116, .value = 0x3e3c },
+ { .offset = 117, .value = 0x4038 },
+ { .offset = 118, .value = 0xfe87 },
+ { .offset = 119, .value = 0x1233 },
+ { .offset = 203, .value = 0x2226 },
+};
+
+static struct board_info __initdata board_AR5387un = {
+ .name = "96328A-1441N1",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ar5387un_fixups,
+ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
+ },
+};
+
+static struct board_info __initdata board_dsl_274xb_f1 = {
+ .name = "AW4339U",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_ATHEROS,
+ .caldata_offset = 0x7d1000,
+ .slot = 0,
+ .led_pin = -1,
+ .led_active_high = 1,
+ },
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 4",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 1",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_FAST2704V2 = {
+ .name = "F@ST2704V2",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .has_usbd = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_PDG_A4001N_A_000_1A1_AX = {
+ .name = "96328avng",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+
+static struct board_info __initdata board_R5010UNV2 = {
+ .name = "96328ang",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6328 */
/*
@@ -703,6 +1179,16 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
+ &board_963281TAN,
+ &board_A4001N,
+ &board_A4001N1,
+ &board_AD1018,
+ &board_AR5381u,
+ &board_AR5387un,
+ &board_dsl_274xb_f1,
+ &board_FAST2704V2,
+ &board_PDG_A4001N_A_000_1A1_AX,
+ &board_R5010UNV2,
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
&board_96338gw,
@@ -742,7 +1228,18 @@ static struct of_device_id const bcm963x
{ .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "adb,pdg-a4001n-a-000-1a1-ax", .data = &board_PDG_A4001N_A_000_1A1_AX, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
+ { .compatible = "sercomm,ad1018", .data = &board_AD1018, },
+ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },

View File

@ -1,6 +1,6 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -858,6 +858,19 @@ static struct board_info __initdata boar
@@ -857,6 +857,32 @@ static struct board_info __initdata boar
.force_duplex_full = 1,
},
};
@ -16,23 +16,38 @@
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_rta1320_16m = {
+ .name = "RTA1320_16M",
+ .expected_cpu_id = 0x6338,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6338 */
/*
@@ -1193,6 +1206,7 @@ static const struct board_info __initcon
@@ -1193,6 +1219,8 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6338
&board_96338gw,
&board_96338w,
+ &board_96338w2_e7t,
+ &board_rta1320_16m,
#endif /* CONFIG_BCM63XX_CPU_6338 */
#ifdef CONFIG_BCM63XX_CPU_6345
&board_96345gw2,
@@ -1244,6 +1258,7 @@ static struct of_device_id const bcm963x
@@ -1244,6 +1272,8 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6338
{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
+ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
#endif /* CONFIG_BCM63XX_CPU_6338 */
#ifdef CONFIG_BCM63XX_CPU_6345
{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },

View File

@ -1,6 +1,6 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -894,6 +894,19 @@ static struct board_info __initdata boar
@@ -893,6 +893,19 @@ static struct board_info __initdata boar
.name = "96345GW2",
.expected_cpu_id = 0x6345,
};

View File

@ -0,0 +1,328 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1092,6 +1092,275 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
};
+
+static struct board_info __initdata board_96348A_122 = {
+ .name = "96348A-122",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_96348_D4PW = {
+ .name = "D-4P-W",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_96348gw_10_AR1004G = {
+ .name = "AR1004G",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_96348sv = {
+ .name = "MAGIC",
+ .expected_cpu_id = 0x6348,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ /* it has BP_ENET_EXTERNAL_PHY */
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+/* NetGear DG834G v4 */
+static struct board_info __initdata board_96348W3 = {
+ .name = "96348W3",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_CPVA502plus = {
+ .name = "CPVA502+",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .ephy_reset_gpio = 4,
+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_ct536_ct5621 = {
+ .name = "CT536_CT5621",
+ .expected_cpu_id = 0x6348,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_FAST2604 = {
+ .name = "F@ST2604",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_gw6000 = {
+ .name = "GW6000",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_gw6200 = {
+ .name = "GW6200",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct sprom_fixup __initdata spw500v_fixups[] = {
+ { .offset = 46, .value = 0x3046 },
+ { .offset = 47, .value = 0x15a7 },
+ { .offset = 48, .value = 0xfa89 },
+ { .offset = 49, .value = 0xfe79 },
+ { .offset = 57, .value = 0x6a49 },
+};
+
+static struct board_info __initdata board_spw500v = {
+ .name = "SPW500V",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = spw500v_fixups,
+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
+ },
+};
+
+/* BT Voyager 2110 */
+static struct board_info __initdata board_V2110 = {
+ .name = "V2110",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_V2500V_BB = {
+ .name = "V2500V_BB",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6348 */
/*
@@ -1248,6 +1517,19 @@ static const struct board_info __initcon
&board_DV201AMR,
&board_96348gw_a,
&board_rta1025w_16,
+ &board_96348A_122,
+ &board_96348_D4PW,
+ &board_96348gw_10_AR1004G,
+ &board_96348sv,
+ &board_96348W3,
+ &board_CPVA502plus,
+ &board_ct536_ct5621,
+ &board_FAST2604,
+ &board_gw6000,
+ &board_gw6200,
+ &board_spw500v,
+ &board_V2110,
+ &board_V2500V_BB,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1295,15 +1577,29 @@ static struct of_device_id const bcm963x
{ .compatible = "dynalink,rta770w", .data = &board_rta770w, },
#endif /* CONFIG_BCM63XX_CPU_6345 */
#ifdef CONFIG_BCM63XX_CPU_6348
+ { .compatible = "asmax,ar-1004g", .data = &board_96348gw_10_AR1004G, },
{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348r", .data = &board_96348r, },
{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
+ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
{ .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
{ .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "sagem,fast-2604", .data = &board_FAST2604, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ { .compatible = "telsey,cpva502plus", .data = &board_CPVA502plus, },
+ { .compatible = "telsey,magic", .data = &board_96348sv, },
{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
{ .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
#endif /* CONFIG_BCM63XX_CPU_6348 */

View File

@ -0,0 +1,384 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -12,6 +12,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
+#include <linux/pci_ids.h>
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
@@ -1445,6 +1446,88 @@ static struct board_info __initdata boar
.has_ehci0 = 1,
};
+static struct board_info __initdata board_CPVA642 = {
+ .name = "CPVA642",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_ct6373_1 = {
+ .name = "CT6373-1",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+/* D-Link DSL-274xB revison C2/C3 */
+static struct board_info __initdata board_dsl_274xb_rev_c = {
+ .name = "AW4139",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+/* D-Link DVA-G3810BN/TL */
+static struct board_info __initdata board_DVAG3810BN = {
+ .name = "DVAG3810BN",
+ .expected_cpu_id = 0x6358,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
static struct board_info __initdata board_DWVS0 = {
.name = "DWV-S0",
.expected_cpu_id = 0x6358,
@@ -1469,6 +1552,238 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
.has_ehci0 = 1,
};
+
+static struct board_info __initdata board_homehub2a = {
+ .name = "HOMEHUB2A",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4322,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_HW520 = {
+ .name = "HW6358GW_B",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_HW553 = {
+ .name = "HW553",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_HW556_A = {
+ .name = "HW556_A",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_ATHEROS,
+ .caldata_offset = 0xf7e000,
+ .slot = 1,
+ .endian_check = 1,
+ .led_pin = 2,
+ .led_active_high = 1,
+ },
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_HW556_B = {
+ .name = "HW556_B",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_ATHEROS,
+ .caldata_offset = 0xefe000,
+ .slot = 1,
+ .endian_check = 1,
+ .led_pin = 2,
+ .led_active_high = 1,
+ },
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_HW556_C = {
+ .name = "HW556_C",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_RALINK,
+ .caldata_offset = 0xeffe00,
+ .slot = 1,
+ .eeprom = "rt2x00.eeprom",
+ },
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_nb4_ser_r0 = {
+ .name = "NB4-SER-r0",
+ .expected_cpu_id = 0x6358,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_nb4_fxc_r1 = {
+ .name = "NB4-FXC-r1",
+ .expected_cpu_id = 0x6358,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+ /* T-Home Speedport W 303V Typ B */
+static struct board_info __initdata board_spw303v = {
+ .name = "96358-502V",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6358 */
/*
@@ -1535,7 +1850,20 @@ static const struct board_info __initcon
&board_96358vw,
&board_96358vw2,
&board_AGPFS0,
+ &board_CPVA642,
+ &board_ct6373_1,
+ &board_dsl_274xb_rev_c,
+ &board_DVAG3810BN,
&board_DWVS0,
+ &board_homehub2a,
+ &board_HW520,
+ &board_HW553,
+ &board_HW556_A,
+ &board_HW556_B,
+ &board_HW556_C,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ &board_spw303v,
#endif /* CONFIG_BCM63XX_CPU_6358 */
};
@@ -1607,11 +1935,24 @@ static struct of_device_id const bcm963x
{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
+ { .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
+ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
+ { .compatible = "huawei,echolife-hg520v", .data = &board_HW520, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
+ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
+ { .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, },
{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
#endif /* CONFIG_BCM63XX_CPU_6362 */

View File

@ -0,0 +1,144 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1786,6 +1786,117 @@ static struct board_info __initdata boar
};
#endif /* CONFIG_BCM63XX_CPU_6358 */
+#ifdef CONFIG_BCM63XX_CPU_6362
+static struct board_info __initdata board_dgnd3700v2 = {
+ .name = "96362ADVN2xh",
+ .expected_cpu_id = 0x6362,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_fast2504n = {
+ .name = "F@ST2504n",
+ .expected_cpu_id = 0x6362,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_hg253s_v2 = {
+ .name = "hg253s",
+ .expected_cpu_id = 0x6362,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .timing_sel = 1,
+ .name = "RGMII",
+ },
+
+ [5] = {
+ .used = 1,
+ .phy_id = 24,
+ .timing_sel = 1,
+ .name = "WAN",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_nb6 = {
+ .name = "NB6",
+ .expected_cpu_id = 0x6362,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_6362 */
+
/*
* all boards
*/
@@ -1865,6 +1976,12 @@ static const struct board_info __initcon
&board_nb4_fxc_r1,
&board_spw303v,
#endif /* CONFIG_BCM63XX_CPU_6358 */
+#ifdef CONFIG_BCM63XX_CPU_6362
+ &board_dgnd3700v2,
+ &board_fast2504n,
+ &board_hg253s_v2,
+ &board_nb6,
+#endif /* CONFIG_BCM63XX_CPU_6362 */
};
static struct of_device_id const bcm963xx_boards_dt[] = {
@@ -1955,6 +2072,10 @@ static struct of_device_id const bcm963x
{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
+ { .compatible = "huawei,hg253s-v2", .data = &board_hg253s_v2, },
+ { .compatible = "netgear,dgnd3700-v2", .data = &board_dgnd3700v2, },
+ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
#endif /* CONFIG_BCM63XX_CPU_6368 */

View File

@ -0,0 +1,732 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -13,6 +13,8 @@
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/pci_ids.h>
+#include <linux/platform_data/b53.h>
+#include <linux/spi/spi.h>
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
@@ -1898,6 +1900,648 @@ static struct board_info __initdata boar
#endif /* CONFIG_BCM63XX_CPU_6362 */
/*
+ * known 6368 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6368
+static struct board_info __initdata board_96368mvngr = {
+ .name = "96368MVNgr",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_96368mvwg = {
+ .name = "96368MVWG",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port1",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port2",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 0x12,
+ .name = "port0",
+ },
+ [5] = {
+ .used = 1,
+ .phy_id = 0x11,
+ .name = "port3",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_AV4202N = {
+ .name = "96368_Swiss_S1",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4322,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_DGND3700v1_3800B = {
+ .name = "DGND3700v1_3800B",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [5] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
+static struct sprom_fixup __initdata EVG2000_fixups[] = {
+ { .offset = 219, .value = 0xec08 },
+};
+
+static struct board_info __initdata board_EVG2000 = {
+ .name = "96369PVG",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [5] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4322,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = EVG2000_fixups,
+ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
+ },
+};
+
+static struct board_info __initdata board_HG622 = {
+ .name = "96368MVWG_hg622",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_RALINK,
+ .caldata_offset = 0xfa0000,
+ .slot = 1,
+ .eeprom = "rt2x00.eeprom",
+ },
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_HG655b = {
+ .name = "HW65x",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_RALINK,
+ .caldata_offset = 0x7c0000,
+ .slot = 1,
+ .eeprom = "rt2x00.eeprom",
+ },
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_P870HW51A_V2 = {
+ .name = "P870HW-51a_v2",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
+static struct board_info __initdata board_R1000H = {
+ .name = "R1000H",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [5] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
+static struct sprom_fixup __initdata vh4032n_fixups[] = {
+ { .offset = 2, .value = 0x04d2 },
+ { .offset = 4, .value = 0x4350 },
+ { .offset = 65, .value = 0x1300 },
+ { .offset = 68, .value = 0x0402 },
+ { .offset = 70, .value = 0x0090 },
+ { .offset = 71, .value = 0x4c19 },
+ { .offset = 72, .value = 0x2345 },
+ { .offset = 87, .value = 0x0315 },
+ { .offset = 88, .value = 0x0315 },
+ { .offset = 96, .value = 0x2048 },
+ { .offset = 97, .value = 0xfed7 },
+ { .offset = 98, .value = 0x15a6 },
+ { .offset = 99, .value = 0xfaee },
+ { .offset = 100, .value = 0x3e3a },
+ { .offset = 101, .value = 0x3a36 },
+ { .offset = 102, .value = 0xff7f },
+ { .offset = 103, .value = 0x11b9 },
+ { .offset = 104, .value = 0xfc53 },
+ { .offset = 105, .value = 0xffe6 },
+ { .offset = 106, .value = 0xfdd2 },
+ { .offset = 107, .value = 0xfe49 },
+ { .offset = 108, .value = 0xff6a },
+ { .offset = 109, .value = 0x136e },
+ { .offset = 110, .value = 0xfbed },
+ { .offset = 111, .value = 0x0000 },
+ { .offset = 112, .value = 0x2048 },
+ { .offset = 113, .value = 0xfee2 },
+ { .offset = 114, .value = 0x15e5 },
+ { .offset = 115, .value = 0xfaed },
+ { .offset = 116, .value = 0x3e3a },
+ { .offset = 117, .value = 0x3a36 },
+ { .offset = 118, .value = 0xffc8 },
+ { .offset = 119, .value = 0x12b8 },
+ { .offset = 120, .value = 0xfca1 },
+ { .offset = 121, .value = 0xff9b },
+ { .offset = 122, .value = 0x122a },
+ { .offset = 123, .value = 0xfcc8 },
+ { .offset = 124, .value = 0xff95 },
+ { .offset = 125, .value = 0x146b },
+ { .offset = 126, .value = 0xfbba },
+ { .offset = 127, .value = 0x0000 },
+ { .offset = 161, .value = 0x0000 },
+ { .offset = 162, .value = 0x0000 },
+ { .offset = 169, .value = 0x0000 },
+ { .offset = 170, .value = 0x0000 },
+ { .offset = 171, .value = 0x0000 },
+ { .offset = 172, .value = 0x0000 },
+ { .offset = 173, .value = 0x0000 },
+ { .offset = 174, .value = 0x0000 },
+ { .offset = 175, .value = 0x0000 },
+ { .offset = 176, .value = 0x0000 },
+ { .offset = 219, .value = 0x1108 },
+};
+
+static struct board_info __initdata board_VH4032N = {
+ .name = "VH4032N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN4",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vh4032n_fixups,
+ .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
+ },
+};
+
+static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+ { .offset = 99, .value = 0xfab0 },
+ { .offset = 113, .value = 0xfed1 },
+ { .offset = 114, .value = 0x1609 },
+ { .offset = 115, .value = 0xfad9 },
+};
+
+static struct board_info __initdata board_VR3025u = {
+ .name = "96368M-1541N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vr3025u_fixups,
+ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
+ },
+};
+
+static struct sprom_fixup __initdata vr3025un_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+ { .offset = 99, .value = 0xfab0 },
+ { .offset = 113, .value = 0xfed1 },
+ { .offset = 114, .value = 0x1609 },
+ { .offset = 115, .value = 0xfad9 },
+};
+
+static struct board_info __initdata board_VR3025un = {
+ .name = "96368M-1341N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vr3025un_fixups,
+ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
+ },
+};
+
+static struct sprom_fixup __initdata vr3026e_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+ { .offset = 99, .value = 0xfab0 },
+ { .offset = 113, .value = 0xfed1 },
+ { .offset = 114, .value = 0x1609 },
+ { .offset = 115, .value = 0xfad9 },
+};
+
+static struct board_info __initdata board_VR3026e = {
+ .name = "96368MT-1341N1",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vr3026e_fixups,
+ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
+ },
+};
+
+static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+ { .offset = 99, .value = 0xfb0d },
+ { .offset = 113, .value = 0xfef7 },
+ { .offset = 114, .value = 0x15f7 },
+ { .offset = 115, .value = 0xfb1a },
+};
+
+static struct board_info __initdata board_WAP5813n = {
+ .name = "96369R-1231N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = wap5813n_fixups,
+ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_6368 */
+
+/*
* all boards
*/
static const struct board_info __initconst *bcm963xx_boards[] = {
@@ -1982,6 +2626,22 @@ static const struct board_info __initcon
&board_hg253s_v2,
&board_nb6,
#endif /* CONFIG_BCM63XX_CPU_6362 */
+#ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvngr,
+ &board_96368mvwg,
+ &board_AV4202N,
+ &board_DGND3700v1_3800B,
+ &board_EVG2000,
+ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
+ &board_R1000H,
+ &board_VH4032N,
+ &board_VR3025u,
+ &board_VR3025un,
+ &board_VR3026e,
+ &board_WAP5813n,
+#endif /* CONFIG_BCM63XX_CPU_6368 */
};
static struct of_device_id const bcm963xx_boards_dt[] = {
@@ -2078,6 +2738,20 @@ static struct of_device_id const bcm963x
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
+ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
+ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
#endif /* CONFIG_BCM63XX_CPU_63268 */
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -81,12 +81,25 @@ void __init board_early_setup(const stru
bcm63xx_pci_enabled = 1;
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G2_PCI;
+
+ if (BCMCPU_IS_6368())
+ val |= GPIO_MODE_6368_PCI_REQ1 |
+ GPIO_MODE_6368_PCI_GNT1 |
+ GPIO_MODE_6368_PCI_INTB |
+ GPIO_MODE_6368_PCI_REQ0 |
+ GPIO_MODE_6368_PCI_GNT0;
}
#endif
if (board.has_pccard) {
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G1_MII_PCCARD;
+
+ if (BCMCPU_IS_6368())
+ val |= GPIO_MODE_6368_PCMCIA_CD1 |
+ GPIO_MODE_6368_PCMCIA_CD2 |
+ GPIO_MODE_6368_PCMCIA_VS1 |
+ GPIO_MODE_6368_PCMCIA_VS2;
}
if (board.has_enet0 && !board.enet0.use_internal_phy) {

View File

@ -0,0 +1,307 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2542,6 +2542,273 @@ static struct board_info __initdata boar
#endif /* CONFIG_BCM63XX_CPU_6368 */
/*
+ * known 63268/63269 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_63268
+static struct board_info __initdata board_963268bu_p300 = {
+ .name = "963268BU_P300",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 17,
+ .name = "FE1",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "GbE2",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 0,
+ .name = "GbE3",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ [5] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "GbE1",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ [6] = {
+ .used = 1,
+ .phy_id = 24,
+ .name = "GbE4",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ [7] = {
+ .used = 1,
+ .phy_id = 25,
+ .name = "GbE5",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_963269bhr = {
+ .name = "963269BHR",
+ .expected_cpu_id = 0x63268,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_BSKYB_63168 = {
+ .name = "BSKYB_63168",
+ .expected_cpu_id = 0x63268,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_H500s = {
+ .name = "BXK00C-1.6",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [3] = {
+ .used = 1,
+ .phy_id = 12,
+ .name = "WAN",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 0,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .mii_override = 1,
+ .timing_sel = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_VG8050 = {
+ .name = "963169P-1861N5",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [6] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .mii_override = 1,
+ .timing_sel = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_VR3032u = {
+ .name = "963168M-1841N1",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN2",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN4",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+};
+
+static struct board_info __initdata board_vw6339gu = {
+ .name = "VW6339GU",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN2",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN4",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 7,
+ .name = "WAN",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ },
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_63268 */
+
+/*
* all boards
*/
static const struct board_info __initconst *bcm963xx_boards[] = {
@@ -2642,6 +2909,15 @@ static const struct board_info __initcon
&board_VR3026e,
&board_WAP5813n,
#endif /* CONFIG_BCM63XX_CPU_6368 */
+#ifdef CONFIG_BCM63XX_CPU_63268
+ &board_963268bu_p300,
+ &board_963269bhr,
+ &board_BSKYB_63168,
+ &board_H500s,
+ &board_VG8050,
+ &board_VR3032u,
+ &board_vw6339gu,
+#endif /* CONFIG_BCM63XX_CPU_63268 */
};
static struct of_device_id const bcm963xx_boards_dt[] = {
@@ -2754,6 +3030,14 @@ static struct of_device_id const bcm963x
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "comtrend,vg-8050", .data = &board_VG8050, },
+ { .compatible = "comtrend,vr-3032u", .data = &board_VR3032u, },
+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ { .compatible = "sercomm,h500-s-lowi", .data = &board_H500s, },
+ { .compatible = "sercomm,h500-s-vfes", .data = &board_H500s, },
+ { .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
#endif /* CONFIG_BCM63XX_CPU_63268 */
#endif /* CONFIG_OF */
{ },

View File

@ -1,67 +0,0 @@
From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Tue, 29 May 2012 11:01:12 +0200
Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
---
arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++
1 files changed, 71 insertions(+), 0 deletions(-)
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -348,6 +348,39 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_963281TAN = {
+ .name = "963281TAN",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6328 */
/*
@@ -702,6 +735,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
+ &board_963281TAN,
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
&board_96338gw,
@@ -741,6 +775,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338

View File

@ -1,79 +0,0 @@
From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Mon, 30 Apr 2012 09:10:51 +0200
Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
DSL-274xB rev F1
---
arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++
1 files changed, 104 insertions(+), 0 deletions(-)
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -381,6 +381,50 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_dsl_274xb_f1 = {
+ .name = "AW4339U",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_ATHEROS,
+ .caldata_offset = 0x7d1000,
+ .slot = 0,
+ .led_pin = -1,
+ .led_active_high = 1,
+ },
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 4",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 1",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6328 */
/*
@@ -736,6 +780,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
&board_963281TAN,
+ &board_dsl_274xb_f1,
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
&board_96338gw,
@@ -777,6 +822,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6328
{ .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },

View File

@ -1,68 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -382,6 +382,49 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_A4001N1 = {
+ .name = "963281T_TEF",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+
static struct board_info __initdata board_dsl_274xb_f1 = {
.name = "AW4339U",
.expected_cpu_id = 0x6328,
@@ -780,6 +823,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
&board_963281TAN,
+ &board_A4001N1,
&board_dsl_274xb_f1,
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
@@ -820,6 +864,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
{ .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
{ .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },

View File

@ -1,97 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -349,6 +349,78 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata ar5387un_fixups[] = {
+ { .offset = 2, .value = 0x05bb },
+ { .offset = 65, .value = 0x1204 },
+ { .offset = 78, .value = 0x0303 },
+ { .offset = 79, .value = 0x0202 },
+ { .offset = 80, .value = 0xff02 },
+ { .offset = 87, .value = 0x0315 },
+ { .offset = 88, .value = 0x0315 },
+ { .offset = 96, .value = 0x2048 },
+ { .offset = 97, .value = 0xff11 },
+ { .offset = 98, .value = 0x1567 },
+ { .offset = 99, .value = 0xfb24 },
+ { .offset = 100, .value = 0x3e3c },
+ { .offset = 101, .value = 0x4038 },
+ { .offset = 102, .value = 0xfe7f },
+ { .offset = 103, .value = 0x1279 },
+ { .offset = 112, .value = 0x2048 },
+ { .offset = 113, .value = 0xff03 },
+ { .offset = 114, .value = 0x154c },
+ { .offset = 115, .value = 0xfb27 },
+ { .offset = 116, .value = 0x3e3c },
+ { .offset = 117, .value = 0x4038 },
+ { .offset = 118, .value = 0xfe87 },
+ { .offset = 119, .value = 0x1233 },
+ { .offset = 203, .value = 0x2226 },
+};
+
+static struct board_info __initdata board_AR5387un = {
+ .name = "96328A-1441N1",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ar5387un_fixups,
+ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
+ },
+};
+
static struct board_info __initdata board_963281TAN = {
.name = "963281TAN",
.expected_cpu_id = 0x6328,
@@ -822,6 +894,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
+ &board_AR5387un,
&board_963281TAN,
&board_A4001N1,
&board_dsl_274xb_f1,
@@ -867,6 +940,7 @@ static struct of_device_id const bcm963x
{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
{ .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
{ .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338

View File

@ -1,79 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -349,6 +349,60 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata ar5381u_fixups[] = {
+ { .offset = 97, .value = 0xfee5 },
+ { .offset = 98, .value = 0x157c },
+ { .offset = 99, .value = 0xfae7 },
+ { .offset = 113, .value = 0xfefa },
+ { .offset = 114, .value = 0x15d6 },
+ { .offset = 115, .value = 0xfaf8 },
+};
+
+static struct board_info __initdata board_AR5381u = {
+ .name = "96328A-1241N",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ar5381u_fixups,
+ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
+ },
+};
+
static struct sprom_fixup __initdata ar5387un_fixups[] = {
{ .offset = 2, .value = 0x05bb },
{ .offset = 65, .value = 0x1204 },
@@ -894,6 +948,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
+ &board_AR5381u,
&board_AR5387un,
&board_963281TAN,
&board_A4001N1,
@@ -940,6 +995,7 @@ static struct of_device_id const bcm963x
{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
{ .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
{ .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
#endif /* CONFIG_BCM63XX_CPU_6328 */

View File

@ -1,73 +0,0 @@
From: Marcin Jurkowski <marcin1j@gmail.com>
Date: Thu, 31 Oct 2013 22:33:10 +0000
Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
router
This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
router.
It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
modem equipped with 64 MiB RAM and 8 MiB flash.
Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
---
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -594,6 +594,42 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_FAST2704V2 = {
+ .name = "F@ST2704V2",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .has_usbd = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6328 */
/*
@@ -953,6 +989,7 @@ static const struct board_info __initcon
&board_963281TAN,
&board_A4001N1,
&board_dsl_274xb_f1,
+ &board_FAST2704V2,
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
&board_96338gw,
@@ -998,6 +1035,7 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
{ .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },

View File

@ -1,68 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -508,6 +508,49 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_A4001N = {
+ .name = "96328dg2x2",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+
static struct board_info __initdata board_A4001N1 = {
.name = "963281T_TEF",
.expected_cpu_id = 0x6328,
@@ -987,6 +1030,7 @@ static const struct board_info __initcon
&board_AR5381u,
&board_AR5387un,
&board_963281TAN,
+ &board_A4001N,
&board_A4001N1,
&board_dsl_274xb_f1,
&board_FAST2704V2,
@@ -1029,6 +1073,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
{ .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },

View File

@ -1,69 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -673,6 +673,50 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_R5010UNV2 = {
+ .name = "96328ang",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+
#endif /* CONFIG_BCM63XX_CPU_6328 */
/*
@@ -1034,6 +1078,7 @@ static const struct board_info __initcon
&board_A4001N1,
&board_dsl_274xb_f1,
&board_FAST2704V2,
+ &board_R5010UNV2,
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
&board_96338gw,
@@ -1080,6 +1125,7 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
{ .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
{ .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338

View File

@ -1,91 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -349,6 +349,71 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata ad1018_fixups[] = {
+ { .offset = 6, .value = 0x1c00 },
+ { .offset = 65, .value = 0x1256 },
+ { .offset = 96, .value = 0x2046 },
+ { .offset = 97, .value = 0xfe69 },
+ { .offset = 98, .value = 0x1726 },
+ { .offset = 99, .value = 0xfa5c },
+ { .offset = 112, .value = 0x2046 },
+ { .offset = 113, .value = 0xfea8 },
+ { .offset = 114, .value = 0x1978 },
+ { .offset = 115, .value = 0xfa26 },
+ { .offset = 161, .value = 0x2222 },
+ { .offset = 169, .value = 0x2222 },
+ { .offset = 171, .value = 0x2222 },
+ { .offset = 173, .value = 0x2222 },
+ { .offset = 174, .value = 0x4444 },
+ { .offset = 175, .value = 0x2222 },
+ { .offset = 176, .value = 0x4444 },
+};
+
+static struct board_info __initdata board_AD1018 = {
+ .name = "96328avngr",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "FIBRE",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43217,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ .board_fixups = ad1018_fixups,
+ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
+ },
+};
+
static struct sprom_fixup __initdata ar5381u_fixups[] = {
{ .offset = 97, .value = 0xfee5 },
{ .offset = 98, .value = 0x157c },
@@ -1071,6 +1136,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6318 */
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
+ &board_AD1018,
&board_AR5381u,
&board_AR5387un,
&board_963281TAN,
@@ -1127,6 +1193,8 @@ static struct of_device_id const bcm963x
{ .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
{ .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
{ .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
+ { .compatible = "sercomm,ad1018", .data = &board_AD1018, },
+ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
#endif /* CONFIG_BCM63XX_CPU_6328 */
#ifdef CONFIG_BCM63XX_CPU_6338
{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },

View File

@ -1,68 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -616,6 +616,49 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_PDG_A4001N_A_000_1A1_AX = {
+ .name = "96328avng",
+ .expected_cpu_id = 0x6328,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43225,
+ .pci_bus = 1,
+ .pci_dev = 0,
+ },
+};
+
static struct board_info __initdata board_A4001N1 = {
.name = "963281T_TEF",
.expected_cpu_id = 0x6328,
@@ -1141,6 +1184,7 @@ static const struct board_info __initcon
&board_AR5387un,
&board_963281TAN,
&board_A4001N,
+ &board_PDG_A4001N_A_000_1A1_AX,
&board_A4001N1,
&board_dsl_274xb_f1,
&board_FAST2704V2,
@@ -1186,6 +1230,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6328
{ .compatible = "adb,a4001n", .data = &board_A4001N, },
{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "adb,pdg-a4001n-a-000-1a1-ax", .data = &board_PDG_A4001N_A_000_1A1_AX, },
{ .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
{ .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },

View File

@ -1,50 +1,6 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1202,6 +1202,27 @@ static struct board_info __initdata boar
.force_duplex_full = 1,
},
};
+
+static struct board_info __initdata board_V2500V_BB = {
+ .name = "V2500V_BB",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6348 */
/*
@@ -1362,6 +1383,7 @@ static const struct board_info __initcon
&board_96348_D4PW,
&board_spw500v,
&board_96348sv,
+ &board_V2500V_BB,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1414,6 +1436,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
@@ -1469,6 +1492,22 @@ void __init board_bcm963xx_init(void)
@@ -3066,6 +3066,22 @@ void __init board_bcm963xx_init(void)
val &= MPI_CSBASE_BASE_MASK;
}
boot_addr = (u8 *)KSEG1ADDR(val);

View File

@ -1,38 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -871,6 +871,19 @@ static struct board_info __initdata boar
.force_duplex_full = 1,
},
};
+
+static struct board_info __initdata board_rta1320_16m = {
+ .name = "RTA1320_16M",
+ .expected_cpu_id = 0x6338,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6338 */
/*
@@ -1207,6 +1220,7 @@ static const struct board_info __initcon
&board_96338gw,
&board_96338w,
&board_96338w2_e7t,
+ &board_rta1320_16m,
#endif /* CONFIG_BCM63XX_CPU_6338 */
#ifdef CONFIG_BCM63XX_CPU_6345
&board_96345gw2,
@@ -1258,6 +1272,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6338
{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
+ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
{ .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
#endif /* CONFIG_BCM63XX_CPU_6338 */
#ifdef CONFIG_BCM63XX_CPU_6345

View File

@ -1,40 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1093,6 +1093,21 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
};
+
+static struct board_info __initdata board_96348_D4PW = {
+ .name = "D-4P-W",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6348 */
/*
@@ -1248,6 +1263,7 @@ static const struct board_info __initcon
&board_DV201AMR,
&board_96348gw_a,
&board_rta1025w_16,
+ &board_96348_D4PW,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1300,6 +1316,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
{ .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },

View File

@ -1,55 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1108,6 +1108,36 @@ static struct board_info __initdata boar
.force_duplex_full = 1,
},
};
+
+static struct sprom_fixup __initdata spw500v_fixups[] = {
+ { .offset = 46, .value = 0x3046 },
+ { .offset = 47, .value = 0x15a7 },
+ { .offset = 48, .value = 0xfa89 },
+ { .offset = 49, .value = 0xfe79 },
+ { .offset = 57, .value = 0x6a49 },
+};
+
+static struct board_info __initdata board_spw500v = {
+ .name = "SPW500V",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = spw500v_fixups,
+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6348 */
/*
@@ -1264,6 +1294,7 @@ static const struct board_info __initcon
&board_96348gw_a,
&board_rta1025w_16,
&board_96348_D4PW,
+ &board_spw500v,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1321,6 +1352,7 @@ static struct of_device_id const bcm963x
{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
{ .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
{ .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
{ .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
#endif /* CONFIG_BCM63XX_CPU_6348 */

View File

@ -1,67 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1002,6 +1002,46 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
};
+static struct board_info __initdata board_gw6200 = {
+ .name = "GW6200",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_gw6000 = {
+ .name = "GW6000",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
static struct board_info __initdata board_FAST2404 = {
.name = "F@ST2404",
.expected_cpu_id = 0x6348,
@@ -1287,6 +1327,8 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6348
&board_96348r,
&board_96348gw,
+ &board_gw6000,
+ &board_gw6200,
&board_96348gw_10,
&board_96348gw_11,
&board_FAST2404,
@@ -1353,6 +1395,8 @@ static struct of_device_id const bcm963x
{ .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
{ .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
{ .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
{ .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
#endif /* CONFIG_BCM63XX_CPU_6348 */

View File

@ -1,49 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1178,6 +1178,30 @@ static struct board_info __initdata boar
.num_board_fixups = ARRAY_SIZE(spw500v_fixups),
},
};
+
+static struct board_info __initdata board_96348sv = {
+ .name = "MAGIC",
+ .expected_cpu_id = 0x6348,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ /* it has BP_ENET_EXTERNAL_PHY */
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6348 */
/*
@@ -1337,6 +1361,7 @@ static const struct board_info __initcon
&board_rta1025w_16,
&board_96348_D4PW,
&board_spw500v,
+ &board_96348sv,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1397,6 +1422,7 @@ static struct of_device_id const bcm963x
{ .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ { .compatible = "telsey,magic", .data = &board_96348sv, },
{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
{ .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
#endif /* CONFIG_BCM63XX_CPU_6348 */

View File

@ -1,41 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -979,6 +979,22 @@ static struct board_info __initdata boar
.has_ehci0 = 1,
};
+/* BT Voyager 2110 */
+static struct board_info __initdata board_V2110 = {
+ .name = "V2110",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
@@ -1384,6 +1400,7 @@ static const struct board_info __initcon
&board_spw500v,
&board_96348sv,
&board_V2500V_BB,
+ &board_V2110,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1436,6 +1453,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
{ .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },

View File

@ -1,50 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -995,6 +995,30 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_ct536_ct5621 = {
+ .name = "CT536_CT5621",
+ .expected_cpu_id = 0x6348,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
@@ -1401,6 +1425,7 @@ static const struct board_info __initcon
&board_96348sv,
&board_V2500V_BB,
&board_V2110,
+ &board_ct536_ct5621,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1455,6 +1480,8 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
{ .compatible = "bt,voyager-2110", .data = &board_V2110, },
{ .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },

View File

@ -1,48 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1019,6 +1019,29 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_96348A_122 = {
+ .name = "96348A-122",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
@@ -1426,6 +1449,7 @@ static const struct board_info __initcon
&board_V2500V_BB,
&board_V2110,
&board_ct536_ct5621,
+ &board_96348A_122,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1481,6 +1505,7 @@ static struct of_device_id const bcm963x
{ .compatible = "bt,voyager-2110", .data = &board_V2110, },
{ .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
{ .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
+ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
{ .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },

View File

@ -1,53 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -995,6 +995,34 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_CPVA502plus = {
+ .name = "CPVA502+",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .ephy_reset_gpio = 4,
+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_ct536_ct5621 = {
.name = "CT536_CT5621",
.expected_cpu_id = 0x6348,
@@ -1450,6 +1478,7 @@ static const struct board_info __initcon
&board_V2110,
&board_ct536_ct5621,
&board_96348A_122,
+ &board_CPVA502plus,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1515,6 +1544,7 @@ static struct of_device_id const bcm963x
{ .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ { .compatible = "telsey,cpva502plus", .data = &board_CPVA502plus, },
{ .compatible = "telsey,magic", .data = &board_96348sv, },
{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
{ .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },

View File

@ -1,42 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1225,6 +1225,23 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
};
+/* NetGear DG834G v4 */
+static struct board_info __initdata board_96348W3 = {
+ .name = "96348W3",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
static struct board_info __initdata board_96348_D4PW = {
.name = "D-4P-W",
.expected_cpu_id = 0x6348,
@@ -1479,6 +1496,7 @@ static const struct board_info __initcon
&board_ct536_ct5621,
&board_96348A_122,
&board_CPVA502plus,
+ &board_96348W3,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1540,6 +1558,7 @@ static struct of_device_id const bcm963x
{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
{ .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
{ .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
{ .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
{ .compatible = "tecom,gw6000", .data = &board_gw6000, },

View File

@ -1,41 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1159,6 +1159,22 @@ static struct board_info __initdata boar
.has_ehci0 = 1,
};
+static struct board_info __initdata board_FAST2604 = {
+ .name = "F@ST2604",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
static struct board_info __initdata board_rta1025w_16 = {
.name = "RTA1025W_16",
.expected_cpu_id = 0x6348,
@@ -1485,6 +1501,7 @@ static const struct board_info __initcon
&board_96348gw_10,
&board_96348gw_11,
&board_FAST2404,
+ &board_FAST2604,
&board_DV201AMR,
&board_96348gw_a,
&board_rta1025w_16,
@@ -1560,6 +1577,7 @@ static struct of_device_id const bcm963x
{ .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
{ .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
{ .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "sagem,fast-2604", .data = &board_FAST2604, },
{ .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
{ .compatible = "tecom,gw6200", .data = &board_gw6200, },

View File

@ -1,48 +0,0 @@
From: "mexit@o2.pl" <mexit@o2.pl>
Date: Sun, 24 Nov 2013 21:33:38 +0000
Subject: [PATCH 4/5] bcm63xx: add support for Asmax AR 1004g router
Support for Asmax AR 1004g router
Signed-off-by: Adrian Feliks <mexit@o2.pl>
---
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -979,6 +979,21 @@ static struct board_info __initdata boar
.has_ehci0 = 1,
};
+static struct board_info __initdata board_96348gw_10_AR1004G = {
+ .name = "AR1004G",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
/* BT Voyager 2110 */
static struct board_info __initdata board_V2110 = {
.name = "V2110",
@@ -1514,6 +1529,7 @@ static const struct board_info __initcon
&board_96348A_122,
&board_CPVA502plus,
&board_96348W3,
+ &board_96348gw_10_AR1004G,
#endif /* CONFIG_BCM63XX_CPU_6348 */
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
@@ -1561,6 +1577,7 @@ static struct of_device_id const bcm963x
{ .compatible = "dynalink,rta770w", .data = &board_rta770w, },
#endif /* CONFIG_BCM63XX_CPU_6345 */
#ifdef CONFIG_BCM63XX_CPU_6348
+ { .compatible = "asmax,ar-1004g", .data = &board_96348gw_10_AR1004G, },
{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
{ .compatible = "brcm,bcm96348r", .data = &board_96348r, },
{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },

View File

@ -1,77 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1470,6 +1470,56 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
.has_ehci0 = 1,
};
+
+static struct board_info __initdata board_nb4_ser_r0 = {
+ .name = "NB4-SER-r0",
+ .expected_cpu_id = 0x6358,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_nb4_fxc_r1 = {
+ .name = "NB4-FXC-r1",
+ .expected_cpu_id = 0x6358,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6358 */
/*
@@ -1537,6 +1587,8 @@ static const struct board_info __initcon
&board_96358vw2,
&board_AGPFS0,
&board_DWVS0,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
#endif /* CONFIG_BCM63XX_CPU_6358 */
};
@@ -1613,6 +1665,8 @@ static struct of_device_id const bcm963x
{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
#endif /* CONFIG_BCM63XX_CPU_6362 */

View File

@ -1,42 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1422,6 +1422,23 @@ static struct board_info __initdata boar
.num_usbh_ports = 2,
};
+static struct board_info __initdata board_CPVA642 = {
+ .name = "CPVA642",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
static struct board_info __initdata board_AGPFS0 = {
.name = "AGPF-S0",
.expected_cpu_id = 0x6358,
@@ -1586,6 +1603,7 @@ static const struct board_info __initcon
&board_96358vw,
&board_96358vw2,
&board_AGPFS0,
+ &board_CPVA642,
&board_DWVS0,
&board_nb4_ser_r0,
&board_nb4_fxc_r1,
@@ -1667,6 +1685,7 @@ static struct of_device_id const bcm963x
{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
{ .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
{ .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
#endif /* CONFIG_BCM63XX_CPU_6362 */

View File

@ -1,41 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1488,6 +1488,22 @@ static struct board_info __initdata boar
.has_ehci0 = 1,
};
+/* D-Link DSL-274xB revison C2/C3 */
+static struct board_info __initdata board_dsl_274xb_rev_c = {
+ .name = "AW4139",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
static struct board_info __initdata board_nb4_ser_r0 = {
.name = "NB4-SER-r0",
.expected_cpu_id = 0x6358,
@@ -1605,6 +1621,7 @@ static const struct board_info __initcon
&board_AGPFS0,
&board_CPVA642,
&board_DWVS0,
+ &board_dsl_274xb_rev_c,
&board_nb4_ser_r0,
&board_nb4_fxc_r1,
#endif /* CONFIG_BCM63XX_CPU_6358 */
@@ -1678,6 +1695,7 @@ static struct of_device_id const bcm963x
{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },

View File

@ -1,50 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1553,6 +1553,31 @@ static struct board_info __initdata boar
.force_duplex_full = 1,
},
};
+
+static struct board_info __initdata board_HW553 = {
+ .name = "HW553",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6358 */
/*
@@ -1624,6 +1649,7 @@ static const struct board_info __initcon
&board_dsl_274xb_rev_c,
&board_nb4_ser_r0,
&board_nb4_fxc_r1,
+ &board_HW553,
#endif /* CONFIG_BCM63XX_CPU_6358 */
};
@@ -1697,6 +1723,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },

View File

@ -1,39 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1578,6 +1578,20 @@ static struct board_info __initdata boar
.pci_dev = 1,
},
};
+
+ /* T-Home Speedport W 303V Typ B */
+static struct board_info __initdata board_spw303v = {
+ .name = "96358-502V",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6358 */
/*
@@ -1650,6 +1664,7 @@ static const struct board_info __initcon
&board_nb4_ser_r0,
&board_nb4_fxc_r1,
&board_HW553,
+ &board_spw303v,
#endif /* CONFIG_BCM63XX_CPU_6358 */
};
@@ -1730,6 +1745,7 @@ static struct of_device_id const bcm963x
{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
{ .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
{ .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362

View File

@ -1,49 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1554,6 +1554,30 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_ct6373_1 = {
+ .name = "CT6373-1",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_HW553 = {
.name = "HW553",
.expected_cpu_id = 0x6358,
@@ -1663,6 +1687,7 @@ static const struct board_info __initcon
&board_dsl_274xb_rev_c,
&board_nb4_ser_r0,
&board_nb4_fxc_r1,
+ &board_ct6373_1,
&board_HW553,
&board_spw303v,
#endif /* CONFIG_BCM63XX_CPU_6358 */
@@ -1736,6 +1761,7 @@ static struct of_device_id const bcm963x
{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
+ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
{ .compatible = "huawei,echolife-hg553", .data = &board_HW553, },

View File

@ -1,50 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1616,6 +1616,31 @@ static struct board_info __initdata boar
.use_internal_phy = 1,
},
};
+
+/* D-Link DVA-G3810BN/TL */
+static struct board_info __initdata board_DVAG3810BN = {
+ .name = "DVAG3810BN",
+ .expected_cpu_id = 0x6358,
+
+ .has_pccard = 1,
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6358 */
/*
@@ -1690,6 +1715,7 @@ static const struct board_info __initcon
&board_ct6373_1,
&board_HW553,
&board_spw303v,
+ &board_DVAG3810BN,
#endif /* CONFIG_BCM63XX_CPU_6358 */
};
@@ -1764,6 +1790,7 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
{ .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },

View File

@ -1,125 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -12,6 +12,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
+#include <linux/pci_ids.h>
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
@@ -1603,6 +1604,94 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_HW556_A = {
+ .name = "HW556_A",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_ATHEROS,
+ .caldata_offset = 0xf7e000,
+ .slot = 1,
+ .endian_check = 1,
+ .led_pin = 2,
+ .led_active_high = 1,
+ },
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_HW556_B = {
+ .name = "HW556_B",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_ATHEROS,
+ .caldata_offset = 0xefe000,
+ .slot = 1,
+ .endian_check = 1,
+ .led_pin = 2,
+ .led_active_high = 1,
+ },
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_HW556_C = {
+ .name = "HW556_C",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_RALINK,
+ .caldata_offset = 0xeffe00,
+ .slot = 1,
+ .eeprom = "rt2x00.eeprom",
+ },
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
/* T-Home Speedport W 303V Typ B */
static struct board_info __initdata board_spw303v = {
.name = "96358-502V",
@@ -1714,6 +1803,9 @@ static const struct board_info __initcon
&board_nb4_fxc_r1,
&board_ct6373_1,
&board_HW553,
+ &board_HW556_A,
+ &board_HW556_B,
+ &board_HW556_C,
&board_spw303v,
&board_DVAG3810BN,
#endif /* CONFIG_BCM63XX_CPU_6358 */
@@ -1792,6 +1884,9 @@ static struct of_device_id const bcm963x
{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
{ .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
{ .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
+ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
+ { .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, },
{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },

View File

@ -1,55 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1579,6 +1579,36 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_HW520 = {
+ .name = "HW6358GW_B",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_HW553 = {
.name = "HW553",
.expected_cpu_id = 0x6358,
@@ -1802,6 +1832,7 @@ static const struct board_info __initcon
&board_nb4_ser_r0,
&board_nb4_fxc_r1,
&board_ct6373_1,
+ &board_HW520,
&board_HW553,
&board_HW556_A,
&board_HW556_B,
@@ -1883,6 +1914,7 @@ static struct of_device_id const bcm963x
{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
{ .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
+ { .compatible = "huawei,echolife-hg520v", .data = &board_HW520, },
{ .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
{ .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
{ .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },

View File

@ -1,50 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1579,6 +1579,31 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_homehub2a = {
+ .name = "HOMEHUB2A",
+ .expected_cpu_id = 0x6358,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enet1 = 1,
+ .enet1 = {
+ .has_phy = 1,
+ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4322,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_HW520 = {
.name = "HW6358GW_B",
.expected_cpu_id = 0x6358,
@@ -1832,6 +1857,7 @@ static const struct board_info __initcon
&board_nb4_ser_r0,
&board_nb4_fxc_r1,
&board_ct6373_1,
+ &board_homehub2a,
&board_HW520,
&board_HW553,
&board_HW556_A,
@@ -1927,6 +1953,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
{ .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ { .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
#endif /* CONFIG_BCM63XX_CPU_6362 */

View File

@ -1,52 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1787,6 +1787,31 @@ static struct board_info __initdata boar
};
#endif /* CONFIG_BCM63XX_CPU_6358 */
+#ifdef CONFIG_BCM63XX_CPU_6362
+static struct board_info __initdata board_nb6 = {
+ .name = "NB6",
+ .expected_cpu_id = 0x6362,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_6362 */
+
/*
* all boards
*/
@@ -1866,6 +1891,9 @@ static const struct board_info __initcon
&board_spw303v,
&board_DVAG3810BN,
#endif /* CONFIG_BCM63XX_CPU_6358 */
+#ifdef CONFIG_BCM63XX_CPU_6362
+ &board_nb6,
+#endif /* CONFIG_BCM63XX_CPU_6362 */
};
static struct of_device_id const bcm963xx_boards_dt[] = {
@@ -1956,6 +1984,7 @@ static struct of_device_id const bcm963x
{ .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
#endif /* CONFIG_BCM63XX_CPU_6368 */

View File

@ -1,62 +0,0 @@
From: Max Staudt <openwrt.max@enpas.org>
Date: Wed, 15 Jan 2014 18:51:13 +0000
Subject: [PATCH] bcm63xx: F@ST2504n board support (Linux-3.10.26)
Signed-off-by: Max Staudt <openwrt.max@enpas.org>
---
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1810,6 +1810,37 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_fast2504n = {
+ .name = "F@ST2504n",
+ .expected_cpu_id = 0x6362,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6362 */
/*
@@ -1893,6 +1924,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
&board_nb6,
+ &board_fast2504n,
#endif /* CONFIG_BCM63XX_CPU_6362 */
};
@@ -1984,6 +2016,7 @@ static struct of_device_id const bcm963x
{ .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
+ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368

View File

@ -1,49 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1811,6 +1811,30 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_dgnd3700v2 = {
+ .name = "96362ADVN2xh",
+ .expected_cpu_id = 0x6362,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
static struct board_info __initdata board_fast2504n = {
.name = "F@ST2504n",
.expected_cpu_id = 0x6362,
@@ -1924,6 +1948,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
&board_nb6,
+ &board_dgnd3700v2,
&board_fast2504n,
#endif /* CONFIG_BCM63XX_CPU_6362 */
};
@@ -2016,6 +2041,7 @@ static struct of_device_id const bcm963x
{ .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
+ { .compatible = "netgear,dgnd3700-v2", .data = &board_dgnd3700v2, },
{ .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */

View File

@ -1,56 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1865,6 +1865,37 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_hg253s_v2 = {
+ .name = "hg253s",
+ .expected_cpu_id = 0x6362,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .timing_sel = 1,
+ .name = "RGMII",
+ },
+
+ [5] = {
+ .used = 1,
+ .phy_id = 24,
+ .timing_sel = 1,
+ .name = "WAN",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6362 */
/*
@@ -1950,6 +1981,7 @@ static const struct board_info __initcon
&board_nb6,
&board_dgnd3700v2,
&board_fast2504n,
+ &board_hg253s_v2,
#endif /* CONFIG_BCM63XX_CPU_6362 */
};
@@ -2041,6 +2073,7 @@ static struct of_device_id const bcm963x
{ .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
#endif /* CONFIG_BCM63XX_CPU_6358 */
#ifdef CONFIG_BCM63XX_CPU_6362
+ { .compatible = "huawei,hg253s-v2", .data = &board_hg253s_v2, },
{ .compatible = "netgear,dgnd3700-v2", .data = &board_dgnd3700v2, },
{ .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },

View File

@ -1,111 +0,0 @@
From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
From: Maxime Bizon <mbizon@freebox.fr>
Date: Wed, 20 Jan 2010 16:21:30 +0100
Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
---
arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
.../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
2 files changed, 97 insertions(+), 0 deletions(-)
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1899,6 +1899,52 @@ static struct board_info __initdata boar
#endif /* CONFIG_BCM63XX_CPU_6362 */
/*
+ * known 6368 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6368
+static struct board_info __initdata board_96368mvwg = {
+ .name = "96368MVWG",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port1",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port2",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 0x12,
+ .name = "port0",
+ },
+ [5] = {
+ .used = 1,
+ .phy_id = 0x11,
+ .name = "port3",
+ },
+ },
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_6368 */
+
+/*
* all boards
*/
static const struct board_info __initconst *bcm963xx_boards[] = {
@@ -1983,6 +2029,9 @@ static const struct board_info __initcon
&board_fast2504n,
&board_hg253s_v2,
#endif /* CONFIG_BCM63XX_CPU_6362 */
+#ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+#endif /* CONFIG_BCM63XX_CPU_6368 */
};
static struct of_device_id const bcm963xx_boards_dt[] = {
@@ -2079,6 +2128,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
#endif /* CONFIG_BCM63XX_CPU_63268 */
--- a/arch/mips/bcm63xx/boards/board_common.c
+++ b/arch/mips/bcm63xx/boards/board_common.c
@@ -81,12 +81,25 @@ void __init board_early_setup(const stru
bcm63xx_pci_enabled = 1;
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G2_PCI;
+
+ if (BCMCPU_IS_6368())
+ val |= GPIO_MODE_6368_PCI_REQ1 |
+ GPIO_MODE_6368_PCI_GNT1 |
+ GPIO_MODE_6368_PCI_INTB |
+ GPIO_MODE_6368_PCI_REQ0 |
+ GPIO_MODE_6368_PCI_GNT0;
}
#endif
if (board.has_pccard) {
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G1_MII_PCCARD;
+
+ if (BCMCPU_IS_6368())
+ val |= GPIO_MODE_6368_PCMCIA_CD1 |
+ GPIO_MODE_6368_PCMCIA_CD2 |
+ GPIO_MODE_6368_PCMCIA_VS1 |
+ GPIO_MODE_6368_PCMCIA_VS2;
}
if (board.has_enet0 && !board.enet0.use_internal_phy) {

View File

@ -1,69 +0,0 @@
From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
From: Maxime Bizon <mbizon@freebox.fr>
Date: Fri, 4 Nov 2011 12:33:48 +0100
Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
---
arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++
1 files changed, 67 insertions(+), 0 deletions(-)
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1942,6 +1942,41 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_96368mvngr = {
+ .name = "96368MVNgr",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6368 */
/*
@@ -2031,6 +2066,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
&board_96368mvwg,
+ &board_96368mvngr,
#endif /* CONFIG_BCM63XX_CPU_6368 */
};
@@ -2128,6 +2164,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268

View File

@ -1,75 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -13,6 +13,8 @@
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/pci_ids.h>
+#include <linux/platform_data/b53.h>
+#include <linux/spi/spi.h>
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
@@ -1977,6 +1979,47 @@ static struct board_info __initdata boar
},
},
};
+
+static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+ { .offset = 99, .value = 0xfb0d },
+ { .offset = 113, .value = 0xfef7 },
+ { .offset = 114, .value = 0x15f7 },
+ { .offset = 115, .value = 0xfb1a },
+};
+
+static struct board_info __initdata board_WAP5813n = {
+ .name = "96369R-1231N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [4] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = wap5813n_fixups,
+ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_6368 */
/*
@@ -2067,6 +2110,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6368
&board_96368mvwg,
&board_96368mvngr,
+ &board_WAP5813n,
#endif /* CONFIG_BCM63XX_CPU_6368 */
};
@@ -2166,6 +2210,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6368
{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
#endif /* CONFIG_BCM63XX_CPU_63268 */

View File

@ -1,78 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1980,6 +1980,59 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+ { .offset = 99, .value = 0xfab0 },
+ { .offset = 113, .value = 0xfed1 },
+ { .offset = 114, .value = 0x1609 },
+ { .offset = 115, .value = 0xfad9 },
+};
+
+static struct board_info __initdata board_VR3025u = {
+ .name = "96368M-1541N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vr3025u_fixups,
+ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
+ },
+};
+
static struct sprom_fixup __initdata wap5813n_fixups[] = {
{ .offset = 97, .value = 0xfeed },
{ .offset = 98, .value = 0x15d1 },
@@ -2110,6 +2163,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6368
&board_96368mvwg,
&board_96368mvngr,
+ &board_VR3025u,
&board_WAP5813n,
#endif /* CONFIG_BCM63XX_CPU_6368 */
};
@@ -2210,6 +2264,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_6368
{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268

View File

@ -1,78 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2033,6 +2033,59 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata vr3025un_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+ { .offset = 99, .value = 0xfab0 },
+ { .offset = 113, .value = 0xfed1 },
+ { .offset = 114, .value = 0x1609 },
+ { .offset = 115, .value = 0xfad9 },
+};
+
+static struct board_info __initdata board_VR3025un = {
+ .name = "96368M-1341N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vr3025un_fixups,
+ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
+ },
+};
+
static struct sprom_fixup __initdata wap5813n_fixups[] = {
{ .offset = 97, .value = 0xfeed },
{ .offset = 98, .value = 0x15d1 },
@@ -2164,6 +2217,7 @@ static const struct board_info __initcon
&board_96368mvwg,
&board_96368mvngr,
&board_VR3025u,
+ &board_VR3025un,
&board_WAP5813n,
#endif /* CONFIG_BCM63XX_CPU_6368 */
};
@@ -2265,6 +2319,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268

View File

@ -1,67 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1989,6 +1989,48 @@ static struct sprom_fixup __initdata vr3
{ .offset = 115, .value = 0xfad9 },
};
+static struct board_info __initdata board_P870HW51A_V2 = {
+ .name = "P870HW-51a_v2",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4318,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_VR3025u = {
.name = "96368M-1541N",
.expected_cpu_id = 0x6368,
@@ -2216,6 +2258,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6368
&board_96368mvwg,
&board_96368mvngr,
+ &board_P870HW51A_V2,
&board_VR3025u,
&board_VR3025un,
&board_WAP5813n,
@@ -2321,6 +2364,7 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
#endif /* CONFIG_BCM63XX_CPU_63268 */

View File

@ -1,49 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1980,6 +1980,30 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_DGND3700v1_3800B = {
+ .name = "DGND3700v1_3800B",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [5] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
static struct sprom_fixup __initdata vr3025u_fixups[] = {
{ .offset = 97, .value = 0xfeb3 },
{ .offset = 98, .value = 0x1618 },
@@ -2258,6 +2282,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6368
&board_96368mvwg,
&board_96368mvngr,
+ &board_DGND3700v1_3800B,
&board_P870HW51A_V2,
&board_VR3025u,
&board_VR3025un,
@@ -2364,6 +2389,7 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268

View File

@ -1,71 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2004,6 +2004,52 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_HG655b = {
+ .name = "HW65x",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_RALINK,
+ .caldata_offset = 0x7c0000,
+ .slot = 1,
+ .eeprom = "rt2x00.eeprom",
+ },
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
+
static struct sprom_fixup __initdata vr3025u_fixups[] = {
{ .offset = 97, .value = 0xfeb3 },
{ .offset = 98, .value = 0x1618 },
@@ -2283,6 +2329,7 @@ static const struct board_info __initcon
&board_96368mvwg,
&board_96368mvngr,
&board_DGND3700v1_3800B,
+ &board_HG655b,
&board_P870HW51A_V2,
&board_VR3025u,
&board_VR3025un,
@@ -2389,6 +2436,7 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
{ .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */

View File

@ -1,78 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2198,6 +2198,59 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata vr3026e_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+ { .offset = 99, .value = 0xfab0 },
+ { .offset = 113, .value = 0xfed1 },
+ { .offset = 114, .value = 0x1609 },
+ { .offset = 115, .value = 0xfad9 },
+};
+
+static struct board_info __initdata board_VR3026e = {
+ .name = "96368MT-1341N1",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vr3026e_fixups,
+ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
+ },
+};
+
static struct sprom_fixup __initdata wap5813n_fixups[] = {
{ .offset = 97, .value = 0xfeed },
{ .offset = 98, .value = 0x15d1 },
@@ -2333,6 +2386,7 @@ static const struct board_info __initcon
&board_P870HW51A_V2,
&board_VR3025u,
&board_VR3025un,
+ &board_VR3026e,
&board_WAP5813n,
#endif /* CONFIG_BCM63XX_CPU_6368 */
};
@@ -2435,6 +2489,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
{ .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
{ .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },

View File

@ -1,71 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2050,6 +2050,52 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_HG622 = {
+ .name = "96368MVWG_hg622",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_caldata = 1,
+ .caldata = {
+ {
+ .vendor = PCI_VENDOR_ID_RALINK,
+ .caldata_offset = 0xfa0000,
+ .slot = 1,
+ .eeprom = "rt2x00.eeprom",
+ },
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
+
static struct sprom_fixup __initdata vr3025u_fixups[] = {
{ .offset = 97, .value = 0xfeb3 },
{ .offset = 98, .value = 0x1618 },
@@ -2382,6 +2428,7 @@ static const struct board_info __initcon
&board_96368mvwg,
&board_96368mvngr,
&board_DGND3700v1_3800B,
+ &board_HG622,
&board_HG655b,
&board_P870HW51A_V2,
&board_VR3025u,
@@ -2491,6 +2538,7 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
{ .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
{ .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
{ .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },

View File

@ -1,62 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2004,6 +2004,43 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata EVG2000_fixups[] = {
+ { .offset = 219, .value = 0xec08 },
+};
+
+static struct board_info __initdata board_EVG2000 = {
+ .name = "96369PVG",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [5] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4322,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = EVG2000_fixups,
+ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
+ },
+};
+
static struct board_info __initdata board_HG655b = {
.name = "HW65x",
.expected_cpu_id = 0x6368,
@@ -2428,6 +2465,7 @@ static const struct board_info __initcon
&board_96368mvwg,
&board_96368mvngr,
&board_DGND3700v1_3800B,
+ &board_EVG2000,
&board_HG622,
&board_HG655b,
&board_P870HW51A_V2,
@@ -2541,6 +2579,7 @@ static struct of_device_id const bcm963x
{ .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
{ .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
{ .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268

View File

@ -1,68 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -1904,6 +1904,49 @@ static struct board_info __initdata boar
* known 6368 boards
*/
#ifdef CONFIG_BCM63XX_CPU_6368
+static struct board_info __initdata board_AV4202N = {
+ .name = "96368_Swiss_S1",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM4322,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ },
+};
+
static struct board_info __initdata board_96368mvwg = {
.name = "96368MVWG",
.expected_cpu_id = 0x6368,
@@ -2462,6 +2505,7 @@ static const struct board_info __initcon
&board_hg253s_v2,
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
+ &board_AV4202N,
&board_96368mvwg,
&board_96368mvngr,
&board_DGND3700v1_3800B,
@@ -2570,6 +2614,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },

View File

@ -1,125 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2377,6 +2377,106 @@ static struct board_info __initdata boar
},
};
+static struct sprom_fixup __initdata vh4032n_fixups[] = {
+ { .offset = 2, .value = 0x04d2 },
+ { .offset = 4, .value = 0x4350 },
+ { .offset = 65, .value = 0x1300 },
+ { .offset = 68, .value = 0x0402 },
+ { .offset = 70, .value = 0x0090 },
+ { .offset = 71, .value = 0x4c19 },
+ { .offset = 72, .value = 0x2345 },
+ { .offset = 87, .value = 0x0315 },
+ { .offset = 88, .value = 0x0315 },
+ { .offset = 96, .value = 0x2048 },
+ { .offset = 97, .value = 0xfed7 },
+ { .offset = 98, .value = 0x15a6 },
+ { .offset = 99, .value = 0xfaee },
+ { .offset = 100, .value = 0x3e3a },
+ { .offset = 101, .value = 0x3a36 },
+ { .offset = 102, .value = 0xff7f },
+ { .offset = 103, .value = 0x11b9 },
+ { .offset = 104, .value = 0xfc53 },
+ { .offset = 105, .value = 0xffe6 },
+ { .offset = 106, .value = 0xfdd2 },
+ { .offset = 107, .value = 0xfe49 },
+ { .offset = 108, .value = 0xff6a },
+ { .offset = 109, .value = 0x136e },
+ { .offset = 110, .value = 0xfbed },
+ { .offset = 111, .value = 0x0000 },
+ { .offset = 112, .value = 0x2048 },
+ { .offset = 113, .value = 0xfee2 },
+ { .offset = 114, .value = 0x15e5 },
+ { .offset = 115, .value = 0xfaed },
+ { .offset = 116, .value = 0x3e3a },
+ { .offset = 117, .value = 0x3a36 },
+ { .offset = 118, .value = 0xffc8 },
+ { .offset = 119, .value = 0x12b8 },
+ { .offset = 120, .value = 0xfca1 },
+ { .offset = 121, .value = 0xff9b },
+ { .offset = 122, .value = 0x122a },
+ { .offset = 123, .value = 0xfcc8 },
+ { .offset = 124, .value = 0xff95 },
+ { .offset = 125, .value = 0x146b },
+ { .offset = 126, .value = 0xfbba },
+ { .offset = 127, .value = 0x0000 },
+ { .offset = 161, .value = 0x0000 },
+ { .offset = 162, .value = 0x0000 },
+ { .offset = 169, .value = 0x0000 },
+ { .offset = 170, .value = 0x0000 },
+ { .offset = 171, .value = 0x0000 },
+ { .offset = 172, .value = 0x0000 },
+ { .offset = 173, .value = 0x0000 },
+ { .offset = 174, .value = 0x0000 },
+ { .offset = 175, .value = 0x0000 },
+ { .offset = 176, .value = 0x0000 },
+ { .offset = 219, .value = 0x1108 },
+};
+
+static struct board_info __initdata board_VH4032N = {
+ .name = "VH4032N",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN4",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN2",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+
+ .use_fallback_sprom = 1,
+ .fallback_sprom = {
+ .type = SPROM_BCM43222,
+ .pci_bus = 0,
+ .pci_dev = 1,
+ .board_fixups = vh4032n_fixups,
+ .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
+ },
+};
+
static struct sprom_fixup __initdata wap5813n_fixups[] = {
{ .offset = 97, .value = 0xfeed },
{ .offset = 98, .value = 0x15d1 },
@@ -2513,6 +2613,7 @@ static const struct board_info __initcon
&board_HG622,
&board_HG655b,
&board_P870HW51A_V2,
+ &board_VH4032N,
&board_VR3025u,
&board_VR3025un,
&board_VR3026e,
@@ -2625,6 +2726,7 @@ static struct of_device_id const bcm963x
{ .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
{ .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
{ .compatible = "netgear,evg2000", .data = &board_EVG2000, },
+ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268

View File

@ -1,48 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2227,6 +2227,29 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_R1000H = {
+ .name = "R1000H",
+ .expected_cpu_id = 0x6368,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [5] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
static struct board_info __initdata board_VR3025u = {
.name = "96368M-1541N",
.expected_cpu_id = 0x6368,
@@ -2613,6 +2636,7 @@ static const struct board_info __initcon
&board_HG622,
&board_HG655b,
&board_P870HW51A_V2,
+ &board_R1000H,
&board_VH4032N,
&board_VR3025u,
&board_VR3025un,
@@ -2715,6 +2739,7 @@ static struct of_device_id const bcm963x
{ .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
#endif /* CONFIG_BCM63XX_CPU_6362 */
#ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
{ .compatible = "adb,av4202n", .data = &board_AV4202N, },
{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },

View File

@ -1,67 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2543,6 +2543,46 @@ static struct board_info __initdata boar
#endif /* CONFIG_BCM63XX_CPU_6368 */
/*
+ * known 63268/63269 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_63268
+static struct board_info __initdata board_963269bhr = {
+ .name = "963269BHR",
+ .expected_cpu_id = 0x63268,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "port1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "port2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "port3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "port4",
+ },
+ },
+ },
+};
+#endif /* CONFIG_BCM63XX_CPU_63268 */
+
+/*
* all boards
*/
static const struct board_info __initconst *bcm963xx_boards[] = {
@@ -2643,6 +2683,9 @@ static const struct board_info __initcon
&board_VR3026e,
&board_WAP5813n,
#endif /* CONFIG_BCM63XX_CPU_6368 */
+#ifdef CONFIG_BCM63XX_CPU_63268
+ &board_963269bhr,
+#endif /* CONFIG_BCM63XX_CPU_63268 */
};
static struct of_device_id const bcm963xx_boards_dt[] = {
@@ -2755,6 +2798,7 @@ static struct of_device_id const bcm963x
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
#endif /* CONFIG_BCM63XX_CPU_63268 */
#endif /* CONFIG_OF */
{ },

View File

@ -1,67 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2580,6 +2580,48 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_vw6339gu = {
+ .name = "VW6339GU",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN2",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN4",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 7,
+ .name = "WAN",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_63268 */
/*
@@ -2685,6 +2727,7 @@ static const struct board_info __initcon
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
&board_963269bhr,
+ &board_vw6339gu,
#endif /* CONFIG_BCM63XX_CPU_63268 */
};
@@ -2799,6 +2842,7 @@ static struct of_device_id const bcm963x
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
#endif /* CONFIG_BCM63XX_CPU_63268 */
#endif /* CONFIG_OF */
{ },

View File

@ -1,84 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2546,6 +2546,65 @@ static struct board_info __initdata boar
* known 63268/63269 boards
*/
#ifdef CONFIG_BCM63XX_CPU_63268
+static struct board_info __initdata board_963268bu_p300 = {
+ .name = "963268BU_P300",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_usbd = 1,
+ .usbd = {
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 17,
+ .name = "FE1",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "GbE2",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 0,
+ .name = "GbE3",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ [5] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "GbE1",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ [6] = {
+ .used = 1,
+ .phy_id = 24,
+ .name = "GbE4",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ [7] = {
+ .used = 1,
+ .phy_id = 25,
+ .name = "GbE5",
+ .mii_override = 1,
+ .timing_sel = 1,
+ },
+ },
+ },
+};
+
static struct board_info __initdata board_963269bhr = {
.name = "963269BHR",
.expected_cpu_id = 0x63268,
@@ -2726,6 +2785,7 @@ static const struct board_info __initcon
&board_WAP5813n,
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
+ &board_963268bu_p300,
&board_963269bhr,
&board_vw6339gu,
#endif /* CONFIG_BCM63XX_CPU_63268 */
@@ -2841,6 +2901,7 @@ static struct of_device_id const bcm963x
{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
#endif /* CONFIG_BCM63XX_CPU_6368 */
#ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
#endif /* CONFIG_BCM63XX_CPU_63268 */

View File

@ -1,61 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2681,6 +2681,42 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_BSKYB_63168 = {
+ .name = "BSKYB_63168",
+ .expected_cpu_id = 0x63268,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "Port 1",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "Port 2",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "Port 3",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "Port 4",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_63268 */
/*
@@ -2788,6 +2824,7 @@ static const struct board_info __initcon
&board_963268bu_p300,
&board_963269bhr,
&board_vw6339gu,
+ &board_BSKYB_63168,
#endif /* CONFIG_BCM63XX_CPU_63268 */
};
@@ -2904,6 +2941,7 @@ static struct of_device_id const bcm963x
{ .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ { .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
#endif /* CONFIG_BCM63XX_CPU_63268 */
#endif /* CONFIG_OF */
{ },

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@ -1,60 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2640,6 +2640,41 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_VR3032u = {
+ .name = "963168M-1841N1",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [0] = {
+ .used = 1,
+ .phy_id = 1,
+ .name = "LAN2",
+ },
+ [1] = {
+ .used = 1,
+ .phy_id = 2,
+ .name = "LAN3",
+ },
+ [2] = {
+ .used = 1,
+ .phy_id = 3,
+ .name = "LAN4",
+ },
+ [3] = {
+ .used = 1,
+ .phy_id = 4,
+ .name = "LAN1",
+ },
+ },
+ },
+};
+
static struct board_info __initdata board_vw6339gu = {
.name = "VW6339GU",
.expected_cpu_id = 0x63268,
@@ -2823,6 +2858,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_63268
&board_963268bu_p300,
&board_963269bhr,
+ &board_VR3032u,
&board_vw6339gu,
&board_BSKYB_63168,
#endif /* CONFIG_BCM63XX_CPU_63268 */
@@ -2940,6 +2976,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_63268
{ .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "comtrend,vr-3032u", .data = &board_VR3032u, },
{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
{ .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
#endif /* CONFIG_BCM63XX_CPU_63268 */

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@ -1,50 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2640,6 +2640,31 @@ static struct board_info __initdata boar
},
};
+static struct board_info __initdata board_VG8050 = {
+ .name = "963169P-1861N5",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [6] = {
+ .used = 1,
+ .phy_id = 0xff,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .mii_override = 1,
+ .timing_sel = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
+
static struct board_info __initdata board_VR3032u = {
.name = "963168M-1841N1",
.expected_cpu_id = 0x63268,
@@ -2858,6 +2883,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_63268
&board_963268bu_p300,
&board_963269bhr,
+ &board_VG8050,
&board_VR3032u,
&board_vw6339gu,
&board_BSKYB_63168,
@@ -2976,6 +3002,7 @@ static struct of_device_id const bcm963x
#ifdef CONFIG_BCM63XX_CPU_63268
{ .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "comtrend,vg-8050", .data = &board_VG8050, },
{ .compatible = "comtrend,vr-3032u", .data = &board_VR3032u, },
{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
{ .compatible = "sky,sr102", .data = &board_BSKYB_63168, },

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@ -1,56 +0,0 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2777,6 +2777,36 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_H500s = {
+ .name = "BXK00C-1.6",
+ .expected_cpu_id = 0x63268,
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [3] = {
+ .used = 1,
+ .phy_id = 12,
+ .name = "WAN",
+ },
+ [4] = {
+ .used = 1,
+ .phy_id = 0,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .mii_override = 1,
+ .timing_sel = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_63268 */
/*
@@ -2887,6 +2917,7 @@ static const struct board_info __initcon
&board_VR3032u,
&board_vw6339gu,
&board_BSKYB_63168,
+ &board_H500s,
#endif /* CONFIG_BCM63XX_CPU_63268 */
};
@@ -3005,6 +3036,8 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,vg-8050", .data = &board_VG8050, },
{ .compatible = "comtrend,vr-3032u", .data = &board_VR3032u, },
{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ { .compatible = "sercomm,h500-s-lowi", .data = &board_H500s, },
+ { .compatible = "sercomm,h500-s-vfes", .data = &board_H500s, },
{ .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
#endif /* CONFIG_BCM63XX_CPU_63268 */
#endif /* CONFIG_OF */