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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
109 lines
3.7 KiB
Diff
109 lines
3.7 KiB
Diff
From be9165b9fdcf2a18ee201ffdaf8d69801387eb91 Mon Sep 17 00:00:00 2001
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From: Kuldeep Singh <kuldeep.singh@nxp.com>
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Date: Tue, 18 Feb 2020 10:42:50 +0800
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Subject: [PATCH] spi: spi-fsl-qspi: Introduce variable to fix different
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invalid master Id
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Different platforms have different Master with different SourceID on
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AHB bus. The 0X0E Master ID is used by cluster 3 in case of LS2088A.
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So, patch introduce an invalid master id variable to fix invalid
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mastered on different platforms.
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Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
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Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
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[rebase]
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Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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---
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drivers/spi/spi-fsl-qspi.c | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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--- a/drivers/spi/spi-fsl-qspi.c
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+++ b/drivers/spi/spi-fsl-qspi.c
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@@ -68,6 +68,11 @@
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#define QUADSPI_FLSHCR_TCSH_MASK GENMASK(11, 8)
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#define QUADSPI_FLSHCR_TDH_MASK GENMASK(17, 16)
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+#define QUADSPI_BUF0CR 0x10
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+#define QUADSPI_BUF1CR 0x14
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+#define QUADSPI_BUF2CR 0x18
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+#define QUADSPI_BUFXCR_INVALID_MSTRID 0xe
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+
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#define QUADSPI_BUF3CR 0x1c
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#define QUADSPI_BUF3CR_ALLMST_MASK BIT(31)
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#define QUADSPI_BUF3CR_ADATSZ(x) ((x) << 8)
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@@ -197,6 +202,7 @@
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struct fsl_qspi_devtype_data {
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unsigned int rxfifo;
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unsigned int txfifo;
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+ int invalid_mstrid;
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unsigned int ahb_buf_size;
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unsigned int quirks;
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bool little_endian;
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@@ -205,6 +211,7 @@ struct fsl_qspi_devtype_data {
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static const struct fsl_qspi_devtype_data vybrid_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_64,
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+ .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_SWAP_ENDIAN,
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.little_endian = true,
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@@ -213,6 +220,7 @@ static const struct fsl_qspi_devtype_dat
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static const struct fsl_qspi_devtype_data imx6sx_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_512,
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+ .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_4X_INT_CLK | QUADSPI_QUIRK_TKT245618,
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.little_endian = true,
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@@ -221,6 +229,7 @@ static const struct fsl_qspi_devtype_dat
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static const struct fsl_qspi_devtype_data imx7d_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_512,
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+ .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK |
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QUADSPI_QUIRK_USE_TDH_SETTING,
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@@ -230,6 +239,7 @@ static const struct fsl_qspi_devtype_dat
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static const struct fsl_qspi_devtype_data imx6ul_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_512,
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+ .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK |
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QUADSPI_QUIRK_USE_TDH_SETTING,
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@@ -239,6 +249,7 @@ static const struct fsl_qspi_devtype_dat
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static const struct fsl_qspi_devtype_data ls1021a_data = {
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.rxfifo = SZ_128,
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.txfifo = SZ_64,
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+ .invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
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.ahb_buf_size = SZ_1K,
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.quirks = 0,
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.little_endian = false,
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@@ -248,6 +259,7 @@ static const struct fsl_qspi_devtype_dat
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.rxfifo = SZ_128,
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.txfifo = SZ_64,
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.ahb_buf_size = SZ_1K,
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+ .invalid_mstrid = 0x0,
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.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_BASE_INTERNAL,
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.little_endian = true,
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};
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@@ -661,6 +673,7 @@ static int fsl_qspi_exec_op(struct spi_m
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void __iomem *base = q->iobase;
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u32 addr_offset = 0;
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int err = 0;
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+ int invalid_mstrid = q->devtype_data->invalid_mstrid;
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mutex_lock(&q->lock);
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@@ -684,6 +697,10 @@ static int fsl_qspi_exec_op(struct spi_m
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qspi_writel(q, QUADSPI_SPTRCLR_BFPTRC | QUADSPI_SPTRCLR_IPPTRC,
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base + QUADSPI_SPTRCLR);
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+ qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF0CR);
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+ qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF1CR);
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+ qspi_writel(q, invalid_mstrid, base + QUADSPI_BUF2CR);
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+
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fsl_qspi_prepare_lut(q, op);
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/*
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