Sebastian Schaper 64d088d8f9 ath79: increase spi clock for D-Link DIR-842
AHB is 258 MHz for this device (CPU_PLL / 3), but there is no difference
between 64 MHz and 50 MHz for spi-max-frequency, thus increase to 50 MHz.

Tested on revisions C1 and C3.

Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
2020-05-26 22:49:18 +02:00
..
2020-04-09 12:51:10 +02:00