ath79: increase spi clock for D-Link DIR-842

AHB is 258 MHz for this device (CPU_PLL / 3), but there is no difference
between 64 MHz and 50 MHz for spi-max-frequency, thus increase to 50 MHz.

Tested on revisions C1 and C3.

Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
This commit is contained in:
Sebastian Schaper 2020-05-19 12:40:17 +02:00 committed by Adrian Schmutzler
parent 8643c0b53d
commit 64d088d8f9

View File

@ -37,12 +37,13 @@
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <30000000>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";