openwrt/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts
Harm Berntsen 09f313bfd7 ramips: mt7621: Add Arcadyan WE420223-99 support
The Arcadyan WE420223-99 is a WiFi AC simultaneous dual-band access
point distributed as Experia WiFi by KPN in the Netherlands. It features
two ethernet ports and 2 internal antennas.

Specifications
--------------
SOC   : Mediatek MT7621AT
ETH   : Two 1 gigabit ports, built into the SOC
WIFI  : MT7615DN
BUTTON: Reset
BUTTON: WPS
LED   : Power (green+red)
LED   : WiFi (green+blue)
LED   : WPS (green+red)
LED   : Followme (green+red)
Power : 12 VDC, 1A barrel plug

Winbond variant:
RAM   : Winbond W631GG6MB12J, 1GBIT DDR3 SDRAM
Flash : Winbond W25Q256JVFQ, 256Mb SPI
U-Boot: 1.1.3 (Nov 23 2017 - 16:40:17), Ralink 5.0.0.1

Macronix variant:
RAM   : Nanya NT5CC64M16GP-DI, 1GBIT DDR3 SDRAM
Flash : MX25l25635FMI-10G, 256Mb SPI
U-Boot: 1.1.3 (Dec  4 2017 - 11:37:57), Ralink 5.0.0.1

Serial
------
The serial port needs a TTL/RS-232 3V3 level converter! The Serial
setting is 57600-8-N-1. The board has an unpopulated 2.54mm straight pin
header.

The pinout is: VCC (the square), RX, TX, GND.

Installation
------------
See the Wiki page [1] for more details, it comes down to:

1. Open the device, take off the heat sink
2. Connect the SPI flash chip to a flasher, e.g. a Raspberry Pi. Also
   connect the RESET pin for stability (thanks @FPSUsername for reporting)
3. Make a backup in case you want to revert to stock later
4. Flash the squashfs-factory.trx file to offset 0x50000 of the flash
5. Ensure the bootpartition variable is set to 0 in the U-Boot
   environment located at 0x30000

Note that the U-Boot is password protected, this can optionally be
removed. See the forum [2] for more details.

MAC Addresses(stock)
--------------------
+----------+------------------+-------------------+
| use      | address          | example           |
+----------+------------------+-------------------+
| Device   | label            | 00:00:00:11:00:00 |
| Ethernet | + 3              | 00:00:00:11:00:03 |
| 2g       | + 0x020000f00001 | 02:00:00:01:00:01 |
| 5g       | + 1              | 00:00:00:11:00:01 |
+----------+------------------+-------------------+

The label address is stored in ASCII in the board_data partition

Notes
-----
- This device has a dual-boot partition scheme, but OpenWRT will claim
  both partitions for more storage space.

Known issues
------------
- 2g MAC address does not match stock due to missing support for that in
  macaddr_add
- Only the power LED is configured by default

References
----------
[1] https://openwrt.org/inbox/toh/arcadyan/astoria/we420223-99
[2] https://forum.openwrt.org/t/adding-openwrt-support-for-arcadyan-we420223-99-kpn-experia-wifi/132653

Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Harm Berntsen <git@harmberntsen.nl>
2023-01-15 13:41:02 +01:00

220 lines
3.7 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Arcadyan WE420223-99";
compatible = "arcadyan,we420223-99", "mediatek,mt7621-soc";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_wps_green;
led-wifi = &led_wifi_green;
};
chosen {
bootargs = "console=ttyS0,57600 ubi.mtd=5 root=/dev/ubiblock0_0";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
default-state = "on";
};
led_power_red: power_red {
label = "red:power";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_FAULT;
};
led_wifi_blue: wifi_blue {
label = "blue:wifi";
gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
};
led_wifi_green: wifi_green {
label = "green:wifi";
gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
};
led_wps_red: wps_red {
label = "red:wps";
gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WPS;
};
led_wps_green: wps_green {
label = "green:wps";
gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WPS;
};
led_followme_r: followme_red {
label = "red:followme";
gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
};
led_followme_g: followme_green {
label = "green:followme";
gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <70000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "ALL";
reg = <0x0 0x2000000>;
read-only;
};
partition@1 {
label = "Bootloader";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "Config";
reg = <0x30000 0x10000>;
};
factory: partition@40000 {
label = "Factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "kernel";
reg = <0x50000 0x1f60000>;
};
partition@490000 {
label = "rootfs";
reg = <0x490000 0x1b20000>;
};
partition@1000000 {
label = "Kernel2";
reg = <0x1000000 0xfb0000>;
};
partition@1440000 {
label = "RootFS2";
reg = <0x1440000 0xb70000>;
};
partition@1fb0000 {
label = "glbcfg";
reg = <0x1fb0000 0x10000>;
read-only;
};
partition@1fc0000 {
label = "board_data";
reg = <0x1fc0000 0x10000>;
read-only;
};
partition@1fd0000 {
label = "glbcfg2";
reg = <0x1fd0000 0x10000>;
read-only;
};
partition@1fe0000 {
label = "board_data2";
reg = <0x1fe0000 0x10000>;
read-only;
};
};
};
};
&xhci {
status = "disabled";
};
&switch0 {
ports {
port@1 {
status = "okay";
label = "swp1";
};
};
};
&gmac1 {
status = "okay";
label = "swp0";
phy-handle = <&ethphy0>;
};
&mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};