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538a1d740c
The patches were generated from the RPi repo with the following command: git format-patch v6.6.58..rpi-6.6.y Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
112 lines
3.6 KiB
Diff
112 lines
3.6 KiB
Diff
From 6da70162dd1e729c04e2dc25472b39390868af79 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Fri, 20 Sep 2024 12:05:18 +0100
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Subject: [PATCH 1272/1350] drm: vc4: dsi: enable video and then retry failed
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transfers
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The DSI block appears to be able to come up stuck in a condition where
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it leaves the lanes in HS mode or just jabbering. This stops LP
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transfers from completing as there is no LP time available. This is
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signalled via the LP1 contention error.
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Enabling video briefly clears that condition, so if we detect the
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error condition, enable video mode and then retry.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_dsi.c | 54 +++++++++++++++++++++++++++++------
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1 file changed, 46 insertions(+), 8 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_dsi.c
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+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
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@@ -286,6 +286,8 @@
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DSI1_INT_PR_TO)
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#define DSI0_STAT 0x2c
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+# define DSI0_STAT_ERR_CONT_LP1 BIT(6)
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+# define DSI0_STAT_ERR_CONT_LP0 BIT(5)
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#define DSI0_HSTX_TO_CNT 0x30
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#define DSI0_LPRX_TO_CNT 0x34
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#define DSI0_TA_TO_CNT 0x38
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@@ -1203,10 +1205,9 @@ static int vc4_dsi_bridge_attach(struct
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&dsi->bridge, flags);
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}
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-static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
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- const struct mipi_dsi_msg *msg)
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+static ssize_t vc4_dsi_transfer(struct vc4_dsi *dsi,
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+ const struct mipi_dsi_msg *msg, bool log_error)
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{
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- struct vc4_dsi *dsi = host_to_dsi(host);
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struct mipi_dsi_packet packet;
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u32 pkth = 0, pktc = 0;
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int i, ret;
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@@ -1315,10 +1316,12 @@ static ssize_t vc4_dsi_host_transfer(str
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DSI_PORT_WRITE(TXPKT1C, pktc);
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if (!wait_for_completion_timeout(&dsi->xfer_completion,
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- msecs_to_jiffies(1000))) {
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- dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
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- dev_err(&dsi->pdev->dev, "instat: 0x%08x\n",
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- DSI_PORT_READ(INT_STAT));
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+ msecs_to_jiffies(500))) {
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+ if (log_error) {
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+ dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
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+ dev_err(&dsi->pdev->dev, "instat: 0x%08x, stat: 0x%08x\n",
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+ DSI_PORT_READ(INT_STAT), DSI_PORT_READ(INT_STAT));
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+ }
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ret = -ETIMEDOUT;
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} else {
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ret = dsi->xfer_result;
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@@ -1361,7 +1364,8 @@ static ssize_t vc4_dsi_host_transfer(str
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return ret;
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reset_fifo_and_return:
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- DRM_ERROR("DSI transfer failed, resetting: %d\n", ret);
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+ if (log_error)
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+ DRM_ERROR("DSI transfer failed, resetting: %d\n", ret);
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DSI_PORT_WRITE(TXPKT1C, DSI_PORT_READ(TXPKT1C) & ~DSI_TXPKT1C_CMD_EN);
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udelay(1);
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@@ -1374,6 +1378,40 @@ reset_fifo_and_return:
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return ret;
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}
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+static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
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+ const struct mipi_dsi_msg *msg)
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+{
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+ struct vc4_dsi *dsi = host_to_dsi(host);
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+ u32 stat, disp0_ctrl;
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+ int ret;
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+
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+ ret = vc4_dsi_transfer(dsi, msg, false);
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+
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+ if (ret == -ETIMEDOUT) {
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+ stat = DSI_PORT_READ(STAT);
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+ disp0_ctrl = DSI_PORT_READ(DISP0_CTRL);
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+
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+ DSI_PORT_WRITE(STAT, DSI_PORT_BIT(STAT_ERR_CONT_LP1));
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+ if (!(disp0_ctrl & DSI_DISP0_ENABLE)) {
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+ /* If video mode not enabled, then try recovering by
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+ * enabling it briefly to clear FIFOs and the state.
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+ */
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+ disp0_ctrl |= DSI_DISP0_ENABLE;
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+ DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
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+ msleep(30);
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+ disp0_ctrl &= ~DSI_DISP0_ENABLE;
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+ DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
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+ msleep(30);
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+
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+ ret = vc4_dsi_transfer(dsi, msg, true);
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+ } else {
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+ DRM_ERROR("DSI transfer failed whilst in HS mode stat: 0x%08x\n",
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+ stat);
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+ }
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+ }
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+ return ret;
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+}
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+
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static const struct component_ops vc4_dsi_ops;
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static int vc4_dsi_host_attach(struct mipi_dsi_host *host,
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struct mipi_dsi_device *device)
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