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d0d6b8e183
Due to the bug described here[1], remove the 300 MHz clock to avoid a low voltage condition that can cause a hang when rebooting the RT3200/E8450. This solution is probably better than the script-based work-around[2]. 1. https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490 2. https://github.com/openwrt/openwrt/pull/5025 Signed-off-by: John Audia <therealgraysky@proton.me> Tested-by: Rui Salvaterra <rsalvaterra@gmail.com> Tested-by: John Audia <therealgraysky@proton.me>
26 lines
763 B
Diff
26 lines
763 B
Diff
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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@@ -23,11 +23,17 @@
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cpu_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-shared;
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- opp-300000000 {
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- opp-hz = /bits/ 64 <300000000>;
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- opp-microvolt = <950000>;
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- };
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-
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+ /* Due to the bug described at the link below, remove the 300 MHz clock to avoid a low
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+ * voltage condition that can cause a hang when rebooting the RT3200/E8450.
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+ *
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+ * https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490
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+ *
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+ * opp-300000000 {
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+ * opp-hz = /bits/ 64 <300000000>;
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+ * opp-microvolt = <950000>;
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+ * };
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+ *
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+ */
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opp-437500000 {
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opp-hz = /bits/ 64 <437500000>;
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opp-microvolt = <1000000>;
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