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e504fdae4e
Add pending patches from Alexander 'lynxis' Couzens which are required for RealTek NBase-T PHYs or SFP+ cages to work when connected to the SGMII interface provided by recent MediaTek SoCs [1]. The patches for MT753x fix link speed limitation on CPU ports observed by many users which is due to reset being carried out wrongly [2]. [1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669488&state=* [2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669486&state=* Signed-off-by: Daniel Golle <daniel@makrotopia.org>
29 lines
932 B
Diff
29 lines
932 B
Diff
From 3fb8841513c4ec3a2e5d366df86230c45f239a57 Mon Sep 17 00:00:00 2001
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From: Alexander Couzens <lynxis@fe80.eu>
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Date: Sat, 13 Aug 2022 13:08:22 +0200
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Subject: [PATCH 03/10] net: mt7531: ensure all MACs are powered down before
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reset
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The datasheet [1] explicit describes it as requirement for a reset.
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[1] MT7531 Reference Manual for Development Board rev 1.0, page 735
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Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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---
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drivers/net/dsa/mt7530.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2324,6 +2324,10 @@ mt7531_setup(struct dsa_switch *ds)
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return -ENODEV;
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}
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+ /* all MACs must be forced link-down before sw reset */
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
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+
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/* Reset the switch through internal reset */
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mt7530_write(priv, MT7530_SYS_CTRL,
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SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
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