openwrt/target/linux/mediatek/dts/mt7981b-routerich-ax3000.dts
Mikhail Zhilkin d413163832 mediatek: Routerich AX3000: add OpenWrt U-Boot layout
This commit adds OpenWrt U-Boot layout support for Routerich AX3000. The
aims:
1. Get open-source U-Boot;
2. Get maximum available free space in OpenWrt.

Install
-------
1. Copy OpenWrt ubootmod-bl31-uboot.fip, ubootmod-preloader.bin, to the
   /tmp folder of the router using scp.

2. Make mtd partitions backups:
   http://192.168.1.1/cgi-bin/luci/admin/system/flash -> Save mtdblock
   contents

3. Install kmod-mtd-rw:
```
opkg update && opkg install kmod-mtd-rw
```

4. Write FIP and preloader:
```
insmod mtd-rw i_want_a_brick=1
mtd unlock BL2
mtd erase BL2
mtd write /tmp/ubootmod-preloader.bin BL2
mtd unlock FIP
mtd erase FIP
mtd write /tmp/ubootmod-bl31-uboot.fip FIP
```

5. Copy OpenWrt ubootmod-initramfs-recovery.itb to the tftp server root
   with IP 192.168.1.254.

6. Reboot router:
```
reboot
```
U-Boot will automatically download from the tftp server and boot OpenWrt
initramfs system.

7. Copy OpenWrt ubootmod-squashfs-sysupgrade.itb to the /tmp dir of the
   router using scp.

8. Run sysupgrade:
```
sysupgrade -n /tmp/squashfs-sysupgrade.itb
```

Recovery
--------
1. Place OpenWrt initramfs-recovery.itb image (with original name) on the
   tftp server (IP: 192.168.1.254).
2. Press "reset" button and power on the router. After ~10 sec release the
   button.
3. Use OpenWrt initramfs system for recovery.

BL2 and FIP recovery
--------------------
Use mtk_uartboot and UART connection if BL2 or FIP in UBI is destroyed:
Link: https://github.com/981213/mtk_uartboot

Return to stock:
----------------
1. Copy partition backups (BL2.bin and FIP.bin) to the /tmp dir of the
   router using scp.

2. Install kmod-mtd-rw:
```
opkg update && opkg install kmod-mtd-rw
```

3. Restore stock U-Boot and reboot:
```
insmod mtd-rw i_want_a_brick=1
mtd unlock BL2
mtd erase BL2
mtd write /tmp/BL2.bin BL2
mtd unlock FIP
mtd erase FIP
mtd write /tmp/FIP.bin FIP
reboot
```

4. Open U-Boot web recovery, upload stock firmware image and start
   upgrade.
Link: http://192.168.1.1

Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16791
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-11-24 23:41:02 +01:00

229 lines
3.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-only OR MIT
#include "mt7981b-routerich-ax3000-common.dtsi"
/ {
model = "Routerich AX3000";
compatible = "routerich,ax3000", "mediatek,mt7981";
};
&spi {
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
};
&partitions {
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x7000000>;
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 (-1)>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <0x1f>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
/* ESMT F50L1G41LB (128M) */
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0_all {
label = "spi0.0";
reg = <0x0 0x8000000>;
read-only;
};
partition@0 {
label = "BL2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x7000000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
wan: port@4 {
reg = <4>;
label = "wan";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 (-2)>;
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&usb_phy {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;
};
&xhci {
status = "okay";
mediatek,u3p-dis-msk = <0x1>;
};