Popular bpi-r3 pwm fans like this one
https://www.amazon.com/youyeetoo-Barebone-Fan-BPI-R3-Integrated/dp/B0CCCTY8PS
will not work properly with current openwrt-23.05/24.10 firmware.
Trying different pwm setting
echo $value > /sys/devices/platform/pwm-fan/hwmon/hwmon1/pwm1
I found:
pwm1 value fan rotation speed cpu temperature notes
-----------------------------------------------------------------
0 maximal 31.5 Celsius too noisy
40 optimal 35.2 Celsius no noise hearable
95 minimal
above 95 does not rotate 55.5 Celsius
-----------------------------------------------------------------
At the moment we have following cooling levels:
cooling-levels = <255 96 0>;
for cpu-active-high, cpu-active-medium and cpu-active-low modes correspondingly.
Thus only cpu-active-high and cpu-active-low are usable. I think this is wrong.
This patch fixes cpu-active-medium settings for bpi-r3 board.
PS: I know, the patch is not ideal as it can break pwm fan for some users.
There are some peoples that use handmade cooling solutions, but:
* discussed cooler is the only 'official' pwm cooler for bpi-r3
available on the market.
* most peoples will use passive cooling available on the market or
the discussed cooler.
* the pwm-fan dts section was added before the official cooler
appears on the market.
Thus it should not be a lot of harm from this fix.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16974
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 3467ea905b)
Link: https://github.com/openwrt/openwrt/pull/17097
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The partition parser approach has been rejected upstream, it will be
replaced by a small block driver which is the solution suggestion by
upstream maintainers.
As the partition parser has only been used by the mediatek target, as
a first step, move it there.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* fix switch ports with modes other than 1000M/Full
* set 32-bit dma_coherent_mask to get PPE to work with 4 GiB of RAM
* sync driver for built-in 1GE PHY with MediaTek SDK sources
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport merged upstream patch that adds support for firmware loader
from NVMEM or attached filesystem for Aquantia PHYs.
Refresh all kernel patches affected by this change.
Also update the path for aquantia .ko that got moved to dedicated
directory upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
[rmilecki: port to 5.15]
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
The WLAN + WED reset sequence relies on being able to receive interrupts from
the card, in order to synchronize individual steps with the firmware.
When WED is stopped, leave interrupts running and rely on the driver turning
off unwanted ones.
WED DMA also needs to be disabled before resetting.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Pick commits adding drivers for audio engine found in MT7986 from
Linux 6.6 as well as follow-up fixes from Linux 6.7.
Signed-off-by: Maso Huang <maso.huang@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import driver for I2C-connected HolTek MCU controlling the RGBW LED
found in Adtran SmartRG devices.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add downstream DT property to setup the PHY LEDs of the MaxLinear
GPY211 PHY in such way that the VDD of the LED is driven by the SoC
pin rather than the GND (which is the default).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The driver for MediaTek gen3 PCIe hosts de-asserts all reset
signals at the same time using a single register write operation.
Delay the de-assertion of the #PERST signal by 100ms as some PCIe
devices fail to come up otherwise.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import commits from upstream Linux replacing some downstream patches.
Move accepted patches from pending-{5.15,6.1} to backport-{5.15,6.1}.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Using the I2C host controller on the MT7981 SoC requires 4 clocks to
be enabled. One of them, the pmic clk, is only enabled in case
'mediatek,have-pmic' is also set which has other consequences which
are not desired in this case.
Allow defining a pmic clk even in case the 'mediatek,have-pmic' propterty
is not present and the bus is not used to connect to a pmic, but may
still require to enable the pmic clock.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Unfortunately some device tree properties have slipped under the table
when switching from our downstream device tree.
Bring back 3W power for SFP cages and restore thermal trip points to
make sense again.
Fixes: 7a0ec001ff ("mediatek: sync MT7986 device trees with upstream")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport initial LEDs hw control support. Currently this is limited to
only rx/tx and link events for the netdev trigger but the API got
accepted and the additional modes are working on and will be backported
later.
Refresh every patch and add the additional config flag for QCA8K new
LEDs support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Sync device tree files for MT7986 boards with what landed in upstream
Linux tree to easy maintainance and also allow for a smooth update to
Linux 6.1.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
PCK and MCK should really be P=PMIC and M=MEM, which means that they
should effectively be CLK_PMIC and CLK_ARB.
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The USXGMII driver in SDK was heavily refactored, some bugs have been
fixed and it has switched to use phylink_pcs. Follow up with changes
in SDK driver and sync our on-top-of-mainline driver with the SDK
driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Pick accepted patches from upstream Linux tree instead of having to
maintain our slightly different downstream patches.
Import pending patch fixing I2C on MT7981 by making sure all clocks
are enabled before accessing I2C registers.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The Richtek RT5190A is used on the MT7988 reference board. Backport and
enable the driver on the filogic subtarget, so we can support cpufreq
on the MT7988 reference board.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC.
To function the PHY also needs firmware files which have not yet been
published via linux-firmware.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be
found in the MT7981 and MT7988 SoCs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
In order to support Ethernet on the MT7988 SoC add support for NETSYS v3
as well as new paths and USXGMII SerDes to the mtk_eth_soc driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This adds provisional pinctrl driver support for the MediaTek MT7988 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This adds clock drivers for the MediaTek MT7988 SoC
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Manually adjusted before running quilt due to new location in tree:
backport-5.15/780-v5.16-bus-mhi-pci_generic-Introduce-Sierra-EM919X-support.patch
backport-5.15/781-v6.1-bus-mhi-host-always-print-detected-modem-name.patch
pending-5.15/790-bus-mhi-core-add-SBL-state-callback.patch
All other patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Signed-off-by: John Audia <therealgraysky@proton.me>
