Commit Graph

23 Commits

Author SHA1 Message Date
Markus Stockhausen
65964c42f8 realtek: align kernel config with upstream
Since the start of the Realtek target OpenWrt works with RTL83XX as the
target architecture. Upstream is using MACH_REALTEK_RTL instead. To
simplify further development align that.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16963
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-11-16 18:02:18 +01:00
Rosen Penev
1125ed408c realtek: rtl83xx: use devm for mutex_init
mutex_destroy is missing in remove.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16926
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-11-12 11:19:52 +01:00
Markus Stockhausen
945a335f66 realtek: ethernet: Improve SMI polling configuration based on DTS
Although Zyxel XGS1210 devices are not yet officially supported there
are several patches floating around to enable them. This is a very imporant
one because it fixes a SMI misconfiguration. In the known DTS the SFP+
port settings are set as follows.

  phy26: ethernet-phy@26 {
    compatible = "ethernet-phy-ieee802.3-c45";
    phy-is-integrated;
    reg = <26>;
    sds = < 8 >;
  };

  phy27: ethernet-phy@27 {
    compatible = "ethernet-phy-ieee802.3-c45";
    phy-is-integrated;
    reg = <27>;
    sds = < 9 >;
  };

So these are PHYs linked to an internal SerDes. During initialization
rtl838x_mdio_init() generates smi_bus=0 & smi_addr=27/28 for these ports.
Although this seems like a valid configuration integrated PHYs attached
to an SerDes do not have an SMI bus. Later on the mdio reset wrongly feeds
the SMI registers and as a result the PHYs on SMI bus 0 do not work.

Without patch (loaded with rtk network on & initramfs):

...
mdio_bus mdio-bus: MDIO device at address 0 is missing.
mdio_bus mdio-bus: MDIO device at address 1 is missing.
mdio_bus mdio-bus: MDIO device at address 2 is missing.
mdio_bus mdio-bus: MDIO device at address 3 is missing.
mdio_bus mdio-bus: MDIO device at address 4 is missing.
mdio_bus mdio-bus: MDIO device at address 5 is missing.
mdio_bus mdio-bus: MDIO device at address 6 is missing.
mdio_bus mdio-bus: MDIO device at address 7 is missing.
...
rtl83xx-switch ... : no phy at 0
rtl83xx-switch ... : failed to connect to PHY: -ENODEV
rtl83xx-switch ... : error -19 setting up PHY for tree 0, switch 0, port 0
rtl83xx-switch ... : no phy at 1
rtl83xx-switch ... : failed to connect to PHY: -ENODEV
rtl83xx-switch ... : error -19 setting up PHY for tree 0, switch 0, port 1
...

With patch (loaded with rtk network on & initramfs):

...
rtl83xx-switch ... : PHY [mdio-bus:00] driver [REALTEK RTL8218D] (irq=POLL)
rtl83xx-switch ... : PHY [mdio-bus:01] driver [REALTEK RTL8218D] (irq=POLL)
...

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16457
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-10-27 22:26:25 +01:00
Markus Stockhausen
8f68e1abe5 realtek: phy: fix RTL8218D detection
Currently RTL8218D detection works for a range of devices. That can lead to
false positives. E.g. RTL8218B or RTL8214FC are covered by the detection mask
as well. That is wrong. Nail detection down to the real RTL8218D phy id.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16457
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-10-27 22:26:25 +01:00
Markus Stockhausen
0ed688a4d9 realtek: phy: simplify RTL8214C detection
The detection of the RTL8214C is a little complicated. Make it easier.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16457
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-10-27 22:26:25 +01:00
Markus Stockhausen
597f87ebf5 realtek: phy: proper RTL8218B, RTL8214FC, RTL8214FB detection
Three PHYs share the same identifier. Until now we simply assume
the type depending of the bus address it is attached to. Make it
better and check the chip mode register instead.

The kernel will either detect by id/mask or by match_phy_device().
Remove the unneeded settings.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16457
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-10-27 22:26:25 +01:00
Markus Stockhausen
d607dc2a06 realtek: phy: adapt raw page for RTL839X
The number of phy pages differ between RTL838X and RTL839X. Make that
clear and adapt the existing defines.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16457
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-10-27 22:26:25 +01:00
Markus Stockhausen
8e4597297d realtek: dsa: increase RTL839x max phy page to 8191
According to the specs the RTL839x provides up to 8192 phy pages.
Especially the "raw" page 8191 is used for different initialization
tasks. Increase the limit.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16457
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-10-27 22:26:25 +01:00
Markus Stockhausen
a200f0cee7 realtek: dsa: allow USXGMII mode
RTL930x devices need the USXGMII mode. This is a final leftover
from the 6.6 conversion.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16457
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-10-27 22:26:25 +01:00
Rosen Penev
96fa9ee3da realtek: use more devm
Simplifies probe slightly.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16650
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-10-19 23:01:54 +02:00
Peter Körner
0ba2e0868e rtl83xx: fix typo
Removes an unwanted special character in a debug-message.

Signed-off-by: Peter Körner <peter@mazdermind.de>
2024-10-13 20:48:51 +03:00
Markus Stockhausen
93881ec190 realtek: 6.6: MDIO post fixes
Merging of the realtek 6.6 series forgot to include some final fixes
for the new MDIO driver. What was changed in last second?

1. The MDIO driver used wrong constants to make use of the raw
page (for direct register access). Provide a rawpage variable in
the bus private structure, populate it during initialization and
make use of it at the proper places

2. We always used the variable portaddr for the bus index. Usually
our driver uses either addr or port for the same meaning. Remove the
duplication and reuse the normal addr variable.

3. Drop functions rtmdio_write_page() and rtmdio_read_page(). These
only call the PHY driver read/write page functions. We know that
these will only access page 0x1f. As we have only Realtek PHYs
and our driver only reacts to this special page, just hardcode it.
Benefit is that we can use these functions for PHY detection when
read/write page functions are not yet assigned.

4. Add two new helper functions phy_port_read_paged() and
phy_port_write_paged(). These allow to access arbitrary ports on
the MDIO bus when the packages are not initialized. These will be
needed for proper RTL8218B and RTL8214FC detection in forthcoming
patches.

5. The port tracking wrongly used index 0 to mark "normal" access.
This does not allow to make a "special" access to port 0. Use
index -1 to mark "normal" access.

Provide the fix for 5.15 and 6.6 to allow for easy version
comparison.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16391
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-09-16 10:33:28 +02:00
Markus Stockhausen
9272d99195 realtek: 6.6: Support XGMII attached PHYs
On the XGS1210-12 the RTL8218D is attached via XGMII. Add this to the
supported list in the DSA driver.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16391
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-09-16 10:33:28 +02:00
Markus Stockhausen
a22d359fa5 realtek: 6.6: fix VLAN handling
The CPU port of realtek switches needs some proper PVID set to handle
untagged packets. Because the ethernet driver does no special VLAN
handling (see CPU tag RVID/RVID_SEL) as of now we can only steer
untagged packets by setting PVID for the CPU port. VLAN handling has
never been perfect but 3 events made things worse.

- Commit a376508216 ("rtl83xx: dsa: Do nothing when vid 0")
- Commit e691e2b302 ("rtl83xx: dsa: reset PVID to 1 instead of 0")
- Upgrade to kernel 6.6

Reasons are:

- Rejecting VID 0 disabled Linux initialization routines
- Initialization for PVID forgot to set priv->ports[port].pvid
- Kernel 6.6 does no longer clarify CPU port as untagged

To fix this prepare the VID 0 setup inside the driver. Join all ports
to VID 0 and let no one from outsinde interfere with this setup.
Especially ignore PVID settings for the CPU port for all further
VLAN commands.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Suggested-by: Bjørn Mork <bjorn@mork.no>
2024-09-14 20:14:47 +02:00
Markus Stockhausen
cd958d945b realtek: 6.6: refactor mac config and link up for RTL83xx
Since kernel commit c5714f68a76bcad3d ("net: phylink: explicitly invalidate
link_state members in mac_config") it should be clear that link data can
only be used in mac_link_up(). Refactor that for the RTL83xx targets.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 20:08:57 +02:00
Markus Stockhausen
9f8570b0dd realtek: 6.6: set phylink supported_interfaces
The supported_interfaces bitmap cannot be empty since mainline kernel
commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
be filled"). Fix the dsa and ethernet driver accordingly.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 20:08:41 +02:00
Markus Stockhausen
3772cc7ebe realtek: 6.6: adapt message to 64 bit variable
used_keys has been changed from 32 to 64 bits.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 20:08:41 +02:00
Markus Stockhausen
86deef6158 realtek: 6.6: change to current dsa structures
The DSA framework has changed a bit since 6.1, lets adapt to match.
Currently there is no one-patch-fits-all solution to directly fix
all errors up to 6.6. So cover the final differences with this
second patch.

Most notable upstream changes are:
  - a88dd7538461 ("net: dsa: remove legacy_pre_march2020 detection")
  - 53d04b981110 ("net: dsa: remove phylink_validate() method")

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[Minor checkpatch.pl cleanups]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2024-09-14 20:08:24 +02:00
Markus Stockhausen
94f8eedfd9 realtek: 6.6: change to 6.1 dsa structures
The DSA framework has changed a bit since 5.15, lets adapt to match.
Currently there is no one-patch-fits-all solution to directly fix
all errors up to 6.6. So at least take all the already known changes
that cover differences between 5.15 and 6.1

Most notable upstream changes are:
  - d3eed0e57d5d ("net: dsa: keep the bridge_dev and bridge_num as part
    of the same structure")
    Update of port_bridge_{join,leave}: use same helper as upstream
  - c26933639b54 ("net: dsa: request drivers to perform FDB isolation")
    Update of port_fdb_{add,del}, port_mdb_{add,del}
  - dedd6a009f41 ("net: dsa: create a dsa_lag structure")
    Update of port_lag_{join,leave}

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
[align updates with upstream, add references to upstream commits]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 20:02:52 +02:00
Markus Stockhausen
7435f2cd5a realtek: 6.6: convert ethernet driver to phylink_pcs_ops
A lot of stuff has been converted to the phylink_pcs_ops structure.
Adapt the ethernet driver to make use of it.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 20:02:52 +02:00
Markus Stockhausen
211925d054 realtek: 6.6: drop netif_napi_add weight
We no longer are required to pass the weight to netif_napi_add.

See commit b48b89f9c189 ("net: drop the weight argument from netif_napi_add").

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 20:00:22 +02:00
Markus Stockhausen
a5420c22b7 realtek: 6.6: rework mdio bus driver
This is not a surprise. Before upgrade to 6.6 we refactored the mdio part of
the ethernet driver and knew that changes will come. Drop all unnecessary
stuff from the old world and adapt to the new kernel.

- remove legacy functions
- directly link new functions
- adapt to new shared base address
- remove references to old MDIO bus capabilities

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 19:59:48 +02:00
Markus Stockhausen
325d79f0f9 realtek: 6.6: copy files and config from 5.15
Copy files and config from 5.15 kernel version. Because of the big version jump
leave out the patches for now so we can treat them individually later on.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 19:58:54 +02:00