The target was disabled since noone did the DSA conversion. Add the
conversion and enable it again.
Tested-by: John Walshaw <jjw@myself.com>
Signed-off-by: Bjoern Dobe <bjoern@dobecom.de>
Signed-off-by: Nick Hainke <vincent@systemli.org>
This patch enables USB support for the GL.iNet GL-A1300
Repair the usb driver startup phase is not loaded
Signed-off-by: Weiping Yang <weiping.yang@gl-inet.com>
The Mikrotik wAP R AC is an outdoor, dual band, dual radio (802.11ac) AP
with a miniPCIe slot for a LTE modem.
The wAP R AC is similar to the wAP AC but with the miniPCIe slot.
The wAP R AC requires installing a LTE modem.
The wAP LTE and wAP LTE6 comes with a LTE modem installed.
See https://mikrotik.com/product/wap_r_ac for more info.
Specifications:
- SoC: Qualcomm Atheros IPQ4018
- CPU: 4x ARM Cortex A7
- RAM: 128MB
- Storage: 16MB NOR flash
- Wireless:
- Built-in IPQ4018 (SoC) 802.11b/g/n 2x2:2, internal antenna
- Built-in IPQ4018 (SoC) 802.11a/n/ac 2x2:2, internal antenna
- Ethernet: Built-in IPQ4018 (SoC, QCA8075) , 2x 1000/100/10 ports
one with 802.3af/at PoE in
- 1x Mini PCI-E port (USB2)
Installation:
Boot the initramfs image via TFTP, then flash the sysupgrade image using
sysupgrade. Details at https://openwrt.org/toh/mikrotik/common.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
The type of those images is already distinguishable by the '.itb'
extension, there is no need for an additional '-fit' string in the
filenames. Remove it to behave more like other targets.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Only on the ipq40xx subtarget different filenames were used for NAND-
based devices. This is unneeded, confusing and breaks downstream tools
such as luci-app-attendedsysupgrade and auc.
Remove the 'nand-' string from image filenames to fix that.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Remove ess-psgmii@98000, edma@c080000 and ess-switch@c000000 nodes.
These nodes are not used after the DSA conversion, but were left over
in a few devices added recently.
ZTE MF289F is omitted on purpose, as for it, these nodes will be removed
together with DSA conversion.
Build tested only, as I only have MF286D from those devices.
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ethernet1:
- physical port label "Ethernet 1"
- its mac address is printed on the device label
* ethernet2:
- physical port label "Ethernet 2"
- can be used to power the device
Both ports are not marked by there role (because the vendor firmware
automatically detects roles) but the "Ethernet 2" port was used in the past
for "WAN" functionality in OpenWrt.
Tested-by: Michaël BILCOT <michael.bilcot@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
The calibration data and mac addresses on this device are stored in the
0:ART partition. It is therefore possible to move the code to handle them
directly to the devicetree instead of the various scripts.
But the actual relevant information about the partition layout is provided
by the bootloader via bootargs (mtdparts) and not via the devicetree
itself. Instead of using a fixed-partition template, the mtd dynamic
partitions support from the upstream kernel is used.
Reported-by: Robert Marko <robert.marko@sartura.hr>
Tested-by: Michaël BILCOT <michael.bilcot@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
* ethernet1:
- physical port label "Ethernet 1"
- its mac address is printed on the device label
* ethernet2:
- physical port label "Ethernet 2"
- can be used to power the device
Both ports are not marked by there role (because the vendor firmware
automatically detects roles) but the "Ethernet 2" port was used in the past
for "WAN" functionality in OpenWrt.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
The calibration data and mac addresses on this device are stored in the
0:ART partition. It is therefore possible to move the code to handle them
directly to the devicetree instead of the various scripts.
But the actual relevant information about the partition layout is provided
by the bootloader via bootargs (mtdparts) and not via the devicetree
itself. Instead of using a fixed-partition template, the mtd dynamic
partitions support from the upstream kernel is used.
Reported-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
The calibration data and mac addresses on this device are stored in the
0:ART partition. It is therefore possible to move the code to handle them
directly to the devicetree instead of the various scripts.
But the actual relevant information about the partition layout is provided
by the bootloader via bootargs (mtdparts) and not via the devicetree
itself. Instead of using a fixed-partition template, the mtd dynamic
partitions support from the upstream kernel is used.
Reported-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Tested-by: Michaël BILCOT <michael.bilcot@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
The calibration data and mac addresses on this device are stored in the
0:ART partition. It is therefore possible to move the code to handle them
directly to the devicetree instead of the various scripts.
But the actual relevant information about the partition layout is provided
by the bootloader via bootargs (mtdparts) and not via the devicetree
itself. Instead of using a fixed-partition template, the mtd dynamic
partitions support from the upstream kernel is used.
Reported-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
* ethernet1:
- physical port label "Ethernet 1"
- can be used to power the device
- its mac address is printed on the device label
* ethernet2:
- physical port label "Ethernet 2"
Both ports are not marked by there role (because the vendor firmware
automatically detects roles) but the "Ethernet 1" port was used in the past
for "WAN" functionality in OpenWrt.
Reviewed-by: Robert Marko <robimarko@gmail.com>
Tested-by: Michaël BILCOT <michael.bilcot@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
* ethernet1:
- physical port label "Ethernet 1"
- can be used to power the device
- its mac address is printed on the device label
* ethernet2:
- physical port label "Ethernet 2"
Both ports are not marked by there role (because the vendor firmware
automatically detects roles) but the "Ethernet 1" port was used in the past
for "WAN" functionality in OpenWrt.
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Reenable D-Link DAP-2610, convert it to DSA and label port to 'lan', as shown on the case
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Guillaume Lefebvre <guillaume@zelig.ch>
Specifications:
SOC: Qualcomm IPQ4018 (DAKOTA) ARM Quad-Core
RAM: 256 MiB
FLASH1: 4 MiB NOR
FLASH2: 128 MiB NAND
ETH: Qualcomm QCA8075
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11b/g/n 2x2
WLAN2: Qualcomm Atheros QCA4018 5G 802.11n/ac W2 2x2
USB: 1 x USB 3.0 port
Button: 1 x Reset button
Switch: 1 x Mode switch
LED: 1 x Blue LED + 1 x White LED
Install via uboot tftp or uboot web failsafe.
By uboot tftp:
(IPQ40xx) # tftpboot 0x84000000 openwrt-ipq40xx-generic-glinet_gl-a1300-squashfs-nand-factory.ubi
(IPQ40xx) # nand erase 0 0x8000000
(IPQ40xx) # nand write 0x84000000 0 $filesize
By uboot web failsafe:
Push the reset button for 10 seconds util the power led flash faster,
then use broswer to access http://192.168.1.1
Afterwards upgrade can use sysupgrade image.
Signed-off-by: Weiping Yang <weiping.yang@gl-inet.com>
This adds support for the MikroTik RouterBOARD RBD53GR-5HacD2HnD
(hAP ac³ LTE6 kit), an indoor dual band, dual-radio 802.11ac
wireless AP with built-in Mini PCI-E LTE modem, one USB port, five
10/100/1000 Mbps Ethernet ports.
See https://mikrotik.com/product/hap_ac3_lte6_kit for more info.
Specifications:
- SoC: Qualcomm Atheros IPQ4019
- RAM: 256 MB
- Storage: 16 MB NOR
- Wireless:
· Built-in IPQ4019 (SoC) 802.11b/g/n 2x2:2, 3 dBi internal antennae
· Built-in IPQ4019 (SoC) 802.11a/n/ac 2x2:2, 5.5 dBi internal antennae
- Ethernet: Built-in IPQ4019 (SoC, QCA8075) , 5x 1000/100/10 port
- 1x USB Type A port
- 1x Mini PCI-E port (supporting USB)
- 1x Mini PCI-E LTE modem (MikroTik R11e-LTE6, Cat.6)
Installation:
Make sure your unit is runnning RouterOS v6 and RouterBOOT v6 (tested on 6.49.6).
0. Export your MikroTik license key (in case you want to use the device with RouterOS later)
1. Boot the initramfs image via TFTP
2. Upload the "openwrt-ipq40xx-mikrotik-mikrotik_hap-ac3-lte6-kit-squashfs-sysupgrade.bin" via SCP to the /tmp folder
3. Use sysupgrade to flash the image: sysupgrade -n /tmp/openwrt-ipq40xx-mikrotik-mikrotik_hap-ac3-lte6-kit-squashfs-sysupgrade.bin
4. Recovery to factory software is possible via Netinstall:
https://help.mikrotik.com/docs/display/ROS/Netinstall
Signed-off-by: Csaba Sipos <metro4@freemail.hu>
Manually rebased:
bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
All patches automatically rebased.
Signed-off-by: John Audia <therealgraysky@proton.me>
[Move gro_skip in 680-NET-skip-GRO-for-foreign-MAC-addresses.patch to old position]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Undo parts of these:
116feb4a1c ipq40xx: remove non-converted network configs
db19efee95 ipq40xx: disable boards not converted to DSA
Reintroduce the DT paths /soc/edma@c080000/gmac{0,1}, because the stock
bootloader has memorized them (instead of following aliases); then plug
the MAC address back in via 05_set_iface_mac_ipq40xx.sh, since the
'local-mac-address' property is no longer in the correct node.
Cc: David Bauer <mail@david-bauer.net>
Cc: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Convert to DSA and enable the MobiPromo CM520-79F device again.
Signed-off-by: Jack Chen <redchenjs@live.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
This convert board asus,rt-ac42u to DSA and re-enable it
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
As done previously, this preserves the MAC addresses of they physical
Ethernet ports. The interfaces are renamed as eth0 is in use for the
native GMAC; the new interface naming matches the physical port labels.
- sw-eth1 corresponds to the physical port labeled ETH1 and has the
base MAC address. This port can be used to power the device.
- sw-eth2 corresponds to the physical port labeled ETH2 and has a MAC
address one greater than the base.
As this device has 2 physical ports, they are each connected to their
respective PHYs, allowing the link status to be visible to software.
Since they are not marked on the case with any role (such as LAN or
WAN), both are bridged to the lan network by default, although this can
easily be changed if needed.
Signed-off-by: Mark Mentovai <mark@mentovai.com>
Change GPIO from 10 to 35 to make it works as expected
Fixes: 0de6a3339f ("ipq40xx: Add ZTE MF289F")
Signed-off-by: Giammarco Marzano <stich86@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
This patch converts networking on Sony NCP-HG100/Cellular to DSA and
re-enables support for the device.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Convert ZTE MF289F device to DSA, re-order network ports to match the
labels on the case and re-enable the device.
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Lech Perczak <lech.perczak@gmail.com>
Convert pakedge_wr-1 device to DSA and enable it.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>i
[ improve commit description ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Convert luma_wrtq-329acn device to DSA and enable it.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
[ improve commit description ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
When testing the DSA changes with 5.15.60 kernel, I've noticed, that the
MAC addresses are not properly configured, there is single MAC being
used for LAN and WAN interfaces:
eth0: 94:83:c4:XX:YY:4a (MAC on sticker)
lan1@eth0: 94:83:c4:XX:YY:4a
lan2@eth0: 94:83:c4:XX:YY:4a
wan@eth0: 94:83:c4:XX:YY:4a
wlan0: 94:83:c4:XX:YY:4a
wlan1: 94:83:c4:XX:YY:4b
The same config, prior to the DSA conversion:
lan/eth0: 94:83:c4:XX:YY:4a (MAC on sticker)
wan/eth1: 94:83:c4:XX:YY:4b
wlan0: 94:83:c4:XX:YY:4a
wlan1: 94:83:c4:XX:YY:4b
Settings in ART partition:
root@OpenWrt:/# hexdump -C /dev/mtd7 | grep '94 83'
00000000 94 83 c4 XX YY 4a 94 83 c4 0e YY 4b ff ff ff ff |.....J.....K....|
00001000 20 2f 8d 8c 01 01 94 83 c4 XX YY 4a 00 00 20 00 | /.........J.. .|
00005000 20 2f 5a 3a 01 01 94 83 c4 XX YY 4b 00 00 20 00 | /Z:.......K.. .|
So let's fix it by keeping same MAC address assigment as was done before
DSA conversion and while at it, define `label-mac-device` as well.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Remove networking configs for non DSA converted boards in ipq40xx.
Currently, they are just causing clutter.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Enable threaded NAPI by default in IPQESS driver as it significantly
improves network perfromance, in my testing about 100+ Mbps in WAN-LAN
routing.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This fixes assigning random MAC to br-lan interface upon boot.
While at that, rename at24@50 node to eeprom@50, to align with upstream
device tree style.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Convert IPQ40xx boards to DSA setup.
Signed-off-by: Leon M. George <leon@georgemail.eu>
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Signed-off-by: Nick Hainke <vincent@systemli.org>
Signed-off-by: ChunAm See <z1250747241@gmail.com>
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
Signed-off-by: Andrew Sim <andrewsimz@gmail.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Serhii and others have experienced PSGMII link degradation up to point
that it actually does not pass packets at all or packets arrive as zeros.
This usually happened after a couple of hot reboots.
Serhii has managed to track it down to PSGMII calibration not being done
properly and has fixed it, so all of the code is Serhii-s work.
Signed-off-by: Serhii Serhieiev <adron@mstnt.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since kernel 5.4 has been droppped from IPQ40xx, there is no need to keep
the version checks for kernels older than 5.10.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Currently, suspend and resume ops are not present, this means that if user
disables a DSA interface that the PHY-s remain alive and the link is up.
Fix it by using generic PHY suspend and resume ops.
Signed-off-by: Serhii Serhieiev <adron@mstnt.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Select the Ethernet driver, DSA tag driver and the DSA driver itself to
be built in the kernel config.
They automatically pull in switchdev and phylink.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Qualcomm IPQ40xx SoC-s have a variant of QCA8337N switch built-in.
It shares most of the stuff with its external counterpart, however it is
modified for the SoC.
Namely, it doesn't have second CPU port (Port 6), so it has 6 ports
instead of 7.
It also has no built-in PHY-s but rather requires external PSGMII based
companion PHY-s (QCA8072 and QCA8075) for which it first needs to carry
out calibration before using them.
PSGMII has a SoC built-in PHY that is used to connect to the PHY-s which
unfortunately requires some magic values as the datasheet doesnt document
the bits that are being set or the register at all.
Since its built-in it is MMIO like other peripherals and doesn't have its
own MDIO bus but depends on the SoC provided one.
CPU connection is at Port 0 and it uses some kind of a internal connection
and no traditional RGMII/SGMII.
It also doesn't use in-band tagging like other qca8k switches so a shinfo
based tagger is used.
This is based on the current OpenWrt qca8k version that has been imported
from generic target.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This is just importing the qca8k driver from the generic target.
It will be used as the based for IPQ40xx version, this is just
to be able to see the diff.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
PSGMII is a Qualcomm specific mode similar to QSGMII but it has 5 SGMII
lines instead of 4 in QSGMII.
This just adds the support for the PHY layer to be able to identify the
mode for further use.
It is required for the DSA driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
IPQESS is the EDMA replacement driver for the IPQ40xx SoC built-in
ethernet controller.
Unlike EDMA it is Phylink based and doesnt touch PHY-s directly.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
There is no point in using a DT property to trigger setting the PSGMII
PHY AZ transmitting ability.
Especially since EEE can be disabled using ethtool anyway.
Fixup the mask for setting the workaround as only BIT(0) is actually being
changed and use the phy_clear_bits_mmd helper instead of reading, then
clearing the bit and writing back as it does everything for us.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
IPQ40xx requires a special DSA tag driver despite using the QCA8337N
switch.
However they have changed the header format and the existing QCA tag
driver cannot be reused.
For details on how it actually works and else read the patch commit
description.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Currently, QCA807x doesnt do any kind of validation to see whether it
actually supports the inserted module.
So lets add checks to allow only 1000BaseX and 100BaseFX based modules.
While adding validation, move fiber configuration to insert/remove events
instead of always doing it at config time.
This allows getting rid of the DT property for fiber enable and now only
the upstream sfp phandle is required.
Since we are refactoring fiber related code, lets heavily simplify the
status polling as the current logic is overcomplicated due to previous
wish to support non standard SFP cages that dont have pins properly
connected, that is removed now and only proper SFP cages will work.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
