All definitions of gpio in SoC DTSI files do not set status, i.e.
have it enabled. This drops all remaining redundant "status = okay"
definitions in descendent files (mostly older ones).
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
In ath79, for several SoCs the console bootargs are defined to the
very same value in every device's DTS. Consolidate these definitions
in the SoC dtsi files and drop further redundant definitions elsewhere.
The only device without any bootargs set has been OpenMesh OM5P-AC V2.
This will now inherit the setting from qca955x.dtsi
Note that while this tidies up master a lot, it might develop into a
frequent pitfall for backports.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch is based on #1689 and adds support for TP-Link Archer
C6 v2 (US) and A6 (US/TW).
The hardware is the same as EU and RU variant, except for GPIOs
(LEDS/Buttons), flash(chip/partitions) and UART being available
on the board.
- SOC: Qualcomm QCA9563 @ 775MHz
- Flash: GigaDevice GD25Q127CS1G (16MiB)
- RAM: Zentel A3R1GE40JBF (128 MiB DDR2)
- Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) QCA9563 integrated (3x3)
- 5GHz (ac) Qualcomm QCA9886 (2x2)
- Button: 1x power, 1x reset, 1x wps
- LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps
- UART: 115200, 8n1 (header available on board)
Known issues:
- Wireless: 5GHz is known to have lower RSSI signal, it affects speed and range.
Flash instructions:
Upload openwrt-ath79-generic-tplink_archer-c6-v2-us-squashfs-factory.bin
via the router Web interface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the router
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the
tftp root directory renamed to ArcherA6v2_tp_recovery.bin.
4. Connect power cable to router, press and hold the
reset button and turn the router on
5. Keep the reset button pressed until the WPS LED lights up
6. Wait ~150 seconds to complete flashing
Flash partitioning: I've followed #1689 for defining the partition layout
for this patch. The partition named as "tplink" @ 0xfd0000 is marked
as read only as it is where some config for stock firmware are stored.
On stock firmware those stock partitions starts at 0xfd9400 however
I had not been able to make it functional starting on the same address as
on stock fw, so it has been partitioned following #1689 and not the stock
partition layout for this specific partition. Due to that firmware/rootfs
partition lenght is 0xf80000 and not 0xf89400 as stock.
According to the GPL code, the EU/RU/JP variant does have different GPIO pins
assignment to LEDs and buttons, also the flash memory layout is different.
GPL Source Code: https://static.tp-link.com/resources/gpl/gpl-A6v2_us.tar.gz
Signed-off-by: Anderson Vulczak <andi@andi.com.br>
[wrap commit message, remove soft_ver change for C6 v2 EU, move LED aliases
to DTS files, remove dts-v1 in DTSI, node/property reorder in DTSI]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This applies several style adjustments that have been requested in
recent reviews to older DTS files. Despite making the code base more
consistent, this will also help to reduce review time when DTSes
are copy/pasted.
Applied changes:
- Rename gpio-keys/gpio-leds to keys/leds
- Remove node labels that are not used
- Use label property for partitions
- Prefix led node labels with "led_"
- Remove redundant includes
- Harmonize new lines after status property
- Several smaller style fixes
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This patch adds the label MAC address for several devices in
ath79.
Some devices require setting the MAC address in 02_network:
For the following devices, the netif device can be linked in
device tree, but the MAC address cannot be read:
- alfa-network,ap121f
- avm,fritz300e
- ubnt-xm devices
For the following devices, label MAC address is tied to lan or
wan, so no node to link to exists in device tree:
- adtran,bsap1800-v2
- adtran,bsap1840
- dlink,dir-842-c1/-c2/-c3
- engenius,ecb1750
- iodata,etg3-r
- iodata,wn-ac1167dgr
- iodata,wn-ac1600dgr
- iodata,wn-ac1600dgr2
- iodata,wn-ag300dgr
- nec,wg800hp
- nec,wg1200cr
- trendnet,tew-823dru
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.
So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").
Some measurements performed on TP-Link Archer C7-v5:
mib-type=0, mib-poll-interval=500ms (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.93 0.00 0.00 1.93 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
mib-type=0, mib-poll-interval=2s (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.14 0.00 0.00 1.14 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This patch adds support for TP-Link Archer C6 v2 (EU)
Hardware specification:
- SOC: Qualcomm QCA9563 @ 775MHz
- Flash: GigaDevice GD25Q64CSIG (8MiB)
- RAM: Zentel A3R1GE40JBF (128 MiB DDR2)
- Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) QCA9563 integrated (3x3)
- 5GHz (ac) Qualcomm QCA9886 (2x2)
- Button: 1x power, 1x reset, 1x wps
- LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps
- UART: There's no UART header on the board
Flash instructions:
Upload
openwrt-ath79-generic-tplink_archer-c6-v2-squashfs-factory.bin
via the router Web interface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the router
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the
tftp root directory renamed to ArcherC6v2_tp_recovery.bin.
4. Connect power cable to router, press and hold the reset
button and turn the router on
5. Keep the reset button pressed until the WPS LED lights up
6. Wait ~150 seconds to complete flashing
According to the GPL source the non-EU variant has different
GPIOs assigned to some of the LEDs and buttons. The flash
layout might be different as well. The wikidevi entry for
Archer A6/C6 assumes they are identical.
Signed-off-by: Georgi Vlaev <georgi.vlaev@gmail.com>
