SoC: MediaTek MT7621AT dual-core @ 880MHz
RAM: 256M (Winbond W632GG6KB-1)
FLASH: 128MB (Macronix MX30LF1G18AC-TI)
WiFi: - 2.4GHz MediaTek MT7615N bgn
- 5GHz MediaTek MT7615N nac
Switch: SoC integrated Gigabit Switch (4 x LAN, 1 x WAN)
USB: 1 x USB 3.1 (Gen 1)
BTN: Reset, WPS
LED: - Power (blue)
- 5Ghz (blue)
- 2.4GHz (blue)
- Internet (blue)
- 4x LAN (blue)
(LAN/WAN leds are not controllable by GPIOs)
UART: UART is present as Pads marked J4 on the PCB.
3.3V - TX - RX - GND / 57600-8N1
3.3V is the square pad
MAC: The MAC address on the router-label matches the MAC of
the 2.4 GHz WiFi.
LAN and WAN MAC are identical: MAC_LABEL+4
5 GHz WiFi MAC: also MAC_LABEL+4
Installation
------------
Via U-Boot tftpd:
Switch on device, within 2s press reset button and keep pressed
until power LED starts blinking slowly.
Upload factory image via tftp put, the router's ip is 192.168.1.1
and expects the client on 192.168.1.75.
The images also work on the Asus RT-AC65P models as tested by Gabor.
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Tested-by: Gabor Varga <vargagab@gmail.com>
[fixed Asus -> ASUS in DTS]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The MediaTek MT7621 NAND driver currently intransparently shifts NAND
pages when a block is marked as bad. Because of this, offsets for e.g.
caldata and MAC-addresses seem to be off.
This is, howeer, not a task for the mtd NAND driver, as the flash
translation layer is tasked with this.
This patch disables this badblock shifting. This fix was originally
proposed by Jo-Philipp Wich at
https://bugs.openwrt.org/index.php?do=details&task_id=1926
Fixes FS#1926 ("MTD partition offset not correctly mapped when bad
eraseblocks present")
Signed-off-by: David Bauer <mail@david-bauer.net>
mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory
detect_memory_region in arch/mips/kernel/setup.c only add the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.
This commit adds memory detection capability for mt7621:
1. add the highmem area when 512m is detected.
2. guard memcmp from accessing peripheral registers:
This only happens when some weird user decided to change
kernel load address to 256m or higher address. Since this
is a quite unusual case, we just skip 512m testing and return
256m as memory size.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Upstream kernel added support for RAW_APPENDED_DTB on ralink arch
in the following commit:
02564fc89d3d ("ralink: Introduce fw_passed_dtb to arch/mips/ralink")
Use upstream solution and get rid of our OWRTDTB hack.
This commit set DEVICE_DTS to $$(DTS) instead of replacing DTS with
DEVICE_DTS in device profile because DTS variable will be dropped
in later commits.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[Tested on mt7621/mt76x8]
Tested-by: Chuanhong Guo <gch981213@gmail.com>
[Tested on rt305x/mt7620]
Tested-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Refreshed all patches.
This bump contains upstream commits which seem to avoid (not properly fix)
the errors as seen in FS#2305 and FS#2297
Altered patches:
- 403-net-mvneta-convert-to-phylink.patch
- 410-sfp-hack-allow-marvell-10G-phy-support-to-use-SFP.patch
Compile-tested on: ar71xx, cns3xxx, imx6, mvebu, x86_64
Runtime-tested on: ar71xx, cns3xxx, imx6, x86_64
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Upstream driver has gone through a series of cleanup and was moved
from drivers/staging into drivers/spi. Backport it to replace our
messy driver.
Tested-by: Jörg Schüler-Maroldt <joerg-linux@arcor.de>
[LinkIt Smart 7688, AcSIP AI7688H Wi-Fi module]
Tested-by: Rosen Penev <rosenp@gmail.com>
Tested-by: Tian Xiao bo <peterwillcn@gmail.com>
[Newifi-D2 MediaTek MT7621 ver:1 eco:3]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
clk_get_rate returns the current clock rate in Hz for a clock source so
if we divide it by 1M, then we get frequency in MHz and not kHz.
Signed-off-by: Qin Wei <support@vocore.io>
[added missing commit message, and fixed author with SoB from PR message]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Similar to the (currently unused) mt7620_get_eco() function, introduce
mt7620_get_chipver() and mt7620_get_pkg() functions to allow rt2x00 to
probe for the type of WiSoC. This is ugly and probably unacceptable
for upstream, however, it should help to evaluate which of those hacks
are actually really needed, enumerate the possible values and label
them in a more meaningful way than currently done in the vendor driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Patch picked from commit 82618062cf
This enables 4B opcodes for MX25L25635F, to fix the reboot crash
issue (FS#1120) At least 3 devices are using this flash
- GeHua GHL-R-001
- Youku YK1
- Newifi D1
Now the MX25L25635F can be correctly detected without breaking MX25L25635E
[ 3.034324] spi-mt7621 1e000b00.spi: sys_freq: 220000000
[ 3.045962] m25p80 spi0.0: mx25l25635f (32768 Kbytes)
[ 3.056098] 4 fixed-partitions partitions found on MTD device spi0.0
[ 3.068748] Creating 4 MTD partitions on "spi0.0":
Signed-off-by: Deng Qingfang <dengqf6@mail2.sysu.edu.cn>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [added deprecation notice]
In case the nd_sd group is set to the sd-card function, Pins 45 + 46 are
configured as GPIOs. If they are blocked by the sd function, they can't
be used as GPIOs.
Reported-by: Kristian Evensen <kristian.evensen@gmail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
For a long time the mt7621 uses a fixed cpu clock which causes a problem
if the cpu frequency is not 880MHz.
This patch fixes the cpu clock calculation and adds the cpu/bus clkdev
which will be used in dts.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
These two patches both modified the mt7621.c, and the patch file
998-mt7621-needs-jiffies.patch adds only one line which is used by the
another patch file. So merge them into one file.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
The gpio-ralink driver has everything it needs to be used as an
interrupt controller except for device tree support. This simple patch
adds that support by configuring the irq domain to use two cells and
adding the appropriate documentation to the devicetree bindings.
Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
Newer batches of several Mikrotik boards contain this yet-unsupported
flash chip, for instance:
- rb941-2nd (hAP lite)
- rb952ui-5ac2nd (hAP ac lite)
- RBM33G
and probably other Mikrotik boards need this patch as well.
The patch was submitted upstream by Robert Marko: https://patchwork.ozlabs.org/patch/934181/
Closes: FS#1715
Signed-off-by: Baptiste Jonglez <git@bitsofnetworks.org>
Cc: Robert Marko <robimarko@gmail.com>
Refreshed all patches.
Added new patch:
- 192-Revert-ubifs-xattr-Don-t-operate-on-deleted-inodes.patch
This fixes a bug introduced in upstream 4.14.68 which caused targets using
ubifs to produce file-system errors on boot, rendering them useless.
Compile-tested on: cns3xxx, imx6, x86_64
Runtime-tested on: cns3xxx, imx6, x86_64
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Kernel upstream commit 67a3ba25aa95 ("MIPS: Fix incorrect mem=X@Y handling") introduced a new issue for rt288x where "PHYS_OFFSET" is 0x0 but the calculated "ramstart" is not. As the prerequisite of custom memory map has been removed, this results in the full memory range of 0x0 - 0x8000000 to be marked as reserved
for this platform.
This patch adds the originally intended prerequisite again.
Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
The rt3352 has a pin that can be used as second spi chip select,
watchdog reset or GPIO. The pinmux setup was missing the definition of
said pin but it is already used in the SoC dtsi.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Since commit c1e7738988f5 ("checks: add gpio binding properties check")
dtc treats any *-gpios and *-gpio property as phandle at least during
checks. The only whitelisted property is nr-gpio.
Use ralink,nr-gpio in favour of ralink,num-gpios to get rid of false
positive warnings.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Without this patch you will get an error "gpio-export probe deferral
not supported" when you try to export i2c expander gpio pins.
gpio-export is probed long before i2c-bus and i2c expander are created
and it doesn't retry it so none pins are exported.
Signed-off-by: René van Dorst <opensource@vdorst.com>
apply the change to all instances of the gpio exports patch
Signed-off-by: Mathias Kresin <dev@kresin.me>
- remove misaligned custom buffer allocation in the NAND driver
- remove broken bounce buffer implementation for 16-byte align
Let the MTD core take care of both
Fixes messages like these:
[ 102.820541] Data buffer not 16 bytes aligned: 87daf08c
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Rereshed all patches
Reworked patches to match upstream:
335-v4.16-netfilter-nf_tables-add-single-table-list-for-all-fa.patch
Compile-tested on: cns3xxx, imx6, x86_64
Runtime-tested on: cns3xxx, imx6, x86_64
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Check if the GPIO is valid (or set at all). If no GPIO is set in the
devicetree, a gpiolib related kernel warning + stacktrace is shown during
boot and gpio-export reports GPIOs as exported albeit none really is.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Some board vendors actually changed the loader to expect the chip
to come up in 4-address-mode and flipped the ADP bit in the flash
chip's configuration register which makes it come up in 4-address-mode.
Hence it doesn't make sense to avoid switching to 4-address-mode on
those boards but the opposite as otherwise reboot hangs eg. on the
WrtNode2 boards. Fix this by checking the ADP register and only using
SPI_NOR_4B_READ_OP on chips which have ADP==0 (come up in 3-byte mode).
See also datasheet section 7.1.11 Power Up Address Mode (ADP)
Fixes: 22d982ea0 ("ramips: add support for switching between 3-byte and 4-byte addressing on w25q256 flash")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
