The following patches were dropped because they are already applied
upstream:
- 0038-MIPS-lantiq-fpi-on-ar9.patch
- 0039-MIPS-lantiq-initialize-usb-on-boot.patch
- 0042-USB-DWC2-big-endian-support.patch
- 0043-gpio-stp-xway-fix-phy-mask.patch
All other patches were simply refreshed, except the following:
- 0001-MIPS-lantiq-add-pcie-driver.patch
Changes to arch/mips/lantiq/xway/sysctrl.c (these changes disabled
some PMU gates for the vrx200 / VR9 SoCs) were removed since the
upstream kernel disables unused PMU gates automatically (since
95135bfa7ead1becc2879230f72583dde2b71a0c
"MIPS: Lantiq: Deactivate most of the devices by default").
- 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
Since OpenWrt commit 55ba20afcc drivers
should use of_get_mac_address(). of_get_mac_address_mtd is not
available for drivers anymore since it's called automatically within
of_get_mac_address().
- 0028-NET-lantiq-various-etop-fixes.patch
Same changes as in 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
While refreshing the kernel configuration SPI support had to be moved to
config-4.4 because otherwise M25P80 was disabled.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48307
Re-defining the compatible property is not required since the correct
value is inherited from vr9.dtsi.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48295
Compared to the "old" driver:
- Each device must assign a pinctrl setting to the SPI node to allow the
new SPI driver to configure the SPI pins.
While here we are also using separate input and output settings so we
are independent of whether the bootloader configures the pins correctly.
- We use the new "compatible" strings to make the driver choose the
correct number of chip-selects for each SoC.
- The new driver starts counting the chip-selects at 1 (instead of 0, like
the old one did). Thus we have to adjust the devices accordingly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48293
The new driver provides a few improvements over the old one:
- Separate compatible strings per SoC type (this allows removing some
hardcoded of_device_is_compatible() checks)
- It does not rely upon spi-bitbang anymore
- chip-selects are numbered as in the datasheet (= starting at 1 instead
of 0)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48292
All devices are now using the HW SPI driver, so this is not necessary
anymore.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48291
This allows devices to use SPI without having to re-define (and thus
duplicating) the whole SPI node.
By default SPI is disabled (as before) because only few devices need it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48286
After the latest pinctrl backports there are only 50 (instead of 56 as
before) GPIOs/pins exported (thus the first GPIO on VRX200 SoCs is now
462, before it was 456). This means that any hardcoded GPIOs have to be
adjusted.
This broke the PCIe driver (which seems to be the only driver which uses
hardcoded GPIO numbers), it only reports:
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
pcie_rc_initialize link up failed!!!!!
To prevent more of these issues in the future we remove the hardcoded
PCIe reset GPIO definition and simply pass it via device-tree (like the
PCI driver does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48285
These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48284
Upstream commit be14811c03cf2 "pinctrl/lantiq: introduce new dedicated
devicetree bindings" allows us to use each pin in the pinmux. This is
useful for example in the "spi" group which contains some pins which
are inputs, and some which are outputs.
These can only be used once the new compatible strings for the pinctrl
node are used.
Additionally 0150-lantiq-pinctrl-xway.patch and the "GPIO PORT3 fix"
(which was part of 0012-pinctrl-lantiq-fix-up-pinmux.patch) were
replaced with their upstream variants which are also in 4.5.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48283
The old signature only worked because brnboot ignores the leading "5" in
the signature. We can see the correct signature when flashing a brnImage
via recovery web-interface, in this case brnboot reports:
[CGI-Signature Check] buf:[BRNDA6431], sigInFlash:[BRNDA6431]
Thanks to Mathias Kresin for reporting this.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48269
This removes the arch-specific mtdsplit parsers and enables the generic
implementations for brnImage, EVA and TP-Link instead.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48264
This patch was merged into upstream Linux 4.1.
This fixes#21587 and was introduced in r48223.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48229
linux 4.4 (since commit 08b3c894e56580b8ed3e601212a25bda974c3cc2
"MIPS: lantiq: Disable xbar fpi burst mode") requires that the xbar is
defined in the .dts of vrx200 (VR9) SoCs.
SVN-Revision: 48056
The P2812HNU-F3 doesn't have usb leds. Only the P2812HNU-F1 has those
leds.
Reported-by: Sylwester Petela <sscapi@gmail.com>
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48043
The leds of the following boards are not renamed due to lack of
manuals/informations:
- ARV7519PW
- ARV7510PW22
- ARV4510PW
The leds of the ARV4518PWR01* boards are unchanged, since the leds doesn't
match the leds from the manual or pictures (e.g. there shouldn't be a wps led).
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48042
The BTHOMEHUBV5A has a RGB power led, where every colour is perfect to
indicate the current boot state. This patch adds support for such cases.
The existing led sequences should be the same as before.
Boards which are using a led different from power (like TDW89x0) are
changed to switch of the led after boot
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48041
dsl_control (dsl_notify.sh) is the only process which is aware of the
state of the atm/ptm interface. Use the dsl led exclusive for the dsl
line state.
On boards which don't have a distinct internet and a dsl led, let the
netdev status of the atm interface trigger the shared led.
Triggering the shared led according to the status of the ppp interface
isn't suitable, since the led would be switched of if the ppp
connection goes down, but the line is still in sync.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48040
Remove all now double defined leds from the led board file. Use pppoe
as default for all broadband connections, since it's the default in
OpenWrt now.
Rename the the wifi leds to make sure, the not applicable default
values get overwritten.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48038
- ARV7525PW: use the power led as dsl led as done by the stock firmware
- FRITZ3370: use the info led as internet led
- FRITZ7320: use the power led as dsl led as done by the stock firmware
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48037
Use the same led logic and labels as the OEM firmware (red = okay,
blue = failure).
Add the red internet led.
Remove missing usb led workaround. The workaround shouldn't be in the
default configuration.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48036
No need to switch (and keep) on all leds at boot. Use the same led
logic and labels as the OEM firmware (red = okay, blue = failure).
Add the red internet led.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48035
It's not necessary to define PCI_* if pci_ids.h is included a few
lines above.
The change to pci_ids.h doesn't look intentional to me, especially
since the former value is added to the top of ifxmips_fixup_pcie.c.
Both changes were introduced with the kernel 4.1 support patches and
were not present in the 3.18 patches.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 47996
Use the same max spi frequency as set in u-boot.
According to the datasheets, the Q64-104HIP as well as the Winbond
25Q64FVSIG support spi frequencies up to 50 MHz. During my tests, the
Q64-104HIP couldn't be recognized/initialized if the frequency
was > 40MHz.
Both chips do support fast read as well.
While touching the dts file, I fixed the dtc compiler warnings.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 47994
using the special tag in this way lead to port mirroring for certain types of traffic.
fallback to using th PMAC_EWAN register for the wan portmap.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47993
This patch configures the correct ath9k WLAN LED polarity for the TDW8970,
and for the TDW8980 as well.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
SVN-Revision: 47969
Still unused, but u-boot doesn't take care of the led, which results in a
permanent switched on 5GHz LED.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 47915
- Use common OpenWrt blink patterns instead of custom ones
- Add preinit_regular hook
- Handle the TDW89X0 that does not have a configurable power LED
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
SVN-Revision: 47914
This patch configures the correct ath9k WLAN LED polarity for the TDW8970.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
SVN-Revision: 47913
The TDW8970 has a AR9381, which is the bgn 3x3:3 variant of the AR938x family.
The TDW8980 has a AR9287, which is the bgn 2x2:2 variant of the AR928x family.
This means that the chip for both routers is 2.4 GHz only.
Anyway, the manufacturer didn't disable the 5 GHz band in the EEPROM partition
(at least on my TDW8970).
So this patch disables the 5 GHz band.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
SVN-Revision: 47912
