Since the driver doesn't know anything about (M)STP
we just hard-set the ports to be enabled if they are
part of the VLAN.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43938
- eliminate MV_CPUPORT; not necessary since we define
the CPU port(s) via Device Tree
- add STU and expand VTU operations
- update register names to match those of 88E61xx rather than
mvswitch's 88E6060
- use more consistent formatting
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43937
Move all AR8327/AR8337-specific driver code into a separate source file
ar8327.c and adjust patches so that ar8327.c is compiled if
CONFIG_AR8216_PHY is set.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43845
Move several structure definitions and #defines from ar8216.c
to ar8216.h and move AR8327/AR8337 header stuff into a new
header file ar8327.h.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43844
Remove read/write/rmw member functions from ar8xxx_priv
There seems to be no real benefit of the ar8xxx_priv member functions
read/write/rmw as one implementation exists for each of them only.
Especially ar8xxx_mii_rmw is assigned to priv->rmw first and then
mapped to ar8xxx_rmw.
Rename the ar8xxx_mii_.. functions to ar8xxx_.. and use them directly.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43742
Create helpers mii_read32 / mii_write32 for 32 bit MII ops.
Rename r3 variable to page in ar8xxx_mii_write to make it consistent
with the other ar8xxx_mii_xxxx functions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43741
Factor out chip-specific parameters from ar8xxx_probe_switch.
Move the ar8xxx_chip definitions after the swops definitions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43740
This is a swconfig driver for the Marvell 88E6171 switch,
which is a 7-port GigE switch with two CPU ports and 64
802.1q VLANs.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43486
Factor out set_mirror_regs to ar8xxx_chip.
Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43468
Factor out info whether switch should be configured at probe stage
to ar8xxx_chip. Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43466
Patch reverts 43332 which seems to cause issues with VLAN functionality.
Add a specific check to check whether ANEG is still enabled and re-enable
it if necessary. Disable generic phy soft reset for kernel >=3.16.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43356
We should make sure that also for ar8216 hw gets initialized.
For ar8216 hw_init is a dummy currently. The hw_init used for ar8236
should be generic enough to be usable with ar8216 too.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43334
Move the PHY fixup call to the PHY init loop.
Use ar8xxx_has_gige in the PHY init instead of passing the gigE
capability via function parameter.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43333
Kernel 3.14 introduced a switch reset in phy_init_hw in drivers/net/phy
causing BMCR_ANENABLE to get cleared.
Due to the fact that ar8xxx_phy_config_aneg does nothing for
PHY 0 autonegatiation support remains disabled.
This can cause ports to operate at 10MBit/half-duplex only.
Fix this by calling genphy_config_aneg for PHY 0 too as
genphy_config_aneg sets BMCR_ANENABLE if it's not yet set.
Fixes: ticket 17800
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43332
PHY init code in the switch-specific hw_init functions is mainly
identical. Factor it out into a generic ar8xxx_phy_init function.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43331
Move phy fixup code from the chip-specific hw_init functions into a
fixup_phys callback.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43330
Currently there is a fixed 1000ms wait time after the switch was reset.
Most if not all switches need much less time to perform a reset.
Therefore replace the fixed wait time with polling for BMCR_RESET to
be cleared.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43329
All supported switches have 5 PHYs. Currently partially 5 is hardcoded
and partially switch-specific constants exist.
Replace them with a global constant.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43328
Boards that have more than one swconfig enabled switch will show the devices in
reverse order when call swconfig list. Fix this by using list_add_tail().
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 43106
This allows tagged and untagged traffic together on the same port on ar8327
switch devices.
I looked at the first attempt to do this in r40777 (ar71xx: Fix tagged+untagged
operation on AR8327N (#12181)). I also set the vlan and port egress policies
like that change. But I change vlan_tagged in an less intrusive way. The
tagged/untagged decision is now based on the following rules:
- if vid != pvid then traffic is always tagged
- if vid == pvid then vlan_tagged stores if the traffic should be tagged
Tested on TP-Link WDR-3600 (ar8327N).
Signed-off-by: Valentin Spreckels <Valentin.Spreckels@Informatik.Uni-Oldenburg.DE>
SVN-Revision: 42653
This moves ingress, egress policy and pvid decisions to setup_port methods.
They arenow device type dependent.
This allows policy changes on only one device type which is needed to allow
tagged + untagged operation on ar8327.
Tested on TP-LINK WDR-3600 (ar8327N).
Signed-off-by: Valentin Spreckels <Valentin.Spreckels@Informatik.Uni-Oldenburg.DE>
SVN-Revision: 42652
According to the thread https://forum.openwrt.org/viewtopic.php?id=48281
b53 uses GPIO 7:
[ 4.470000] b53_common: [DBG] b53_switch_reset_gpio using 7
and causes device to self-reboot. GPIO 8 was found in CFE boot log:
"Reset switch via GPIO 8 ..."
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 41526
This patch deactivates the statistics, adds a missing lock
initialization and fixes a waring.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 41511
Revert the tagged + untagged rework for now due to regressions in
vlan setup on certain AR83xx switches.
Signed-off-by: Jo-Philipp Wich <jow@openwrt.org>
SVN-Revision: 40842
Replace the global "vlan_tagged" variable with an array storing the
tagging state per vlan.
The code was taken from #12181, tested and cleaned up by Saverio Proto
with additional bug fixes supplied by Álvaro Fernández.
Tested-by: Jo-Philipp Wich <jow@openwrt.org>
Signed-off-by: Saverio Proto <zioproto@gmail.com>
Signed-off-by: Álvaro Fernández <noltari@gmail.com>
SVN-Revision: 40777
This patch adds port status information and MIB counters to the ADM6996
switch driver.
The driver supports also the older ADM6996L-variant, but I'm not able to
test this patch on that chip. According to the datasheet the same
registers exist there as well, so I think it should work, but any
feedback is appreciated.
Signed-off-by: Matti Laakso <malaakso at elisanet.fi>
SVN-Revision: 40542
If the CPU port is not forced up, the link, at least on this board, is lost after
changes are applied. This makes sure that the link is restored. Regression tests
should confirm it doesn't break other boards.
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40305
- hide port pvid - vlan index relation
- switch initialises with vlans disabled so port isolation is not used
- remove special treatment of cpu port
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40304
