Adds a hash-bucket size attribute for the different SoCs, in order to
accomodate the buckets with 8 entries of the L2-forwarding tables
on RTL93XX in contrast to only 4 on RTL83XX.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds snooping support for IGMP and MLD on RTL8380/90/9300
by trapping IGMP and MLD packets to the CPU.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Enables CRC calculation offloading on RTL8380/8390/9300.
Tested on Zyxel XGS1210-10 (RTL9302)/GS1900-48 (RTL8390)/GS1900-10HP (RTL8382)
On the Zyxel GS1900-10HP, an increase of 5% in iperf3 send throughput
and 11% in receive throughput is seen.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
From the validate docs in include/linux/phylink.h:
When state->interface is PHY_INTERFACE_MODE_NA, phylink expects the
MAC driver to return all supported link modes.
Tested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Demote a number of debugging printk's to pr_debug to avoid log
nosie. Several of these functions are called as a result of
userspace activity. This can cause a lot of log noise when
userspace does periodic polling.
Most of this could probably be removed completely, but let's
keep it for now since these drivers are still in development.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Add a table API that has per accss register locking and uses
register description information to handle all table access
through a single set of api calls.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds support for the RTL9300 and RTL9310 series of switches
with 10GBit per port and up to 56 ports.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the internal SerDes of the RTL9300 SoC
and for the RTL8218D and RTL8226B phys found in combination
with this SoC in switches.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This fixes the usage of the RTL8231 GPIO extender chip
when used with the RTL839X SoCs. Specifically,
the PHY addresses may be different from 0.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for identifying QoS information in packets
and use this and rate control information to submit to multiple
egress queues. The ethernet driver is also made to support
2 egress and up to 32 egress queues.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
this adds support for the SoC timer of the RTL9300 chips, it
provides 6 independent timer/counters, of which the first one
is used as a clocksource and the second one as event timer.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Cppcheck shows here duplicated break.
Code `state->speed = SPEED_1000;` will be never executed because above
it there is break statement.
Almost identical statement is placed in another realtek driver
18a53d43d6/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/dsa.c (L286-L294)
Signed-off-by: Rafał Mikrut <mikrutrafal@protonmail.com>
Cppcheck shows self initialization error, which is an obvious bug.
Basing on logic of similar fragment below I assigned to this variable,
value `RTL838X_LED_GLB_CTRL` which I think is proper.
Signed-off-by: Rafał Mikrut <mikrutrafal@protonmail.com>
