In order to support VSMP, enable support for both VPEs
of the RTL839X and RTL930X SoCs in the irq-realtek-rtl
driver. Add support for IRQ affinity setting.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
In order for the Platform includes to be available on
all sub-targets, make them dependent on CONFIG_RTL83XX.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The RTL838X SoCs do not use Aquantia PHYs, remove this.
Also the RTL838X uses a high resolution R4K timer.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Creates RTL83XX as a basic kernel config parameter for the
RTL838X, RTL839x, RTL930X and RTL931X platforms with respective
configurations for the SoCs, which are introduced in addition.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Create the RTL838x specific Makefiles. Move CPU-type into
rtl838x.mk as this is specifc to that platform. Add
rtl838x subtarget into main Makefile.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
mv generic/target.mk to rtl838x/target.mk in order to create
an initial makefile for the rtl838x sub-architecture
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The EEPROMs on SFP modules are compatible both to I2C as well
as SMBus. However, the kernel so far only supports I2C
access. We add SMBus access routines, because the I2C driver
for the RTL9300 HW only supports that protocol. At the same
time we disable I2C access to PHYs on SFP modules as otherwise
detection of any SFP module would fail. This is not in any
way problematic at this point in time since the RTL93XX
platform so far does not support PHYs on SFP modules.
The patches are copied and rebased version of:
https://bootlin.com/blog/sfp-modules-on-a-board-running-linux/
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The RTL9300/RTL9310 I2C controllers have support for 2 independent I2C
masters, each with a fixed SCL pin, that cannot be changed. Each of these
masters can use 8 (RTL9300) or 16 (RTL9310) different pins for SDA.
This multiplexer directly controls the two masters and their shared
IO configuration registers to allow multiplexing between any of these
busses. The two masters cannot be used in parallel as the multiplex
is protected by a standard multiplex lock.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the RTL9300 and RTL9310 I2C controller.
The controller implements the SMBus protocol for SMBus transfers
over an I2C bus. The driver supports selecting one of the 2 possible
SCL pins and any of the 8 possible SDA pins. Bus speeds of
100kHz (standard speed) and 400kHz (high speed I2C) are supported.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This patch removes support for the legacy GPIO driver, since now
the gpio-otto driver can be used on all platforms
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
We add support for the RTL930X and RTL931X architectures
in the gpio-realtek-otto.c driver.
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Drop patches and files for Linux 5.4 now that we've been using 5.10
for a while and support for Linux 5.4 has gone out-of-sync.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Had to update generic defconfig (make kernel_menuconfig CONFIG_TARGET=generic)
for this bump, but since that only modifies the target defined in .config,
and since that target also needed to be updated for unrelated reasons, manually
propagated the newly added symbol to the generic config.
Removed upstreamed:
pending-5.10/860-Revert-ASoC-mediatek-Check-for-error-clk-pointer.patch[1]
All other patches automatically rebased.
1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.99&id=080f371d984e8039c66db87f3c54804b0d172329
Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200
Run-tested: bcm2711/RPi4B, mt7622/RT3200
Signed-off-by: John Audia <graysky@archlinux.us>
All patches automatically rebased.
Build system: x86_64
Build-tested: ramips/mt7621*
*Had to revert 7f1edbd in order to build due to FS#4149
Signed-off-by: John Audia <graysky@archlinux.us>
The GS110TPP has an RGB LED used for system status indication. Expose
all three components as separate GPIO LEDs connected via the device's
RTL8231.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Since the move to 5.10, there are now two GPIO drivers. The gpio0 node
refers to the internal GPIOs, so the indirect-access-bus-id is no longer
relevant for that node.
Set indirect-access-bus-id to the correct value (31) on the correct node
(gpio1) and enable the device.
Cc: Raylynn Knight <rayknight@me.com>
Cc: Michael Mohr <akihana@gmail.com>
Cc: Stijn Segers <foss@volatilesystems.org>
Cc: Stijn Tintel <stijn@linux-ipv6.be>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Bjørn Mork <bjorn@mork.no>
Each of
- CRYPTO_AEAD2
- CRYPTO_AEAD
- CRYPTO_GF128MUL
- CRYPTO_GHASH
- CRYPTO_HASH2
- CRYPTO_HASH
- CRYPTO_MANAGER2
- CRYPTO_MANAGER
- CRYPTO_NULL2
either directly required for mac80211 crypto support, or directly
selected by such options. Support for the mac80211 crypto was enabled in
the generic config since c7182123b9 ("kernel: make cryptoapi support
needed by mac80211 built-in"). So move the above options from the target
configs to the generic config to make it clear why do we need them.
CC: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Both CLANG_VERSION and LLD_VERISON are autogenerated runtime
configuration options, so add them to the kernel configuration filter
and remove from generic and per-target configs to keep configs clean.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Removed target for patch which does not exist:
bcm27xx/patches-5.10/950-0249-kbuild-Disable-gcc-plugins.patch
All patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B, ipq806x/R7800*
Run-tested: bcm2711/RPi4B, ipq806x/R7800*
* Had to revert 7f1edbd412 in order to build
(binutils 2.37, https://bugs.openwrt.org/index.php?do=details&task_id=4149)
Signed-off-by: John Audia <graysky@archlinux.us>
Mac adresses are assigned in the order given by the port list. The
interfaces are also brought up in this order. This target supports
devices with up to 52 ports. Sorting these alphabetically is very
confusing, and assigning mac addresses in alphabetic order does not
match stock firmware behaviour.
Suggested-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The Realtek Otto watchdog timer driver was accepted upstream, and is
queued for 5.17. Update the patch's file name, and replace by the final
version.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The Netgear GS110TPP v1 switch cannot reliably perform cold reboots
using the system's internal reset controller.
On this device, and the other supported Netgear switches, internal GPIO
line 13 is connected to the system's hard reset logic. Expose this GPIO
on all systems to ensure restarts work properly.
Cc: Raylynn Knight <rayknight@me.com>
Cc: Michael Mohr <akihana@gmail.com>
Cc: Stijn Segers <foss@volatilesystems.org>
Cc: Stijn Tintel <stijn@linux-ipv6.be>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Bjørn Mork <bjorn@mork.no>
Add the gpio-restart driver to the realtek build. This way devices,
which cannot reliably perform resets using the SoC's internal reset
logic, can use a GPIO line to drive the SoC's hard reset input.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The internal GPIO controller on RTL838x is also an IRQ controller, which
requires the 'interrupt-controller' and '#interrupts-cells' properties
to be present in the device tree.
Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Some devices are assigned globally unique MAC addresses for all
ports. These are stored by U-Boot in the second U-Boot enviroment
("sysinfo") as a range of start and end address.
Use the full range if provided.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The default management interface should be easy to find for users
doing "blind" installations without console access. There are
already multiple examples in the forum of advanced early adopters
having problems locating the management interface after installing
OpenWrt.
Requiring tagged VLAN configration to access the initial management
interface creates unnecessary hassle at best. Errors on the other
end are close to impossible to debug without console access, even
for advanced users. Less advanced users might have problems with
the concept of VLAN tagging.
Limiting management access to a single arbitrary port among up to
52 possible LAN ports makes this even more difficult, for no
reason at all. Users might have reasons to use a different port
for management. And they might even have difficulties using the
OpenWrt selected one. The port might be the wrong type for their
management link (e.g copper instead of fibre). Or they might
depend on PoE power from a device which they can't reconfigure.
User expectations will be based on
- OpenWrt defaults for other devices
- stock firmware default for the device in question
- common default behaviour of similar devices
All 3 cases point to a static IP address accessible on the native
VLAN of any LAN port. A switch does not have any WAN port. All
ports are LAN ports.
This changes the default network configuration in line with these
expectations.
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
All patches automatically rebased.
Build system: x86_64
Build-tested: ramips/mt7621*
*I am hit with the binutils 2.37 bug so I had to revert 7f1edbd412
in order to downgrade to 2.35.1
Signed-off-by: John Audia <graysky@archlinux.us>
By dropping _machine_restart, users can provide more reliable or
device-specific restart modes.
_machine_halt was already removed in commit f4b687d1f0 ("realtek: use
kernel defined halt"), but quietly reintroduced in commit 8faffa00cb
("realtek: add support for the RTL9300 timer"). Let's remove it again.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Add and enable the Realtek Otto WDT peripheral found on these SoCs.
Default all devices to use standard (cold) reboot and "soc" resets.
Devices that require the PLL value fixup before restarting, should pick
the "cpu" or "software" reset mode. These devices also need to provide a
custom reboot mode, by adding the reboot argument to the kernel command
line:
WDT reset mode | kernel reboot mode
----------------+---------------------------------------
soc | reboot=cold (default if not specified)
cpu | reboot=warm
software | reboot=software
Preferrably, these devices should use an alternative restart method like
gpio-restart to provide reliable restarts.
Note that watchdog restarts are not yet exposed, since the
_machine_restart override is still present.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Add patch submitted upstream to linux-watchdog and replace the MIPS
architecture symbols. Requires one extra patch for the DIV_ROUND_*
macros, which have moved to a different header since 5.10.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
The CPU peripherals on RTL83xx/RTL930x are connected to the CPU via the
Lexra bus. This bus can provide a clock signal to these peripherals, but
no clock driver is currently available. Instead, use a fixed-clock to
provide the clock frequency, and update the dependent peripherals.
Lexra bus clock frequencies:
- RTL838x: 200MHz
- RTL839x: 200MHz
- RTL930x: 175MHz
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
All current devices use identical bootargs, so let's move that to the
common devicetree includes.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Recent versions of Realtek's SDK reset both the ethernet NIC and queues
(SW_NIC_RST and SW_Q_RST bits) when initialising the hardware.
Furthermore, when issuing a CPU reset on the Zyxel GS1900-8 (not
supported by any current driver), the networking part of the SoC is not
reset. This leads to unresponsive network after the restart. By
resetting both the ethernet NIC and queues, networking always comes up
reliably.
Suggested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Backport the patch queued upstream for 5.16. The patch differs slightly
from the upstream patch due to an upstream change that added a
convenience function.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Deleted (upstreamed):
bcm27xx/patches-5.10/950-0145-xhci-add-quirk-for-host-controllers-that-don-t-updat.patch [1]
Manually rebased:
bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
Note: although automatically rebaseable, the last patch has been edited to avoid
conflicting bit definitions.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.10.y&id=b6f32897af190d4716412e156ee0abcc16e4f1e5
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Commit 03e1d93e07 ("realtek: add driver support for routing
offload") added routing offload for IPv4, but broke IPv6 routing
completely. The routing table is empty and cannot be updated:
root@gs1900-10hp:~# ip -6 route
root@gs1900-10hp:~# ip -6 route add unreachable default
RTNETLINK answers: Invalid argument
As a side effect, this breaks opkg on IPv4 only systems too,
since uclient-fetch fails when there are no IPv6 routes:
root@gs1900-10hp:~# uclient-fetch http://192.168.99.1
Downloading 'http://192.168.99.1'
Failed to send request: Operation not permitted
Fix by returning NOTIFY_DONE when offloading is unsupported, falling
back to default behaviour.
Fixes: 03e1d93e07 ("realtek: add driver support for routing offload")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The current rule produces empty trailers, causing the OEM firmware
update application to reject our images.
The double expansion of a makefile variable does not work inside
shell code. The second round is interpreted as a shell expansion,
attempting to run the command ZYXEL_VERS instead of expanding the
$(ZYXEL_VERS) makefile variable.
Fix by removing one level of variable indirection.
Fixes: c6c8d597e1 ("realtek: Add generic zyxel_gs1900 image definition")
Tested-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The otto GPIO driver does not work with rtl9300 SoCs. Add
the legacy driver again and use that by default in the 9300 .dtsi
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
RTL8393 SoCs older than Revision C hang on accesses to PHYs with PHY address
larger or equal to the CPU-port (52). This will make scanning the MDIO bus
hang forever. Since the RTL8390 platform does not support more than
52 PHYs, return -EIO for phy addresses >= 52. Note that the RTL8390 family
of SoCs has a fixed mapping between port number and PHY-address.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds SoC specific routing offload implementations for
RTL8380/90 and RTL9300. RTL83xx supports merely nexthop
routing, RTL9300 full host and prefix routes.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Add generic support for listening to FIB and Event notifier updates and
use this information to hook into the L3 hardware capabilities of the
RTL SoCs.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The ingress filter registers use 2 bits for each port to define the filtering
state, whereas the egress filter uses 1 bit. So for for the ingress filter
the register offset for a given port is:
(port >> 4) << 4: since there are 16 entries in a register of 32 bits
and for the egress filter:
(port >> 5) << 4: since there are 32 entries in a register of 32 bits
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Configure a sane L2 learning configuration upon DSA driver load so that the
switch can start learning L2 addresses. Also configure the correct flood masks
for broadcast and unknown unicast traffice.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds RTL93xx-specific MAC configuration routines that allow also configuration
of 10GBit links for phylink. There is support for the Realtek-specific HISGMI
protocol.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for offloading TC flower by using the Packet Inspection Engine
of the RTL-SoCs. Basic infrastructure support is provide with callbacks to the
tc subsystem and support for HW packet counters.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
All RTL SoCs addresss PHYs via their port number, which is mapped to an
SMI address. Add support for configuring this mapping via the .dts on all
SoCs apart from the 839x, where the mapping to the 64 ports is fixed.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
On RTL83xx enable learning of the MAC source address of the CPU port
from outgoing packets. Add documentation on bit fields. On RTL93xx
enable port-mask usage and the use of internal priority, these
SoCs automatically learn the MAC.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Remove the storm control and attack warnings from the IRQ handler
of the Ethernet driver. There was no consequence to the detection
and the kernel can also handle at least the attacks itself.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This enlarges the size of the TX ring buffer, which prevents warnings
when the buffer runs out of space.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The bootloader can leave the GPIO expander in a state which doesn't have
output drivers enabled so GPIOs will properly work for input but output
operations will have no effect.
To avoid disrupting the boot in case the bootloader left direction and
data registers in an inconsistent state (e.g. pulling SoC's reset to 0)
reconfigure everything as input.
Reviewed-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
This patch adds "KERNEL_TESTING_PATCHVER:=5.10" to the Makefile in
realtek target to allow using Kernel 5.10 for testing.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
On the devices with PoE support, the secondary UART (uart1) on the SoC
is used to communicate between the SoC and controller.
Enable the secondary UART on the following devices:
- D-Link DGS-1210-10P
- Netgear GS110TPP v1
- Netgear GS310TP v1
- ZyXEL GS1900-8HP v1/v2
- ZyXEL GS1900-10HP
- ZyXEL GS1900-24HP v2
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The new backported GPIO driver supports interrupt, so use gpio-keys
instead of gpio-keys-polled for keys connected to the internal GPIO
controller.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
this patch includes the following changes:
- adjust mapping for the new driver
- GPIO 24 -> GPIO 0
- GPIO 47 -> GPIO 0 (+ disabling system LED)
- disable pins in the invalid range
(out of the range 0-31 of the new driver)
- are these pins on the external RTL8231 (&gpio1)?
- GPIO 67 (-> GPIO 3 on &gpio1?)
- GPIO 94 (-> GPIO 30 on &gpio1?)
- drop "indirect-access-bus-id" property from gpio0 node in device dts
files
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
dsa_to_port function in 5.10 returns dsa_port from the port list in
dsa_switch_tree, but the tree is built when the switch is registered
by dsa_register_switch and it's null in rtl83xx_mdio_probe.
So, we need to use dsa_to_port after the registration of the switch.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This patch adds a pinctrl-single pinmux node to allow disabling system
LED and enabling GPIO 0 (old driver: GPIO 24).
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
this patch fixes the following errors when compiling:
- dsa_switch_alloc is removed[1]
- a parameter "enum dsa_tag_protocol mprot" is added to dsa_tag_protocol
in dsa_switch_ops (include/net/dsa.h)
- several paramters are added to "phylink_mac_link_up" in dsa_switch_ops
(include/net/dsa.h)
added:
- int speed
- int duplex
- bool tx_pause
- bool rx_pause
- a parameter "struct switchdev_trans *trans" is added to
port_vlan_filtering in dsa_switch_ops (include/net/dsa.h)
[1]: https://lore.kernel.org/lkml/20191020031941.3805884-17-vivien.didelot@gmail.com/
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
this patch fixes the following errors when compiling:
- "unsigned int txqueue" is added as an additional parameter of
ndo_tx_timeout in net_device_ops (include/linux/netdevice.h)
- "mac_link_state" in phylink_mac_ops (include/linux/phylink.h)
is renamed to "mac_pcs_get_state" and changed the return value
to void from int
- several parameters are added to "mac_link_up" in phylink_mac_ops
(include/linux/phylink.h) and the order of the parameters is
changed
added:
- int speed
- int duplex
- bool tx_pause
- bool rx_pause
- a parameter "phy_interface_t *interface" is added to of_get_phy_mode
(drivers/of/of_net.c) and returns the state instead of phy mode
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
this patch updates SoC dtsi (rtl838x.dtsi, rtl930x.dtsi) for the
following backported drivers:
- gpio-realtek-otto (5.13)
- spi-realtek-rtl (5.12)
- irq-realtek-rtl (5.12)
And, disable SoC GPIO node (gpio0) in rtl930x.dtsi in dts-5.10.
Currently, the upstreamed driver doesn't support the GPIO controller on
RTL930x SoC.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
the following changes are included in this patch:
- node is enabled by default, drop 'status = "okay"'
- adjust order of "compatible" lines and "reg" lines
- add a new blank line before fixed-link node in rtl830x.dtsi
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This patch adds "dts-5.10" directory to use backported drivers.
There are several specification changes in the new drivers, so there
are some compatibility issues in using dts/dtsi files for 5.4.
The old DTS files are moved to "dts-5.4", so their corresponding
kernel version is obvious as well.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[change "dts" to "dts-5.4", adjust Makefile]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The following line is already defined in arch/mips/Kbuild.platforms by
300-mips-add-rtl838x-platform.patch.
platform-$(CONFIG_RTL838X) += rtl838x/
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
A macro with the same name is provided in asm/pgtable.h in Kernel 5.10,
use it and drop from ioremap.h.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This patch backports "irq-realtek-rtl" driver to Kernel 5.10 from 5.12.
"MACH_REALTEK_RTL" is used as a platform name in upstream, but "RTL838X"
is used in OpenWrt, so update the dependency by the additional patch.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
To use backported irq driver, drop old irq driver from realtek target
and call irqchip_init() in setup.c.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
To backport the upstreamed driver (gpio-realtek-otto) from 5.13, drop the
old driver from realtek target.
And, modify 301-gpio-add-rtl838x-driver.patch to remove rtl838x GPIO
support and rename it only for rtl8231 GPIO support.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This patch backports "spi-realtek-rtl" driver to Kernel 5.10 from 5.12.
"MACH_REALTEK_RTL" is used as a platform name in upstream, but "RTL838X"
is used in OpenWrt, so update the dependency by the additional patch.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
To backport the upstreamed driver (spi-realtek-rtl) from 5.12, drop the
old driver from realtek target.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
this patch copies the following files from 5.4 to 5.10:
- config-5.4 -> config-5.10
- files-5.4/ -> files-5.10/
- patches-5.4/ -> patches-5.10/
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[rebase on change in files-5.4]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
GPIOs > 31 require special handling. This patch fixes both the
initialisation and direction get/set operations.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Sander Vanheule <sander@svanheule.net>
The ZyXEL GS1900-24HPv2 is a 24 port PoE switch with two SFP ports, similar to the other GS1900 switches.
Specifications
--------------
* Device: ZyXEL GS1900-24HPv2
* SoC: Realtek RTL8382M 500 MHz MIPS 4KEc
* Flash: 16 MiB
* RAM: W631GG8MB-12 128 MiB DDR3 SDRAM
(stock firmware is configured to use only 64 MiB)
* Ethernet: 24x 10/100/1000 Mbps, 2x SFP 100/1000 Mbps
* LEDs: 1 PWR LED (green, not configurable)
1 SYS LED (green, configurable)
24 ethernet port link/activity LEDs (green, SoC controlled)
24 ethernet port PoE status LEDs
2 SFP status/activity LEDs (green, SoC controlled)
* Buttons: 1 "RESTORE" button on front panel
1 "RESET" button on front panel
* Power 120-240V AC C13
* UART: 1 serial header (J41) with populated standard pin connector on
the left edge of the PCB, angled towards the side.
The casing has a rectangular cutout on the side that provides
external access to these pins.
Pinout (front to back):
+ GND
+ TX
+ RX
+ VCC
Serial connection parameters for both devices: 115200 8N1.
Installation
------------
OEM upgrade method:
(Possible on master once https://patchwork.ozlabs.org/project/openwrt/patch/20210624210408.19248-1-bjorn@mork.no/ is merged)
* Log in to OEM management web interface
* Navigate to Maintenance > Firmware > Management
* If "Active Image" has the first option selected, OpenWrt will need to be
flashed to the "Active" partition. If the second option is selected,
OpenWrt will need to be flashed to the "Backup" partition.
* Navigate to Maintenance > Firmware > Upload
* Upload the openwrt-realtek-generic-zyxel_gs1900-24hp-v2-initramfs-kernel.bin
file by your preferred method to the previously determined partition.
When prompted, select to boot from the newly flashed image, and reboot the switch.
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade -n /tmp/openwrt-realtek-generic-zyxel_gs1900-24hp-v2-squashfs-sysupgrade.bin
it may be necessary to restart the network (/etc/init.d/network restart) on
the running initramfs image.
U-Boot TFTP method:
* Configure your client with a static 192.168.1.x IP (e.g. 192.168.1.10).
* Set up a TFTP server on your client and make it serve the initramfs image.
* Connect serial, power up the switch, interrupt U-boot by hitting the
space bar, and enable the network:
> rtk network on
* Since the GS1900-24HPv2 is a dual-partition device, you want to keep the OEM
firmware on the backup partition for the time being. OpenWrt can only boot
from the first partition anyway (hardcoded in the DTS). To make sure we are
manipulating the first partition, issue the following commands:
> setsys bootpartition 0
> savesys
* Download the image onto the device and boot from it:
> tftpboot 0x84f00000 192.168.1.10:openwrt-realtek-generic-zyxel_gs1900-24hp-v2-initramfs-kernel.bin
> bootm
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade -n /tmp/openwrt-realtek-generic-zyxel_gs1900-24hp-v2-squashfs-sysupgrade.bin
it may be necessary to restart the network (/etc/init.d/network restart) on
the running initramfs image.
Signed-off-by: Soma Zambelly <zambelly.soma@gmail.com>
A superflus ')' character has slipped into commit 91a52f22a1. Remove it
to fix build.
Fixes: 91a52f22a1 ("treewide: backport support for nvmem on non platform devices")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
In the current state, nvmem cells are only detected on platform device.
To quickly fix the problem, we register the affected problematic driver
with the of_platform but that is more an hack than a real solution.
Backport from net-next the required patch so that nvmem can work also
with non-platform devices and rework our current patch.
Drop the mediatek and dsa workaround and rework the ath10k patches.
Rework every driver that use the of_get_mac_address api.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
This reverts commit b7ee0786b5.
With the previous commit "realtek: remove rtl83xx vlan 1 special cases"
this is no longer required.
Signed-off-by: Thomas Nixon <tom@tomn.co.uk>
On reset, the PVID of all ports is set to 1; if this is reset to 0,
the special cases for VLAN 1 are no longer required.
port_vlan_add is called with vid=0 when the DSA port interfaces are
enabled with no VLAN; previously the VLAN was not configured in this
case, relying on VLAN 1 being present, but with the PVID set to 0,
configuring VLAN 0 as normal works as expected.
Signed-off-by: Thomas Nixon <tom@tomn.co.uk>
sysupgrade metadata is not flashed to the device, so check-size
should be called _before_ adding metadata to the image.
While at it, do some obvious wrapping improvements.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Paul Spooren <mail@aparcar.org>
The RTL8380-RTL9300 switches only forward packets when VLAN ID 1 is
configured. Do not use the standard failsafe configuration for DSA
accessing the default port directly, but configure a switch on the lan1
interface instead.
This will add the VLAN ID 1 configuration to the switch:
$ bridge vlan show
port vlan-id
lan1 1 PVID Egress Untagged
switch 1 PVID Egress Untagged
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fixes the buffer and packet length calculations for Ethernet TX on
the RTL8380 SoC when CRC calculation offload is enabled.
CRC-offload is always done by the SoC, but additional CRC
calculation was previously done also by the kernel.
It also fixes detection of the DSA tag for packets on RTL8390
SoCs for ports > 28.
v2 has correct whitespace
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Replace "ifname" with "device" as netifd has been recently patches to
used the later one. It's more clear and accurate.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This adds the CPU port to the unknown multicast flooding port mask,
which fixes the VLAN issues introduced by the multicast group patches
Tested-by: Russell Senior <russell@personaltelco.net> [Netgear GS108Tv3]
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bjørn Mork <bjorn@mork.no> [whitespace fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz> [unknwon typo fix]
Adds support for Layer 2 multicast by implementing the DSA port_mdb_*
callbacks. The Kernel bridge listens to IGMP/MLD messages trapped to
the CPU-port, and calls the Multicast Forwarding Database updates.
The updates manage the L2 forwarding entries and the multicast
port-maps.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This sets up all VLANs with a default configuration on reset:
- forward based on VLAN-ID and not the FID/MSTI
- forward based on the inner VLAN-ID (not outer)
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds SoC specific VLAN configuration routines, which
alsoe sets up the portmask table entries that are referred to
in the vlan profiles registers for unknown multicast flooding.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the MMD access registers the RTL-SoCs use to access clause 45
PHYs via mdio.
This new interface is used to add EEE-support for the RTL8226
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds a hash-bucket size attribute for the different SoCs, in order to
accomodate the buckets with 8 entries of the L2-forwarding tables
on RTL93XX in contrast to only 4 on RTL83XX.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds snooping support for IGMP and MLD on RTL8380/90/9300
by trapping IGMP and MLD packets to the CPU.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Enables CRC calculation offloading on RTL8380/8390/9300.
Tested on Zyxel XGS1210-10 (RTL9302)/GS1900-48 (RTL8390)/GS1900-10HP (RTL8382)
On the Zyxel GS1900-10HP, an increase of 5% in iperf3 send throughput
and 11% in receive throughput is seen.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
INABA Abaniact AML2-17GP is a 17 port gigabit switch, based on RTL8382.
Specification:
- SoC : Realtek RTL8382
- RAM : DDR3 128 MiB (SK hynix H5TQ1G63EFR)
- Flash : SPI-NOR 32 MiB (Macronix MX25L25635FZ2I-10G)
- Ethernet : 10/100/1000 Mbps x17
- port 1-8 : RTL8218B (SoC)
- port 8-16 : RTL8218D
- port wan : RTL8214FC
- LEDs/Keys : 1x, 1x
- UART : pin header on PCB (Molex 530470410 compatible)
- J14: 3.3V, GND, RX, TX from rear side
- 115200n8
- Power : 100-240 VAC, 50/60 Hz, 0.21 A
- Plug : IEC 60320-C13
Flash instruction using initramfs image:
1. Boot AML2-17GP normally
2. Set the IP address of computer to the range of 192.168.1.0/24, other
than 192.168.1.248 and connect computer to "WAN/CONSOLE" port of
AML2-17GP
3. Access to "http://192.168.1.248" and open firmware setting page
-- UI Language: 日本語 --
"メンテナンス" -> "デュアルイメージ"
-- UI Language: ENGLISH --
"Maintenance" -> "Dual Image"
4. Check "イメージ情報 (en: "Images Information")" and set the first
image to active by choosing "アクティブイメージ" (en: "Active
Image") in the partition "0"
5. open firmware upgrade page
-- UI Language: 日本語 --
"メンテナンス" -> "アップグレードマネージャー"
-- UI Language: ENGLISH --
"Maintenance" -> "Upgrade Manager"
6. Set the properties as follows
-- UI Language: 日本語 --
"アップグレード方式" : "HTTP"
"アップグレードタイプ" : "イメージ"
"イメージ" : "アクティブ"
"ブラウズファイル" : (select the OpenWrt initramfs image)
-- UI Language: ENGLISH --
"Upgrade Method" : "HTTP"
"Upgrade Type" : "Image"
"Image" : "(Active)"
"Browse file" : (select the OpenWrt initramfs image)
7. Press "アップグレード" (en: "Upgrade") button and perform upgrade
8. Wait ~150 seconds to complete flashing
9. After the flashing, the following message is showed and press "OK"
button to reboot
-- UI Language: 日本語 --
"成功!! 今すぐリブートしますか?"
-- UI Language: ENGLISH --
"Success!! Do you want to reboot now?"
10. After the rebooting, reconnect the cable to other port (1-16) and
open the SSH connection, download the sysupgrade image to the device
and perform sysupgrade with it
11. Wait ~120 seconds to complete sysupgrade
Note:
- The uploaded image via WebUI will only be written with the length
embedded in the uImage header. If the sysupgrade image is specified,
only the kernel is flashed and lacks the rootfs, this causes a kernel
panic while booting and bootloops.
To avoid this issue, initramfs image is required for flashing on WebUI
of stock firmware.
- This device has 1x LED named as "POWER", but it's not connected to the
GPIO of SoC and cannot be controlled.
- port 17 is named as "WAN/CONSOLE". This port is for the upstream
connection and console access (telnet/WebUI) on stock firmware.
Back to stock firmware:
1. Set "bootpartition" variable in u-boot-env2 partition to "1" by
fw_setsys
fw_setsys bootpartition 1
2. Reboot AML2-17GP
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The Netgear GS308T v1 is an 8 port gigabit switch. The GS310TP v1 is an 8
port POE+ gigabit switch with 2 SFP Ports (currently untested).
The GS308T v1 and GS310TP v1 are quite similar to the Netgear GS1xx
devices already supported. Theses two devices use the same Netgear
firmware and are very similar to there corresponding GS1xx devices. For
this reason they share a large portion of the device tree with the GS108T
and GS110TP with exception of the uimage magic and model and compatible
values.
All of the above feature a dual firmware layout, referred to as Image0
and Image1 in the Netgear firmware.
In order to manipulate the PoE+ on the GS310TP v1 , one needs the
rtl83xx-poe package
Specifications (GS308T)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T ports, internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 12V 1A barrel connector
Specifications (GS310TP)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* Nuvoton M0516LDN for controlling PoE
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T PoE+ ports, 2 x Gigabit SFP ports,
internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 54V 1.25A barrel connector
Both devices have UART pinout
-----------
J1 | [o]ooo
^ ||`------ GND
| |`------- RX [TX out of the serial adapter]
| `-------- TX [RX into the serial adapter]
`---------- Vcc (3V3) [the square pin]
The through holes are filled with PB-free solder which melts at 375C.
They can also be drilled using a 0.9mm bit.
Installation
------------
Instructions are identical to those for the similar Negear devices
and apply both to the GS308T v1 and GS310TP v1 as well.
-------------------
Boot initramfs image from U-Boot
--------------------------------
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Init network with `rtk network on` command
3. Load image with `tftpboot 0x8f000000
openwrt-realtek-generic-netgear_gs308t-v1-initramfs-kernel.bin` command
4. Boot the image with `bootm` command
The switch defaults to IP 192.168.1.1 and tries to fetch the image via
TFTP from 192.168.1.111.
Updating the installed firmware
-------------------------------
The OpenWRT ramdisk image can be flashed directly from the Netgear UI.
The Image0 slot should be used in order to enable sysupgrade.
As with similar switches, changing the active boot partition can be
accomplished in U-Boot as follows:
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Run `setsys bootpartition {0|1}` to select the boot partition
3. Run `savesys` followed by `boota` to proceed with the boot process
Signed-off-by: Raylynn Knight <rayknight@me.com>
Some targets select HZ=100, others HZ=250. There's no reason to select a higher
timer frequency (and 100 Hz are available in every architecture), so change all
targets to 100 Hz.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
U-Boot uses the "bootpartition" variable stored in
"u-boot-env2" to select the active system partition. Allow
updates to enable system switching from OpenWrt.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Switch the Netgear DTSI for the Realtek target from the OEM partition
naming scheme to accepted OpenWrt naming practices. A quick git grep for
'u-boot-env' e.g. in the OpenWrt tree turns up almost 500 hits whereas
grepping for 'bdinfo' (the OEM equivalent) returns a meagre 14.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Otherwise, the last defined value will be set for all devices.
Fixes: c6c8d597e1 ("realtek: Add generic zyxel_gs1900 image definition")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The rtl83xx-phy driver is necessary for proper configuration of the
PHYs if U-Boot hasn't done that.
1000Base-T SFPs often contains a Marvell 88E1111 and will not work
without this driver. Include it by default to support copper SFPs.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
There is no need to define a static link or a phy for the sfp
ports. Using phy-mode and managed properties to describe the
link to the sfp phy.
We have to keep the now unconnected virtual "phys" because the
switch driver uses their "phy-is-integrated" property to figure
out which ports to enable as fibre ports.
Acked-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
From the validate docs in include/linux/phylink.h:
When state->interface is PHY_INTERFACE_MODE_NA, phylink expects the
MAC driver to return all supported link modes.
Tested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The ZyXEL GS1900-8 is a 8 port switch without any PoE functionality or
SFP ports, but otherwise similar to the other GS1900 switches.
Specifications
--------------
* Device: ZyXEL GS1900-8 v1.2
* SoC: Realtek RTL8380M 500 MHz MIPS 4KEc
* Flash: Macronix MX25L12835F 16 MiB
* RAM: Nanya NT5TU128M8GE-AC 128 MiB DDR2 SDRAM
* Ethernet: 8x 10/100/1000 Mbit
* LEDs: 1 PWR LED (green, not configurable)
1 SYS LED (green, configurable)
8 ethernet port status LEDs (green, SoC controlled)
* Buttons: 1 on-off glide switch at the back (not configurable)
1 reset button at the right side, behind the air-vent
(not configurable)
1 reset button on front panel (configurable)
* Power 12V 1A barrel connector
* UART: 1 serial header (JP2) with populated standard pin connector on
the left side of the PCB, towards the back. Pins are labelled:
+ VCC (3.3V)
+ TX (really RX)
+ RX (really TX)
+ GND
the labelling is done from the usb2serial connector's point of
view, so RX/ TX are mixed up.
Serial connection parameters for both devices: 115200 8N1.
Installation
------------
Instructions are identical to those for the GS1900-10HP and GS1900-8HP.
* Configure your client with a static 192.168.1.x IP (e.g. 192.168.1.10).
* Set up a TFTP server on your client and make it serve the initramfs
image.
* Connect serial, power up the switch, interrupt U-boot by hitting the
space bar, and enable the network:
> rtk network on
* Since the GS1900-10HP is a dual-partition device, you want to keep the
OEM firmware on the backup partition for the time being. OpenWrt can
only boot off the first partition anyway (hardcoded in the DTS). To
make sure we are manipulating the first partition, issue the following
commands:
> setsys bootpartition 0
> savesys
* Download the image onto the device and boot from it:
> tftpboot 0x84f00000 192.168.1.10:openwrt-realtek-generic-zyxel_gs1900-8-initramfs-kernel.bin
> bootm
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-generic-zyxel_gs1900-8-squashfs-sysupgrade.bin
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Demote a number of debugging printk's to pr_debug to avoid log
nosie. Several of these functions are called as a result of
userspace activity. This can cause a lot of log noise when
userspace does periodic polling.
Most of this could probably be removed completely, but let's
keep it for now since these drivers are still in development.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
So far, board.d files were having execute bit set and contained a
shebang. However, they are just sourced in board_detect, with an
apparantly unnecessary check for execute permission beforehand.
Replace this check by one for existance and make the board.d files
"normal" files, as would be expected in /etc anyway.
Note:
This removes an apparantly unused '#!/bin/sh /etc/rc.common' in
target/linux/bcm47xx/base-files/etc/board.d/01_network
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
5.4.102 backported a lot of stuff that our WireGuard backport already
did, in addition to other patches we had, so those patches were
removed from that part of the series. In the process other patches were
refreshed or reworked to account for upstream changes.
This commit involved `update_kernel.sh -v -u 5.4`.
Cc: John Audia <graysky@archlinux.us>
Cc: David Bauer <mail@david-bauer.net>
Cc: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
The Netgear GS108T v3 is an 8 port gigabit switch with PoE-PD support
on port 1. The two prior versions were built using eCos and are not
currently compatible with OpenWRT.
The GS108T v3 is quite similar to both the GS110TPP v1 and GS110TP v3,
all of which use the same firmware image from Netgear. For this reason,
the device tree is identical aside from the model and compatible values.
All of the above feature a dual firmware layout, referred to as Image0
and Image1 in the Netgear firmware.
Hardware specification
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Macronix MX25L25635F or Winbond W25Q256JVFIQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T ports, internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 12V 1A barrel connector or 802.3af
UART pinout
-----------
J1 | [o]ooo
^ ||`------ GND
| |`------- RX [TX out of the serial adapter]
| `-------- TX [RX into the serial adapter]
`---------- Vcc (3V3) [the square pin]
The through holes are filled with PB-free solder which melts at 375C.
They can also be drilled using a 0.9mm bit.
Build configuration
-------------------
* Target System: Realtek MIPS
* Target Profile: Netgear GS108T v3
* Target Images -> ramdisk -> Compression: lzma
* Disable other target images
Boot initramfs image from U-Boot
--------------------------------
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Init network with `rtk network on` command
3. Load image with `tftpboot 0x8f000000 openwrt-realtek-generic-netgear_gs108t-v3-initramfs-kernel.bin` command
4. Boot the image with `bootm` command
The switch defaults to IP 192.168.1.1 and tries to fetch the image via
TFTP from 192.168.1.111.
Updating the installed firmware
-------------------------------
The OpenWRT ramdisk image can be flashed directly from the Netgear UI.
The Image0 slot should be used in order to enable sysupgrade.
As with similar switches, changing the active boot partition can be
accomplished in U-Boot as follows:
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Run `setsys bootpartition {0|1}` to select the boot partition
3. Run `savesys` followed by `boota` to proceed with the boot process
Signed-off-by: Michael Mohr <akihana@gmail.com>
Move most of the GS110TPP v1 device tree into a dtsi so that it can be
shared with the GS108T v3. Additionally:
* Use macros to simplify the ethernet and switch definitions
* Zero-pad the offsets and sizes in the partition map to 8 digits each
The spi-max-frequency value has been changed from 10MHz to 50MHz based
on an analysis of the relevant datasheets. The current driver doesn't
use this property, as the clock speed is fixed. However, it's required
for this type of DT node, so that's why it's present here.
The firmware partition has been split in half, since this is how the
stock firmware uses it. This can be used to easily revert to a stock
firmware if one is written to the second image area.
Signed-off-by: Michael Mohr <akihana@gmail.com>
The netgear_nge device will be shared between the GS108T v3 (to be added
in a later commit) and the GS110PP v1. It also enables LZMA compression
for the ramdisk image.
Signed-off-by: Michael Mohr <akihana@gmail.com>
Add a table API that has per accss register locking and uses
register description information to handle all table access
through a single set of api calls.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds support for the RTL9300 and RTL9310 series of switches
with 10GBit per port and up to 56 ports.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the internal SerDes of the RTL9300 SoC
and for the RTL8218D and RTL8226B phys found in combination
with this SoC in switches.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This fixes the usage of the RTL8231 GPIO extender chip
when used with the RTL839X SoCs. Specifically,
the PHY addresses may be different from 0.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
