Commit Graph

339 Commits

Author SHA1 Message Date
Markus Stockhausen
3f41360eb7 realtek: use upstream recommendation for secondary CPU start
Currently we fix interrupts/timers for the secondary CPU by patching
vsmp_init_secondary(). Get a little bit more generic and use the
upstream recommended way instead. Additionally avoid a check around
register_cps_smp_ops() because it does that itself.

See https://lkml.org/lkml/2022/9/12/522

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-09-18 20:38:56 +02:00
Markus Stockhausen
bcb5d6b21b realtek: avoid wrong interrupt routing
The interrupt controller depends on two control registers. GIMR enables
or disables interrupts and IRRx routes these to MIPS CPU interrupts 2-7.
Wiki currently states "A value of '0' (in IRRx) disconnects this input from
the output line, independent of the line's setting in GIMR."

Contrary to normal intuition this statement DOES NOT mean, that interrupts
can be disabled by IRRx alone. The sad truth was discovered by enabling
SMP for an Zyxel XGS1010 on the 930x target. It shows that driver and
interrupts behave as follows:

- Timer 0 interrupt 7 has active routing to CPU0 and no routing to CPU1
- Timer 1 interrupt 8 has no routing to CPU0 and active routing to CPU1
- Unmasking (enabling) interrupts writes 1 bits to all GIMR registers
- Masking (disabling) interrupts writes 0 bits to both GIMR registers

During operation we can encounter a situation like

- GIMR bit for a interrupt/CPU combination is set to enabed (=1)
- IRRx routing bits for a interrupt/CPU combination are set to disabed (=0)

This setting already allows the hardware to fire interrupts to the target
CPU/VPE if the other CPU/VPE is currently busy. Especially for CPU bound
timer interrupts this is lethal. If timer interrupt 7 arrives at CPU1 and
vice versa for interrupt 8 the restart trigger gets lost. The timer dies
and a msleep() operation in the kernel will halt endlessly.

Fix this by tracking the IRRx active routing setting in a new bitfield with
0="routing active" and 1="no routing". Enable interrupts in GIMR only
for a interrupt & CPU if routing is active. Thus we have

- GIMR = 0 / IRRx = 0 -> everything disabled
- GIMR = 1 / IRRx > 0 -> active and normal routing
- GIMR = 0 / IRRx > 0 -> masked (disabled) with normal routing
- GIMR = 1 / IRRx = 0 -> no longer possible

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-09-18 20:38:56 +02:00
Sander Vanheule
fe5a2f334f realtek: use Device prefix for common recipes
The Build prefix is used for image build commands, while the Device
prefix should be used for base recipes for devices. Apply the same
naming convention here.

While touching the file, also fix the mixed indentation.

Suggested-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-09-18 10:12:19 +02:00
Olliver Schinagl
d2fa68379f realtek: move Netgear recipe to subtarget Makefile
There seems to be no reason to have the Netgear switches as part of
the main Makefile. Move it to its subtarget-specific Makefile since
it is only applicable there.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
[update commit message]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-09-17 22:27:32 +02:00
Sander Vanheule
51ecfb086c realtek: move hpe_1920 recipe to common.mk
Currently supported HPE 1920 devices all have an RTL838x SoC, but there
are larger switches with RTL839x SoCs, although currently not supported.
Move the build recipe to common.mk so the larger devices can also make
use of the recipe, while moving it out of the main Makefile.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-09-17 22:20:32 +02:00
Sander Vanheule
9338c09ecb realtek: merge duplicated DGS-1210 recipes
The D-Link DGS-1210 device series currently has supported devices with
both RTL838x and RTL839x SoCs. An image build recipe has been defined in
both subtarget makefiles, but these are mostly identical, save for the
SOC variable.

Move the SOC variable from the DGS-1210 build recipes to the applicable
devices, and put the remaining duplicate code in a shared Makefile.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-09-17 22:12:35 +02:00
Markus Stockhausen
e04e821471 realtek: add support for DGS-1210-52
Hardware specification
----------------------

* RTL8393M SoC, 1 MIPS 34Kc core @ 700MHz
* 128MB DRAM
* 32MB NOR Flash
* 48 x 10/100/1000BASE-T ports
  - 6 x External PHY with 8 ports (RTL8218D)
* 4 x Gigabit RJ45/SFP Combo ports
  - External PHY with 4 SFP ports (RTL8214FC)
* Power LED
* Reset button on front panel
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J14

The gpio-restart node is not required but it does reset the switch.

TODO: The 4 combo ports attached to the RTL8214FC are not detect
properly. Linux kernel reports 49 and 50 as "External RTL8393 SERDES"
and 51 and 52 as "RTL8218B (external)". Those ports only work if
u-boot initialize it (for example, loading initramfs image using one
of those ports). A patch to PHY detection is needed for full support.

The firmware recovery using U-Boot is broken for all DGS-1210 tested
devices as pressing RESET does not trigger it (only if pressed from a
running stock image)

UART pinout
-----------

[o]ooo|J14
 | ||`------ GND
 | |`------- RX
 | `-------- TX
 `---------- Vcc (3V3)

Installation using OEM upgrade
------------------------------

1. Make sure you are running OEM firmware in image2 slot (logged as admin):
   - > config firmware image_id 2 boot_up
   - > reboot
2. Install squashfs-factory_image1.bin to image1 using (logged as admin):
   - > download firmware_fromTFTP <tftpserver> factory_image1.bin
   - > config firmware image_id 1 boot_up
   - > reboot

Installation using serial interface
-----------------------------------

1. Press Escape key during `Hit Esc key to stop autoboot` prompt
2. Press CTRL+C keys to get into real U-Boot prompt
3. Init network with `rtk network on` command
4. Load image with `tftpboot 0x8f000000 openwrt-realtek-rtl839x-d-link_dgs-1210-52-initramfs-kernel.bin` command
5. Boot the image with `bootm` command

Once booted the initramfs, install the squashfs-sysupgrade.bin as a
normal OpenWrt system.

Dual-boot with stock firmware using writable u-boot-env
-------------------------------------------------------

From stock to OpenWrt / boot image 1 (CLI as admin):
   - > config firmware image_id 1 boot_up
   - > reboot

From OpenWrt to stock / boot image 2: (shell as root)
   - # fw_setenv bootcmd 'run addargs ; bootm 0xb4e80000'
   - # fw_setenv image '/dev/mtdblock7'
   - # reboot

Debrick using serial interface
------------------------------

1. Press Escape key during `Hit Esc key to stop autoboot` prompt
2. In a Windows PC, run 'D-Link Network Assistant v2.0.2.4'. It should
   detect the switch
3. Flash the firmware.

Back to stock firmware using dual-boot
--------------------------------------

If you have serial interface, you can change u-boot env vars
interrupting the boot process. If not but you are running OpenWrt, you
can dual-boot (as mentioned eariler) and skip to step 4:

1. Press Escape key during `Hit Esc key to stop autoboot` prompt
2. Press CTRL+C keys to get into real U-Boot prompt
3. Boot the image 2:
   - set image /dev/mtdblock7; run addargs; bootm 0xb4e80000
4. Once booted, log as admin and change the boot image to 2
   - > config firmware image_id 2 boot_up
   - > reboot
5. After the boot, flash image1 with the vendor image

Back to stock firmware using DNA
--------------------------------

1. From an OpenWrt:
   - # fw_setenv bootstop on
   - # reboot
2. In a Windows PC, run 'D-Link Network Assistant v2.0.2.4'. It should
   detect the switch
3. Flash the firmware.

It has been developed and tested on device with F3 revision.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
2022-09-17 21:28:21 +02:00
Markus Stockhausen
9ed1a1138e realtek: align DT macros in RTL839X with RTL838X
Add a missing definition to the RTL839X DT.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-09-17 21:28:21 +02:00
Markus Stockhausen
307e5cfc6e realtek: D-Link make common DT include generic
The D-Link DGS device tree was reorganized to better reflect the common
DT parts. The common include is named SOC specific (838X) and it seemed
like a good choice to add another common include in the future for the
RTL839X devices. From the current point of view this option is not really
needed.

1. The common part only includes data that matches RTL839X devices too.
2. The Panasonic DT structure avoids including the basic DTSI inside the
   common DTSI.

Taking simplicity of the Panasonic include logic and in perparation to
provide DGS-1210-52 support it makes sense to harmonize this.

- rename common include to reflect its content
- move the link to the root DTSI directly to the device specific DTS

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-09-17 21:28:21 +02:00
Olliver Schinagl
c4d030f24c
realtek: rtl838x: Fix ethernet polling timeout on probe
Due to an oversight we accidentally inverted the timeout check. This
patch corrects this.

Fixes: 9cec4a0ea4 ("realtek: Use built-in functionality for timeout loop")
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
[ wrap poll_timeout line to 80 char ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2022-09-14 18:23:06 +02:00
Olliver Schinagl
9cec4a0ea4
realtek: Use built-in functionality for timeout loop
In commit 81e3017609 ("realtek: clean up rtl838x MDIO busy wait loop")
a hand-crafted loop was created, that nearly exactly replicate the
iopoll's `read_poll_timeout` functionality.

Use that instead.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
2022-09-14 12:03:57 +02:00
Alexandru Gagniuc
01e2184c49 realtek: add support for TP-Link SG2210P
Add support for the TP-Link SG2210P switch. This is an RTL8380 based
switch with eight RJ-45 ports with 802.3af PoE, and two SFP ports.

This device shares the same board with the SG2008P and SG2008. To
model this, declare all the capabilities in the sg2xxx dtsi, and
disable unpopulated on the lower end models.

Specifications:
---------------
 - SoC:       Realtek RTL8380M
 - Flash:     32 MiB SPI flash (Vendor varies)
 - RAM:	      256 MiB (Vendor varies)
 - Ethernet:  8x 10/100/1000 Mbps with PoE (all ports)
              2x SFP ports
 - Buttons:   1x "Reset" button on front panel
 - Power:     53.5V DC barrel jack
 - UART:      1x serial header, unpopulated
 - PoE:       2x TI TPS23861 I2C PoE controller

Works:
------
  - (8) RJ-45 ethernet ports
  - (2) SFP ports (with caveats)
  - Switch functions
  - System LED

Not yet enabled:
----------------
  - Power-over-Ethernet (driver works, but doesn't enable "auto" mode)
  - PoE LEDs

Enabling SFP ports:
-------------------

The SFP port control lines are hardwired, except for tx-disable. These
lines are controller by the RTL8231 in shift register mode. There is
no driver support for this yet.

However, to enable the lasers on SFP1 and SFP2 respectively:

    echo 0x0510ff00 > /sys/kernel/debug/rtl838x/led/led_p_en_ctrl
    echo      0x140 > /sys/kernel/debug/rtl838x/led/led_sw_p_ctrl.26
    echo      0x140 > /sys/kernel/debug/rtl838x/led/led_sw_p_ctrl.24

Install via serial console/tftp:
--------------------------------

The footprints R27 (0201) and R28 (0402) are not populated. To enable
serial console, 50 ohm resistors should be soldered -- any value from
0 ohm to 50 ohm will work. R27 can be replaced by a solder bridge.

The u-boot firmware drops to a TP-Link specific "BOOTUTIL" shell at
38400 baud. There is no known way to exit out of this shell, and no
way to do anything useful.

Ideally, one would trick the bootloader into flashing the sysupgrade
image first. However, if the image exceeds 6MiB in size, it will not
work. The sysupgrade image can also be flashed. To install OpenWrt:

Prepare a tftp server with:
 1. server address: 192.168.0.146
 2. the image as: "uImage.img"

Power on device, and stop boot by pressing any key.
Once the shell is active:
 1. Ground out the CLK (pin 16) of the ROM (U7)
 2. Select option "3. Start"
 3. Bootloader notes that "The kernel has been damaged!"
 4. Release CLK as sson as bootloader thinks image is corrupted.
 5. Bootloader enters automatic recovery -- details printed on console
 6. Watch as the bootloader flashes and boots OpenWrt.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[OpenWrt capitalisation in commit message]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-09-13 09:22:26 +02:00
Alexandru Gagniuc
ab2a4c1e01 realtek: rtl8380-tl-sg2xxx: use a single "firmware" partition
The "firmware" partition was assembled from two contiguous partitions.
This complexity is unnecessary. Instead of using mtd-concat over
"sys" and "usrimg1", simply declare the "firmware" partition to cover
the flash space instead.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-09-13 09:22:26 +02:00
Alexandru Gagniuc
d55c087390 realtek: tl-sg2xxx: read MAC address from nvmem-cells
The TP-Link RTL83xx based switches have their MAC address programmed
in the "para" partition. While in theory, the format of this partition
is dynamic, in practice, the MAC address appears to be located at a
consistent address. Thus, use nvmem-cells to read this MAC address.

The main MAC is required for deriving the MAC address of the switch
ports. Instead of reading it via mtd_get_mac_binary(), alias the
ethernet0 node as the label-mac-device, and use get_mac_label().

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-09-13 09:22:26 +02:00
Alexandru Gagniuc
5f026f1272 realtek: rtl838x: label switch port dts nodes
Although PHY nodes are labeled, the port nodes were not. Labeling of
ports is useful for 'status = "disabled"' ports, which is supported
since commit 9a7f17e11f ("realtek: ignore disabled switch ports")

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-09-13 09:22:26 +02:00
Alexandru Gagniuc
bc9dcfb1ce realtek: split TP-Link SG2000 series devicetree
The TP-Link TL-SG2008, TL-SG2008P, and TL-SG2210P use the same board.
The main difference is that some footprints are not populated in the
lower-end models. To model this with minimal duplication, move the
devicetree to a common dtsi, leaving out just the board name.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[remove port relabelling from commit message, already merged with commit
 18a2b29aa1 ("realtek: tl-sg2008p: fix labeling of lan ports")]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-09-13 09:22:26 +02:00
Andreas Böhler
5f8c86e654 realtek: add support for TP-Link SG2452P v4 aka T1600G-52PS v4
This is an RTL8393-based switch with 802.3af on all 48 ports.

Specifications:
---------------
 * SoC:       Realtek RTL8393M
 * Flash:     32 MiB SPI flash
 * RAM:       256 MiB
 * Ethernet:  48x 10/100/1000 Mbps with PoE+
 * Buttons:   1x "Reset" button, 1x "Speed" button
 * UART:      1x serial header, unpopulated
 * PoE:       12x TI TPS23861 I2C PoE controller, 384W PoE budget
 * SFP:       4 SFP ports

Works:
------
  - (48) RJ-45 ethernet ports
  - Switch functions
  - Buttons
  - All LEDs on front panel except port LEDs
  - Fan monitoring and basic control

Not yet enabled:
----------------
  - PoE - ICs are not in AUTO mode, so the kernel driver is not usable
  - Port LEDs
  - SFP cages

Install via web interface:
-------------------------

Not supported at this time.

Install via serial console/tftp:
--------------------------------

The U-Boot firmware drops to a TP-Link specific "BOOTUTIL" shell at
38400 baud. There is no known way to exit out of this shell, and no
way to do anything useful.

Ideally, one would trick the bootloader into flashing the sysupgrade
image first. However, if the image exceeds 6MiB in size, it will not
work. To install OpenWRT:

Prepare a tftp server with:
 1. server address: 192.168.0.146
 2. the image as: "uImage.img"

Power on device, and stop boot by pressing any key.
Once the shell is active:
 1. Ground out the CLK (pin 16) of the ROM (U6)
 2. Select option "3. Start"
 3. Bootloader notes that "The kernel has been damaged!"
 4. Release CLK as soon as bootloader thinks image is corrupted.
 5. Bootloader enters automatic recovery -- details printed on console
 6. Watch as the bootloader flashes and boots OpenWRT.

Blind install via tftp:
-----------------------

This method works when it's not feasible to install a serial header.

Prepare a tftp server with:
 1. server address: 192.168.0.146
 2. the image as: "uImage.img"
 3. Watch network traffic (tcpdump or wireshark works)
 4. Power on the device.
 5. Wait 1-2 seconds then ground out the CLK (pin 16) of the ROM (U6)
 6. When 192.168.0.30 makes tftp requests, release pin 16
 7. Wait 2-3 minutes for device to auto-flash and boot OpenWRT

Signed-off-by: Andreas Böhler <dev@aboehler.at>
2022-09-10 22:13:52 +02:00
Bjørn Mork
2ca5602864 realtek: fix RTL839x receive tag decoding
The previous fixup was incomplete, and the offsets for the
queue and crc_error cpu_tag bitfields were still wrong on
RTL839x.

Fixes: 545c6113c9 ("realtek: fix RTL838x receive tag decoding")
Suggested-by: Jan Hoffmann <jan@3e8.eu>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
2022-09-09 22:11:55 +02:00
Bjørn Mork
545c6113c9 realtek: fix RTL838x receive tag decoding
Commit dc9cc0d3e2 ("realtek: add QoS and rate control") replaced a
16 bit reserved field in the RTL83xx packet header with the initial
cpu_tag word, shifting the real cpu_tag fields by one.  Adjusting for
this new shift was partially forgotten in the new RX tag decoders.

This caused the switch to block IGMP, effectively blocking IPv4
multicast.

The bug was partially fixed by commit 9d847244d9 ("realtek: fix
RTL839X receive tag decoding")

Fix on RTL838x too, including correct NIC_RX_REASON_SPECIAL_TRAP value.

Suggested-by: Jan Hoffmann <jan@3e8.eu>
Fixes: dc9cc0d3e2 ("realtek: add QoS and rate control")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
2022-09-08 22:28:15 +02:00
Sander Vanheule
f1802b0db7 realtek: replace fix for spurious GPIO interrupts
8 and 16 bit writes to the GPIO peripheral are apparently not supported,
and only worked most of the time. This resulted in garbabe writes to the
interrupt mask registers, causing spurious unhandled interrupts, which
could lead to CPU lock-ups as these kept retriggering.

Instead of clearing these spurious interrupt when they occur, the
upstream patch will just make sure all register writes have the intended
result, so these don't happen at all.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-09-04 20:55:15 +02:00
Markus Stockhausen
78c0fb6927 realtek: Fix missing clock module CONFIG setting
Since introduction of clock driver we have a new kernel config
setting. Provide an initial value for the 930x targets.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-08-31 23:25:39 +02:00
Markus Stockhausen
6ff21c436d realtek: fix PLL register inconsistencies
Some devices have wrong/empty values in the PLL registers. Work
around that by reporting the default values.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-08-31 23:25:39 +02:00
John Audia
e0753c5d5c kernel: bump 5.10 to 5.10.139
All patches automatically rebased.

Signed-off-by: John Audia <therealgraysky@proton.me>
2022-08-31 23:25:39 +02:00
Alexandru Gagniuc
18a2b29aa1 realtek: tl-sg2008p: fix labeling of lan ports
The SG2008P has its ethernet ports in the rear, and LEDs in the front.
The ports should be labeled lan8->lan1, not lan1->lan8. To resolve
this, fix the phy mapping in the "ports" node.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-08-29 11:54:00 +02:00
Alexandru Gagniuc
f242f642bb realtek: tl-sg2008p: use correct i2c address for TPS23861
Address 0x30 is a "broadcast" address for the TPS23861. It should not
be used by drivers, as all TPS23861 devices on the bus are supposed to
respond. Change this to the correct address, 0x28.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-08-29 11:54:00 +02:00
Sander Vanheule
9a7f17e11f realtek: ignore disabled switch ports
When marking a switch port as disabled in the device tree, by using
'status = "disabled";', the switch driver fails on boot, causing a
restart:

    CPU 0 Unable to handle kernel paging request at virtual address
    00000000, epc == 802c3064, ra == 8022b4b4
        [ ... ]
    Call Trace:
    [<802c3064>] strlen+0x0/0x2c
    [<8022b4b4>] start_creating.part.0+0x78/0x194
    [<8022bd3c>] debugfs_create_dir+0x44/0x1c0
    [<80396dfc>] rtl838x_dbgfs_port_init+0x54/0x258
    [<80397508>] rtl838x_dbgfs_init+0xe0/0x56c

This is caused by the DSA subsystem (mostly) ignoring the port, while
rtl83xx_mdio_probe() still extracts some details on this disabled port
from the device tree, resulting in the usage of a NULL pointer where a
port name is expected.

By not probing ignoring disabled ports, no attempt is made to create a
debugfs directory later. The device then boots as expected without the
disabled port.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-08-29 08:32:42 +02:00
Markus Stockhausen
48f3746fe5 realtek: switch RTL838X/RTL839X DT to new clock driver
Use new DT clockdriver syntax for RTL838X/RTL839X targets. To make it work
we need to change some nodes:
- define the external oscillator speed (25MHz)
- define SRAM
- add clock controller
- Add second CPU for RTL839X
- map all devices to new clocks
- Remove dummy LXB clock
- add CPU OPP table

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-08-28 11:48:30 +02:00
Markus Stockhausen
7c18aab6e0 realtek: activate clock driver for RTL838X/RTL839X targets
Make use the new clock driver for RTL838X and RTL839x target devices. Of course
we will enable their primary consumer (cpufreq-dt) too. To be careful just set
the default governor to userspace. As we rely on SRAM activate that module too.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-08-28 11:48:30 +02:00
Markus Stockhausen
5df36d4849 realtek: enable basic config for cpufreq framework
A new clock driver makes more sense if it can be used from consumers
like cpufreq.  Before we enable the driver we must tell the config that
the RTL838X and RTL839X targets allow CPU frequency changing.

Even though these targets currently rely on the CPU's internal R4K
timer, MIPS_EXTERNAL_TIMER is selected to allow for CPU frequency change
testing. The Realtek timers, which are clocked by the Lexra bus, still
need to be supported and used in order to provide correct wall times
when reclocking the CPU.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[add paragraph about MIPS_EXTERNAL_TIMER to commit message]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-08-28 11:45:03 +02:00
Markus Stockhausen
800d5fb3c6 realtek: add patch to enable new clock driver in kernel
Allow building the clock driver with kernel config options.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-08-28 11:31:21 +02:00
Markus Stockhausen
4850bd887c realtek: add RTL83XX clock driver
Add a new self-contained combined clock & platform driver that allows to
access the PLL hardware clocks of RTL83XX devices. Currently it provides
info about CPU, MEM and LXB clocks on RTL838X and RTL839X devices and
additionally allows to change the CPU clocks. Changing the clocks
multiple times on a DGS-1210-20 and a DGS-1210-52 already works well and
is multithreading safe on the RTL839X. Even a cpufreq initiated change
of the CPU clock works fine. Loading the driver will add some meaningful
logging.

[0.000000] rtl83xx-clk: initialized, CPU 500 MHz, MEM 300 MHz (8 Bit DDR3), LXB 200 MHz
[0.279456] rtl83xx-clk soc:clock-controller: rate setting enabled, CPU 325-600 MHz,
           MEM 300-300 MHz, LXB 200-200 MHz, OVERCLOCK AT OWN RISK

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[remove trailing whitespaces, C-style SPDX comments for ASM and headers]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-08-28 11:30:58 +02:00
Markus Stockhausen
1efaad03bb realtek: add PLL DT binding includes
Add some constants for sharing between DT and drivers.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-08-28 11:03:34 +02:00
Markus Stockhausen
396e190f0b realtek: more generic platform initialization
Platform startup still "guesses" the CPU clock speed by DT fixed values.
If possible take clock rates from a to be developed driver and align to
MIPS generic platfom initialization code. Pack old behaviour into a
fallback function. We might get rid of that some day.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2022-08-20 11:49:30 +02:00
Daniel Groth
8c04a5c456 realtek: d-link: add support for dgs-1210-10mp
General hardware info:
-------------------------------------------------------------------------------

D-Link DGS-1210-10MP is a switch with 8 ethernet ports and 2 SFP ports, all
ports Gbit capable. It is based on a RTL8380 SoC @ 500MHz, DRAM 128MB and
32MB flash. All ethernet ports are 802.3af/at PoE capable
with a total PoE power budget of 130W.

File info:
-------------------------------------------------------------------------------
The dgs-1210-10mp is very similar to dgs-1210-10p so I used that as a start.

rtl838x.mk:
 - Removed lua-rs232 package since it was a leftover from the old rtl83xx-poe
   package.
 - Updated the soc to 8380.
 - Specified device variant: F.
 - Installed the new realtek-poe package.

rtl8380_d-link_dgs-1210-10mp.dts:
 - Moved dgs-1210 family common parts and non PoE related ports on rtl8231
   to the new device tree dtsi files.

Serial connection:
-------------------------------------------------------------------------------
The UART for the SoC (115200 8N1) is available close to the front panel next
to the LED/key card connector via unpopulated standard 0.1" pin header
marked j4. Pin1 is marked with arrow and square.

Pin 1: Vcc 3,3V
Pin 2: Tx
Pin 3: Rx
Pin 4: Gnd

Installation with TFTP from u-boot
-------------------------------------------------------------------------------
I originally used the install procedure:
'OpenWrt installation using the TFTP method and serial console access' found
in the device wiki for the dgs-1210-16.
< https://openwrt.org/toh/d-link/dgs-1210-16_g1#openwrt_installation_using
_the_tftp_method_and_serial_console_access >

About the realtek-poe package
-------------------------------------------------------------------------------
The realtek-poe package is installed but there isn't any automatic PoE config
setting at this time so for now the PoE config must be edited manually.

Original OEM hardware/firmware data at first installation
-------------------------------------------------------------------------------
It has been installed, developed, and tested on a device with these OEM
hardware and firmware versions.

- U-boot: 2011.12.(2.1.5.67086)-Candidate1 (Jun 22 2020 - 15:03:58)
- Boot version: 1.01.001
- Firmware version: 6.20.007
- Hardware version: F1

Things to be done when support are developed
-------------------------------------------------------------------------------
 - realtek-poe has been included in OpenWrt but the automatic config handling
   has not been solved yet so in the future there will probably be some minor
   updates for this device to handle the poe config.
 - LED link_act and poe are per function supposed to be connected to the PoE
   system.
   But some software development is also needed to make this LED work and
   shift the LED array between act and poe indication and to shift the mode
   lights with mode key.
 - LED poe_max should probably be used as straight forward error output from
   the realtek-poe package error handling. But no code has been written for
   this.
 - SFP is currently not hot pluggable. Development is under progress to get
   working I2C communication with SFP and have them hot pluggable.
   When any device in the dgs-1210 family gets this working, I expect it
   should be possible to implement the same solution in this device.

Signed-off-by: Daniel Groth <flygarn12@gmail.com>
[Capitalisation of abbreviations, DEVICE_VARIANT and update filenames,
device compatibles on single line]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-08-20 09:02:44 +02:00
Daniel Groth
51ec9b3864 realtek: d-link: dgs-1210 remake of the device tree
I have collected the known information from the dts files we have.
After that I made a new device tree that should work for this whole D-Link
switch family.
This device tree is based on modules where you first select which SoC group
the device belongs to. Then you include the GPIO dtsi file depending on what
hardware your device has, see examples below.
This tree is also expandable for more hardware,
see the part 'Future expansion possibilities' further down.

-------------------------------------------------------------------------------
The device tree now looks like this:
                            ----------------
                            | rtl838x.dtsi |    // Note 1.
                            ----------------
                                    |
                                    |
                    ---------------------------------------
                    | rtl838x_d-link_dgs-1210_common.dtsi | // Note 2.
                    ---------------------------------------
                                |
                                |       --------------
                                |-------| device.dts |      // Note 3.
                                |       --------------
                                |
                -------------------------------------
                | rtl83xx_d-link_dgs-1210_gpio.dtsi |       // Note 4.
                -------------------------------------
                                |
                                |       --------------
                                |-------| device.dts |      // Note 5.
                                        --------------

Note 1; Included in rtl838x_d-link_dgs-1210_common.dtsi.

Note 2; SoC level information and memory mapping. Choose which one to include
		in the device dts.

Note 3; At this point dgs-1210-16 will come out here.

Note 4; In this dtsi only common board hardware based on the rtl8231 is found.
	No PoE based hardware in this dtsi.
	In this dtsi there is no <#include> to above *_common.dtsi.

Note 5; Device dts with only rtl8231 based hardware without PoE will come out
		here.

-------------------------------------------------------------------------------
How to set up in dts file:

The device dts will have one of these two <#include> alternatives.

This alternative includes only common features:
<#include "rtl838x_d-link_dgs-1210_common.dtsi">

This alternative includes common and the rtl8231 GPIO (no PoE) features:

<#include "rtl838x_d-link_dgs-1210_common.dtsi">
<#include "rtl83xx_d-link_dgs-1210_gpio.dtsi">

-------------------------------------------------------------------------------
Implementation:

Finally, I also implemented this new family device tree on the current
supported devices:
dgs-1210-10p
dgs-1210-16
dgs-1210-20
dgs-1210-28

The implementation for the dgs-1210-10p is different. I have removed the
information from the rtl8382_d-link_dgs-1210-10p.dts that is already present
in rtl838x_d-link_dgs-1210_common.dtsi.
Since the rest isn't officially probed in the device dts I do not want to
include the rtl83xx_d-link_dgs-1210_gpio.dtsi with dgs-1210-10p.dts.

Since I don't have these devices to test on I have built the original firmware
for each one of these devices before this change and saved the dtb file and
then compared the original dtb file with the dtb file built with this new
device tree.

-------------------------------------------------------------------------------
Future expansion possibilities:

In parallel with the rtl838x_d-link_dgs-1210_common.dtsi in the tree map
we can make a rtl839x_d-link_dgs-1210_common.dtsi to use the rtl839x.dtsi if
the need arises with more devices based on rtl839x soc.

When we have more PoE devices so the hardware map for these gets more clear
we can make a rtl83xx_d-link_dgs-1210_poe.dtsi below
the rtl83xx_d-link_dgs-1210_gpio.dtsi in the tree map.

I looked at the port and switch setup to see if it could be moved to the dtsi.
I decided not to touch this part now. The reason was that there isn't really
any meaningful way this could be shared between the devices.
The only thing in common over the family is the 8+2sfp ports on the
dgs-1210-10xx device.
And then there is the hot plug SFP and I2C ports that aren’t implemented
on any device. So maybe when we see the whole port map for the family
then maybe the ports can be moved to a *_common.dtsi but I don't think it is
the right moment for that now.

Signed-off-by: Daniel Groth <flygarn12@gmail.com>
[Capitalisation of abbreviations and 'D-Link']
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-08-20 09:02:44 +02:00
Alexandru Gagniuc
6d5873a162 realtek: add support for TP-Link SG2008P
Add support for the TP-Link SG2008P switch. This is an RTL8380 based
switch with 802.3af one the first four ports.

Specifications:
---------------
 * SoC:       Realtek RTL8380M
 * Flash:     32 MiB SPI flash (Vendor varies)
 * RAM:       256 MiB (Vendor varies)
 * Ethernet:  8x 10/100/1000 Mbps with PoE on 4 ports
 * Buttons:   1x "Reset" button on front panel
 * Power:     53.5V DC barrel jack
 * UART:      1x serial header, unpopulated
 * PoE:       1x TI TPS23861 I2C PoE controller

Works:
------
  - (8) RJ-45 ethernet ports
  - Switch functions
  - System LED

Not yet enabled:
----------------
  - Power-over-Ethernet (driver works, but doesn't enable "auto" mode)
  - PoE, Link/Act, PoE max and System LEDs

Install via web interface:
-------------------------

Not supported at this time.

Install via serial console/tftp:
--------------------------------

The footprints R27 (0201) and R28 (0402) are not populated. To enable
serial console, 50 ohm resistors should be soldered -- any value from
0 ohm to 50 ohm will work. R27 can be replaced by a solder bridge.

The u-boot firmware drops to a TP-Link specific "BOOTUTIL" shell at
38400 baud. There is no known way to exit out of this shell, and no
way to do anything useful.

Ideally, one would trick the bootloader into flashing the sysupgrade
image first. However, if the image exceeds 6MiB in size, it will not
work. The sysupgrade image can also be flashed. To install OpenWRT:

Prepare a tftp server with:
 1. server address: 192.168.0.146
 2. the image as: "uImage.img"

Power on device, and stop boot by pressing any key.
Once the shell is active:
 1. Ground out the CLK (pin 16) of the ROM (U7)
 2. Select option "3. Start"
 3. Bootloader notes that "The kernel has been damaged!"
 4. Release CLK as sson as bootloader thinks image is corrupted.
 5. Bootloader enters automatic recovery -- details printed on console
 6. Watch as the bootloader flashes and boots OpenWRT.

Blind install via tftp:
-----------------------

This method works when it's not feasible to install a serial header.

Prepare a tftp server with:
 1. server address: 192.168.0.146
 2. the image as: "uImage.img"
 3. Watch network traffic (tcpdump or wireshark works)
 4. Power on the device.
 5. Wait 1-2 seconds then ground out the CLK (pin 16) of the ROM (U7)
 6. When 192.168.0.30 makes tftp requests, release pin 16
 7. Wait 2-3 minutes for device to auto-flash and boot OpenWRT

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-08-13 19:59:47 +02:00
Alexandru Gagniuc
7bba7ccde9 realtek: EnGenius EWS2910P: use the mtd3 partition for root overlay
The root overlay is mounted on the "rootfs_data" partition. This comes
at the end of the firmware image, courtesy of mtdsplit. There is very
little space left (About 1MB), which can fill up rapidly.

The "firmware" and "firmware2" partitions are part of the bootloader
dual firmware logic. They should contain independent, valid uImages.
This leaves "jffs2-cfg" (mtd3) and "jffs2-log" (mtd4) as candidates.

mtd3 is about 13.7 MB and is used by the vendor firmware to store
configuration settings. It is only erased by vendor firmware during a
factory reset. By naming this partition "rootfs_data", it becomes the
root overlay, providing significantly more room. Even with mtdsplit
wanting to create a "rootfs_data" on the firmware partition, mtd3 is
used as the overlay.

Rename "jffs2-cfg" to "rootfs_data", and profit from the extra space.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-08-13 19:19:38 +02:00
Sander Vanheule
225137608c realtek: Netgear GS110TPP v1: add lan9 and lan10
The original commit for the GS110TP was missing ports 9 and 10. These
are provided by an external RTL8214C phy, for which no support was
available at the time. Now that this phy is supported, add the missing
entries to enable all device ports.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-08-13 19:15:46 +02:00
Paul Spooren
ead7e5b4c3 realtek: skip SFP ports in PoE setup
The function `ucidef_set_poe` receives a list of ports to add to the PoE array.
Since switches have many ports the varibale `lan_list` is passed instead of
writing every single lan port. However, this list includes partly SFP ports
which are unrelated to PoE.

This commits adds the option to add a third parameter to manually exclide
interfaces, usually the last two.

Signed-off-by: Paul Spooren <mail@aparcar.org>
[Replace glob by regex to be more specific about matching characters]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-08-13 19:15:46 +02:00
Hauke Mehrtens
ff06edd1f0 kernel: Activate CONFIG_GPIOLIB in generic configuration
All targets expect the malta target already activate the CONFIG_GPIOLIB
option. Move it to generic kernel configuration and also activate it for
malta.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2022-08-10 21:36:17 +02:00
INAGAKI Hiroshi
cef3f05a55 realtek: add support for Panasonic Switch-M48eG PN28480K
Panasonic Switch-M48eG PN28480K is a 48 + 4 port gigabit switch, based on
RTL8393M.

Specification:

- SoC           : Realtek RTL8393M
- RAM           : DDR3 128 MiB (Winbond W631GG8KB-15)
- Flash         : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G)
- Ethernet      : 10/100/1000 Mbps x48 + 2
  - port  1-40  : TP, RTL8218B x5
  - port 41-48  : RTL8218FB
    - port 41-44: TP
    - port 45-48: TP/SFP (Combo)
- LEDs/Keys     : 7x / 1x
- UART          : RS-232 port on the front panel (connector: RJ-45)
  - 3:TX, 4:GND, 5:GND, 6:RX (pin number: RJ-45)
  - 9600n8
- Power         : 100-240 VAC, 50/60 Hz, 0.5 A
  - Plug        : IEC 60320-C13
- Stock OS      : VxWorks based

Flash instruction using initramfs image:

1.  Prepare the TFTP server with the IP address 192.168.1.111
2.  Rename the OpenWrt initramfs image to "0101A8C0.img" and place it to
    the TFTP directory
3.  Download the official upgrading firmware (ex: pn28480k_v30000.rom)
    and place it to the TFTP directory
4.  Boot M48eG and interrupt the U-Boot with Ctrl + C keys
5.  Execute the following commands and boot with the OpenWrt initramfs
    image

    rtk network on
    tftpboot 0x81000000
    bootm

6.  Backup mtdblock files to the computer by scp or anything and reboot
7.  Interrupt the U-Boot and execute the following commands to re-create
    filesystem in the flash

    ffsmount c:/
    ffsfmt c:/

    this step takes a long time, about ~ 4 mins

8.  Execute the following commands to put the official images to the
    filesystem

    updatert <official image>

    example:

      updatert pn28480k_v30000.rom

    this step takes about ~ 40 secs

9.  Set the environment variables of the U-Boot by the following commands

    setenv loadaddr 0xb4e00000
    setenv bootcmd 'sleep 10; bootm;'
    saveenv

    'sleep 10;' is required as dummy to execute 'bootm' command correctly

10: Download the OpenWrt initramfs image and boot with it

    tftpboot 0x81000000 0101A8C0.img
    bootm

11: On the initramfs image, download the sysupgrade image and perform
    sysupgrade with it

    sysupgrade <imagename>

12: Wait ~ 120 seconds to complete flashing

Known Issues:

- 4x SFP ports are provided as combo ports by the RTL8218FB chip, but the
  phy driver has no support for it. Currently, only TP ports work by the
  RTL8218B support.

Note:

- "Switch-M48eG" is a model name, and "PN28480K" is a model number.
  Switch-M48eG has an another (old) model number ("PN28480"), it's not a
  Realtek based hardware.

- Switch-M48eG has a "POWER" LED (Green), but it's not connected to any
  GPIO pin.

- U-Boot checks the runtime images in the flash when booting and fails
  to execute "bootcmd" variable if the images are not existing.

- A filesystem is formed in the flash (0x100000-0x1DFFFFF) on the stock
  firmware and it includes the stock images, configuration files and
  checksum files. It's unknown format, can't be managed on the OpenWrt.
  To get the enough space for OpenWrt, move the filesystem to the head
  of "fs_reserved" partition by execution of "ffsfmt" and "updatert".

- A GPIO pin on PCA9539 is used for resetting external RTL8218B phys and
  RTL8218FB phy.
  This should be specified as "reset-gpios" property in MDIO node, but
  the current configuration of RTL8218B phy in the driver seems to be
  incomplete and RTL8218FB won't be configured on RTL8218D support.
  So, ethernet ports on these phys will be broken after hard-resetting.
  At the moment, configure this pin as gpio-hog to avoid breaking by
  resetting.

- This model has 2x Microchip TCN75A thermal sensors. Linux Kernel
  supports TCN75 chip on lm75 driver, but no support for TCN75'A'
  variant.
  At the moment, use TCN75 support for the chips instead.

Back to the stock firmware:

1. Delete "loadaddr" variable and set "bootcmd" to the original value

   on U-Boot:

     setenv loadaddr
     setenv bootcmd 'ffsrdm c:/runtime.had 0x81000000;alphadec c:/runtime.had 0x81000240 0x80010000;'

   on OpenWrt:

     fw_setenv loadaddr
     fw_setenv bootcmd 'ffsrdm c:/runtime.had 0x81000000;alphadec c:/runtime.had 0x81000240 0x80010000;'

2. Perform reset or reboot

  on U-Boot:

    reset

  on OpenWrt:

    reboot

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2022-08-06 14:39:57 +02:00
INAGAKI Hiroshi
4974ee7341 realtek: enable pca953x GPIO driver for rtl839x subtarget
The system status LED on Panasonic Switch-M48eG PN28480K is connected to
a PCA9539PW. To use the LED as a status LED of OpenWrt while booting,
enable the pca953x driver and built-in to the kernel.
Also enable CONFIG_GPIO_PCA953X_IRQ to use interrupt via RTL83xx GPIO.

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2022-08-06 14:39:57 +02:00
INAGAKI Hiroshi
fa52e5e254 realtek: add support for Panasonic Switch-M24eG PN28240K
Panasonic Switch-M24eG PN28240K is a 24 + 2 port gigabit switch, based on
RTL8382M.

Specification:

- SoC           : Realtek RTL8382M
- RAM           : DDR3 128 MiB (Winbond W631GG8KB-15)
- Flash         : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G)
- Ethernet      : 10/100/1000 Mbps x24 + 2
  - port  1-8   : TP, RTL8218B
  - port  9-16  : TP, RTL8218B (SoC)
  - port 17-24  : RTL8218FB
    - port 17-22: TP
    - port 23-24: TP/SFP (Combo)
- LEDs/Keys     : 7x / 1x
- UART          : RS-232 port on the front panel (connector: RJ-45)
  - 3:TX, 4:GND, 5:GND, 6:RX (pin number: RJ-45)
  - 9600n8
- Power         : 100-240 VAC, 50/60 Hz, 0.5 A
  - Plug        : IEC 60320-C13
- Stock OS      : VxWorks based

Flash instruction using initramfs image:

1.  Prepare the TFTP server with the IP address 192.168.1.111
2.  Rename the OpenWrt initramfs image to "0101A8C0.img" and place it to
    the TFTP directory
3.  Download the official upgrading firmware (ex: pn28240k_v30000.rom)
    and place it to the TFTP directory
4.  Boot M24eG and interrupt the U-Boot with Ctrl + C keys
5.  Execute the following commands and boot with the OpenWrt initramfs
    image

    rtk network on
    tftpboot 0x81000000
    bootm

6.  Backup mtdblock files to the computer by scp or anything and reboot
7.  Interrupt the U-Boot and execute the following commands to re-create
    filesystem in the flash

    ffsmount c:/
    ffsfmt c:/

    this step takes a long time, about ~ 4 mins

8.  Execute the following commands to put the official images to the
    filesystem

    updatert <official image>

    example:

      updatert pn28240k_v30000.rom

    this step takes about ~ 40 secs

9.  Set the environment variables of the U-Boot by the following commands

    setenv loadaddr 0xb4e00000
    setenv bootcmd bootm
    saveenv

10: Download the OpenWrt initramfs image and boot with it

    tftpboot 0x81000000 0101A8C0.img
    bootm

11: On the initramfs image, download the sysupgrade image and perform
    sysupgrade with it

    sysupgrade <imagename>

12: Wait ~ 120 seconds to complete flashing

Known Issues:

- 2x SFP ports are provided as combo ports by the RTL8218FB chip, but the
  phy driver has no support for it. Currently, only TP ports work by the
  RTL8218D support.

Note:

- "Switch-M24eG" is a model name, and "PN28240K" is a model number.
  Switch-M24eG has an another (old) model number ("PN28240"), it's not a
  Realtek based hardware.

- Switch-M24eG has a "POWER" LED (Green), but it's not connected to any
  GPIO pin.

- U-Boot checks the runtime images in the flash when booting and fails
  to execute "bootcmd" variable if the images are not existing.

- A filesystem is formed in the flash (0x100000-0x1DFFFFF) on the stock
  firmware and it includes the stock images, configuration files and
  checksum files. It's unknown format, can't be managed on the OpenWrt.
  To get the enough space for OpenWrt, move the filesystem to the head
  of "fs_reserved" partition by execution of "ffsfmt" and "updatert".

- A GPIO pin on PCA9539 is used for resetting external RTL8218B phy and
  RTL8218FB phy.
  This should be specified as "reset-gpios" property in MDIO node, but
  the current configuration of RTL8218B phy in the phy driver seems to
  be incomplete and RTL8218FB won't be configured on RTL8218D support.
  So, ethernet ports on these phys will be broken after hard-resetting.
  At the moment, configure this pin as gpio-hog to avoid breaking by
  resetting.

Back to the stock firmware:

1. Delete "loadaddr" variable and set "bootcmd" to the original value

   on U-Boot:

     setenv loadaddr
     setenv bootcmd 'bootm 0x81000000'

   on OpenWrt:

     fw_setenv loadaddr
     fw_setenv bootcmd 'bootm 0x81000000'

2. Perform reset or reboot

  on U-Boot:

    reset

  on OpenWrt:

    reboot

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2022-08-06 14:39:57 +02:00
INAGAKI Hiroshi
3d669ec9cd realtek: add support for Panasonic Switch-M16eG PN28160K
Panasonic Switch-M16eG PN28160K is a 16 + 2 port gigabit switch, based on
RTL8382M.

Specification:

- SoC           : Realtek RTL8382M
- RAM           : DDR3 128 MiB (Winbond W631GG8KB-15)
- Flash         : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G)
- Ethernet      : 10/100/1000 Mbps x16 + 2
  - port 1-8    : TP, RTL8218B (SoC)
  - port 9-16   : RTL8218FB
    - port  9-14: TP
    - port 15-16: TP/SFP (Combo)
- LEDs/Keys     : 7x / 1x
- UART          : RS-232 port on the front panel (connector: RJ-45)
  - 3:TX, 4:GND, 5:GND, 6:RX (pin number: RJ-45)
  - 9600n8
- Power         : 100-240 VAC, 50/60 Hz, 0.5 A
  - Plug        : IEC 60320-C13
- Stock OS      : VxWorks based

Flash instruction using initramfs image:

1.  Prepare the TFTP server with the IP address 192.168.1.111
2.  Rename the OpenWrt initramfs image to "0101A8C0.img" and place it to
    the TFTP directory
3.  Download the official upgrading firmware (ex: pn28160k_v30003.rom)
    and place it to the TFTP directory
4.  Boot M16eG and interrupt the U-Boot with Ctrl + C keys
5.  Execute the following commands and boot with the OpenWrt initramfs
    image

    rtk network on
    tftpboot 0x81000000
    bootm

6.  Backup mtdblock files to the computer by scp or anything and reboot
7.  Interrupt the U-Boot and execute the following commands to re-create
    filesystem in the flash

    ffsmount c:/
    ffsfmt c:/

    this step takes a long time, about ~ 4 mins

8.  Execute the following commands to put the official images to the
    filesystem

    updatert <official image>

    example:

      updatert pn28160k_v30003.rom

    this step takes about ~ 40 secs

9.  Set the environment variables of the U-Boot by the following commands

    setenv loadaddr 0xb4e00000
    setenv bootcmd bootm
    saveenv

10: Download the OpenWrt initramfs image and boot with it

    tftpboot 0x81000000 0101A8C0.img
    bootm

11: On the initramfs image, download the sysupgrade image and perform
    sysupgrade with it

    sysupgrade <imagename>

12: Wait ~ 120 seconds to complete flashing

Known Issues:

- 2x SFP ports are provided as combo ports by the RTL8218FB chip, but the
  phy driver has no support for it. Currently, only TP ports work by the
  RTL8218D support.

Note:

- "Switch-M16eG" is a model name, and "PN28160K" is a model number.
  Switch-M16eG has an another (old) model number ("PN28160"), it's not a
  Realtek based hardware.

- Switch-M16eG has a "POWER" LED (Green), but it's not connected to any
  GPIO pin.

- U-Boot checks the runtime images in the flash when booting and fails
  to execute "bootcmd" variable if the images are not existing.

- A filesystem is formed in the flash (0x100000-0x1DFFFFF) on the stock
  firmware and it includes the stock images, configuration files and
  checksum files. It's unknown format, can't be managed on the OpenWrt.
  To get the enough space for OpenWrt, move the filesystem to the head
  of "fs_reserved" partition by execution of "ffsfmt" and "updatert".

- A GPIO pin on PCA9539 is used for resetting external RTL8218FB phy.
  This should be specified as "reset-gpios" property in MDIO node, but
  RTL8218FB won't be configured on RTL8218D support in the phy driver.
  So, ethernet ports on the phy will be broken after hard-resetting.
  At the moment, configure this pin as gpio-hog to avoid breaking by
  resetting.

Back to the stock firmware:

1. Delete "loadaddr" variable and set "bootcmd" to the original value

   on U-Boot:

     setenv loadaddr
     setenv bootcmd 'bootm 0x81000000'

   on OpenWrt:

     fw_setenv loadaddr
     fw_setenv bootcmd 'bootm 0x81000000'

2. Perform reset or reboot

  on U-Boot:

    reset

  on OpenWrt:

    reboot

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2022-08-06 14:39:57 +02:00
Olliver Schinagl
943905b0b6 realtek: Fix typo in Kconfig prompt
As the symbol RTL930x shows, the bool enables the RTL930x platform, not
the RTL839x one.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
(slightly changed commit subject)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2022-08-05 14:10:42 +02:00
Daniel Golle
a49212d762 Revert "realtek: remove support for HPE 1920 series"
This reverts commit a63aeaecf1.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-07-28 16:45:19 +02:00
Sander Vanheule
a63aeaecf1 realtek: remove support for HPE 1920 series
Support for HPE 1920 images depends on two non-existent tools (mkh3cimg
and mkh3cvfs) from the in the firmware-utils package. Revert commit
f2f09bc002 ("realtek: add support for HPE 1920 series") until support
for these tools is merged and made available in OpenWrt.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-07-28 15:17:04 +02:00
Jan Hoffmann
f2f09bc002 realtek: add support for HPE 1920 series
Hardware information:
---------------------

- HPE 1920-8G:
  - RTL8380 SoC
  - 8 Gigabit RJ45 ports (built-in RTL8218B)
  - 2 SFP ports (built-in SerDes)

- HPE 1920-16G / HPE 1920-24G (same board):
  - RTL8382 SoC
  - 16/24 Gigabit RJ45 ports (built-in RTL8218B, 1/2 external RTL8218D)
  - 4 SFP ports (external RTL8214FC)

- Common:
  - RJ45 RS232 port on front panel
  - 32 MiB NOR Flash
  - 128 MiB DDR3 DRAM
  - PT7A7514 watchdog

Booting initramfs image:
------------------------

- Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
  connect the server to a switch port.

- Connect to the console port of the device and enter the extended
  boot menu by typing Ctrl+B when prompted.

- Choose the menu option "<3> Enter Ethernet SubMenu".

- Set network parameters via the option "<5> Modify Ethernet Parameter".
  Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
  can be left blank, it is not required for booting from RAM). Note that
  the configuration is saved on flash, so it only needs to be done once.

- Select "<1> Download Application Program To SDRAM And Run".

Initial installation:
---------------------

- Boot an initramfs image as described above, then use sysupgrade to
  install OpenWrt permanently. After initial installation, the
  bootloader needs to be configured to load the correct image file

- Enter the extended boot menu again and choose "<4> File Control",
  then select "<2> Set Application File type".

- Enter the number of the file "openwrt-kernel.bin" (should be 1), and
  use the option "<1> +Main" to select it as boot image.

- Choose "<0> Exit To Main Menu" and then "<1> Boot System".

NOTE: The bootloader on these devices can only boot from the VFS
filesystem which normally spans most of the flash. With OpenWrt, only
the first part of the firmware partition contains a valid filesystem,
the rest is used for rootfs. As the bootloader does not know about this,
you must not do any file operations in the bootloader, as this may
corrupt the OpenWrt installation (selecting the boot image is an
exception, as it only stores a flag in the bootloader data, but doesn't
write to the filesystem).

Signed-off-by: Jan Hoffmann <jan@3e8.eu>
2022-07-28 14:08:56 +02:00
Jan Hoffmann
81e3017609 realtek: clean up rtl838x MDIO busy wait loop
Don't use udelay to allow other kernel tasks to execute if the kernel
has been built without preemption. Also determine the timeout based on
jiffies instead of loop iterations.

This is especially important on devices containing a watchdog with a
short timeout. Without this change, the watchdog is not serviced during
PHY patching which can take multiple seconds.

Tested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
2022-07-28 14:08:51 +02:00
Jan Hoffmann
b6a0d50b7f realtek: add SFP support for RTL8214FC PHY
Probe the SFP module during PHY initialization and implement
insertion/removal handlers to automatically configure the media type
of the respective port.

Suggested-by: Birger Koblitz <git@birger-koblitz.de>
Tested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
2022-07-28 14:08:43 +02:00