Currently, the option to disable subpage writing is only set
when a HW ECC engine is used.
Some boards lack a HW ECC engine and use software for that.
In this case, this NAND option does not get set when the NAND chip
does not support it, resulting in mounting errors.
Move the setting of this option to a generic init location so it
gets set for all types where required.
While at it, also OR the option instead of just setting it
so we don't overwrite potential flags being set somewhere else.
Before:
[ 1.681273] UBI: auto-attach mtd2
[ 1.684669] ubi0: attaching mtd2
[ 1.688877] ubi0 error: validate_ec_hdr: bad VID header offset 2048, expected 512
[ 1.696469] ubi0 error: validate_ec_hdr: bad EC header
[ 1.701712] Erase counter header dump:
[ 1.705512] magic 0x55424923
[ 1.709322] version 1
[ 1.712330] ec 1
[ 1.715331] vid_hdr_offset 2048
[ 1.718610] data_offset 4096
[ 1.721880] image_seq 1462320675
[ 1.725680] hdr_crc 0x12255a15
After:
1.680917] UBI: auto-attach mtd2
[ 1.684308] ubi0: attaching mtd2
[ 2.954504] random: crng init done
[ 3.142813] ubi0: scanning is finished
[ 3.163455] ubi0: attached mtd2 (name "ubi", size 124 MiB)
[ 3.169069] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
[ 3.176037] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
[ 3.182942] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
[ 3.190013] ubi0: good PEBs: 992, bad PEBs: 0, corrupted PEBs: 0
[ 3.196102] ubi0: user volume: 3, internal volumes: 1, max. volumes count: 128
[ 3.203434] ubi0: max/mean erase counter: 2/0, WL threshold: 4096, image sequence number: 1462320675
[ 3.212700] ubi0: available PEBs: 0, total reserved PEBs: 992, PEBs reserved for bad PEB handling: 20
[ 3.222124] ubi0: background thread "ubi_bgt0d" started, PID 317
[ 3.230246] block ubiblock0_1: created from ubi0:1(rootfs)
[ 3.235819] ubiblock: device ubiblock0_1 (rootfs) set to be root filesystem
[ 3.256830] VFS: Mounted root (squashfs filesystem) readonly on device 254:0.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Main part is copied from ar71xx original driver rb91x_nand
written by Gabor Juhos <juhosg@openwrt.org>.
What is done:
* Support of kernel 5.4 and 5.10,
* DTS support,
* New gpio API (gpiod_*) support.
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Signed-off-by: Denis Kalashnikov <denis281089@gmail.com>
This updates the NAND driver for MikroTik RB4XX series to work with
kernel 5.10, similarly to the ar934x-nand driver (fb64e2c3).
Support for kernel 5.10 was added to all ath79 subtargets except for the
mikrotik one by commit d6b785d, since patch 920-mikrotik-rb4xx.patch
needed to be reworked. Later, commit f8512661 enabled kernel 5.10 for
the mikrotik subtarget with the nand-rb4xx driver still pending, which
is updated and added back by this patch.
Compile-tested only.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
Adapt the driver to make it work with the NAND subsystem changes between
kernel 5.4 and 5.10.
Tested-on: Aerohive HiveAP121
Signed-off-by: David Bauer <mail@david-bauer.net>
This removes unneeded kernel version switches from the targets after
kernel 4.19 has been dropped.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Fixes:
- CVE-2020-10757
The "mtd: rawnand: Pass a nand_chip object to nand_release()" commit was
backported which needed some adaptations to other code.
Run tested: ath79
Build tested: ath79
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This adds 3 Mikrotik rb4xx series drivers as follows:
rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device
that interfaces between the SoC SPI bus and its two children below.
rb4xx-gpio: This is the GPIO expander.
rb4xx-nand: This is the NAND driver.
The history of this code comes in three phases.
1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx
drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/.
Module-author: Gabor Juhos <juhosg@openwrt.org>
Module-author: Imre Kaloz <kaloz@openwrt.org>
Module-author: Bert Vermeulen <bert@biot.com>
2. Next several ar71xx patches were applied bringing the code current.
commit 7bbf4117c6
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
commit af79fdbe4a
commit 889272d92d
commit e21cb649a2
commit 7c09fa4a74
Signed-off-by: Felix Fietkau <nbd@nbd.name>
3. Finally a heavy refactor to split the driver into the three new
subsystems, and updated to work with the device tree configuration, plus
updates and review feedback incorporated
Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org>
Signed-off-by: Christopher Hill <ch6574@gmail.com>
The reset assert and deassert methods currently miss
a return value, leading to a compilation warning.
Return the return-value of reset_control_assert and
reset_control_deassert to fix these warnings.
Suggested-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
Signed-off-by: David Bauer <mail@david-bauer.net>
This fixes the compilation of the AR934x NAND controller
driver for kernel 5.4 while leaving it untouched for
kernel 4.19.
This change is currently not run-tested, as i do not have such
a device at hand.
CC: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
CC: André Valentin <avalentin@marcant.net>
CC: WeiDong Jia <jwdsccd@gmail.com>
Signed-off-by: David Bauer <mail@david-bauer.net>
Tested-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
This patch contains updated driver for Atheros NAND Flash Controller
written originally by Gabor Juhos for ar71xx (aka 'ar934x-nfc').
ath79 version has adapted to work with kernel 4.19 and Device Tree.
It has also been renamed to 'ar934x-nand' to avoid confusion with
Near-Field Communication technology.
Controller is present on Atheros AR934x SoCs and required for accessing
internal flash storage on routers like Netgear WNDR4300.
This port preserves all NAND programming code while moving platform
configuration to Device Tree and replacing some kernel functions marked
for retirement by 4.19.
Suitable definition is included in 'ar934x.dtsi' ('nand@1b000200' section).
Most important changes to ar71xx version are:
* old kernel sections of code removed
* 'bool swap_dma' provided by platform data is now set by boolean DT
property 'qca,nand-swap-dma'
* board-supplied (mach-*.c code) platform data removed - its elements
become either unused, redundant or replaced by DT methods (like reset)
* IRQ is reserved by devm_request_irq() so free_irq() is not needed anymore
* calls to deprecated nand_scan_ident() + nand_scan_tail() function pair
replaced by using recommended nand_scan() with attach_chip() callback
* ECC is set to hardware by default, can be overriden by standard DT
'nand-ecc-*' properties (software Hamming or BCH are other options)
This driver has been successfully tested on Netgear WNDR4300 running
experimental ath79 OpenWrt master branch.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
[add reset control]
Signed-off-by: David Bauer <mail@david-bauer.net>
