5.4.102 backported a lot of stuff that our WireGuard backport already
did, in addition to other patches we had, so those patches were
removed from that part of the series. In the process other patches were
refreshed or reworked to account for upstream changes.
This commit involved `update_kernel.sh -v -u 5.4`.
Cc: John Audia <graysky@archlinux.us>
Cc: David Bauer <mail@david-bauer.net>
Cc: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
If the watchdog is enabled, set the timeout to 30 seconds before
decompress is started.
Mikrotik ipq40xx devices running with RouterBoot have the SoC watchdog
enabled and running with a timeout that does not allow time for the
kernel to decompress and manage the watchdog.
On ipq40xx RouterBoot TFTP boot the watchdog countdown is reset before:
Jumping to kernel
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
This adds a appended_dtb section to the ARM decompressor
linker script.
This allows using the existing ARM zImage appended DTB support for
appending a DTB to the raw ELF kernel.
Its size is set to 1MB max to match the zImage appended DTB size limit.
To use it to pass the DTB to the kernel, objcopy is used:
objcopy --set-section-flags=.appended_dtb=alloc,contents \
--update-section=.appended_dtb=<target>.dtb vmlinux
This is based off the following patch:
c063e27e02
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specifications:
SOC: Qualcomm IPQ4018 (DAKOTA) ARM Quad-Core
RAM: 256 MiB
FLASH1: 4 MiB NOR
FLASH2: 128 MiB NAND
ETH: Qualcomm QCA8075
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11b/g/n 2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11n/ac W2 2x2
INPUT: Reset
LED: Power, Internet
UART1: On board pin header near to LED (3.3V, TX, RX, GND), 3.3V without pin - 115200 8N1
OTHER: On board with BLE module - by cp210x USB serial chip
On board hareware watchdog with GPIO0 high to turn on, and GPIO4 for watchdog feed
Install via uboot tftp or uboot web failsafe.
By uboot tftp:
(IPQ40xx) # tftpboot 0x84000000 openwrt-ipq40xx-generic-glinet_gl-ap1300-squashfs-nand-factory.ubi
(IPQ40xx) # run lf
By uboot web failsafe:
Push the reset button for 10 seconds util the power led flash faster,
then use broswer to access http://192.168.1.1
Afterwards upgrade can use sysupgrade image.
Signed-off-by: Dongming Han <handongming@gl-inet.com>
This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI.
Also adds the PSGMII PHY as it wont get probed otherwise.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since we now have proper PHY driver for the QCA807x PHY-s, lets remove
PHY handling from AR40xx.
This removes PHY driver, PHY GPIO driver and PHY init code.
AR40xx still needs to handle PSGMII calibration as that requires R/W
from the switch, so I am unable to move it into PHY driver.
This also converted the AR40xx driver to use OF_MDIO to find the MDIO
bus as it now cant be set through the PHY driver.
So lets depend on OF_MDIO in KConfig.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant
10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC,
while second one is SGMII for connection to MAC or fiber.
Both models have a combo port that supports 1000BASE-X and 100BASE-FX
fiber.
Each PHY inside of QCA807x series has 2 digitally controlled output only
pins that natively drive LED-s.
But some vendors used these to driver generic LED-s controlled by
user space, so lets enable registering each PHY as GPIO controller and
add driver for it.
This also adds the ability to specify DT properties so that 1000 Base-T
LED will also be lit up for 100 and 10 Base connections.
This is usually done by U-boot, but boards running mainline U-boot are
not configuring this yet.
These PHY-s are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x
boards.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
With the reworked MDIO driver, EDMA will fail to get the MII BUS as it
used the MII BUS stored inside the MDIO structure private data.
This obviously does not work with the modernized driver, so lets switch
to using a purpose build of_mdio_find_bus() which will return the MII
BUS and only requires the MDIO node to be passed.
This is easy as we already have the node parsed.
Also, since we now require OF_MDIO add that as dependency.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
IPQ40xx MDIO driver was upstreamed in kernel version 5.8.
So lets backport the upstream version and drop our local one.
This also refreshed the kernel config since the symbol name has changed.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v71) Cortex-A7
DRAM: 256 MiB
NOR: 32 MiB
ETH: Qualcomm Atheros QCA8075 (2 ports)
PLC: MaxLinear G.hn 88LX5152
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: RESET, WiFi, PLC Button
LEDS: red/white home, white WiFi
To modify a retail device to run OpenWRT firmware:
1) Setup a TFTP server on IP address 192.168.0.100 and copy the OpenWRT
initramfs (initramfs-fit-uImage.itb) to the TFTP root as 'uploadfile'.
2) Power on the device while pressing the recessed reset button next to
the Ethernet ports. This causes the bootloader to retrieve and start
the initramfs.
3) Once the initramfs is booted, the device will come up with IP
192.168.1.1. You can then connect through SSH (allow some time for
the first connection).
4) On the device shell, run 'fw_printenv' to show the U-boot environment.
Backup this information since it contains device unique factory data.
5) Change the boot command to support booting OpenWRT:
# fw_setenv bootcmd 'sf probe && sf read 0x84000000 0x180000 0x400000 && bootm'
6) Change directory to /tmp, download the sysupgrade (e.g. through wget)
and install it with sysupgrade. The device will reboot into OpenWRT.
Notice that there is currently no support for booting the G.hn chip.
This requires userland software we lack the rights to share right now.
Signed-off-by: Stefan Schake <stefan.schake@devolo.de>
Device specifications:
* QCA IPQ4019
* 256 MB of RAM
* 32 MB of SPI NOR flash (w25q256)
- 2x 15 MB available; but one of the 15 MB regions is the recovery image
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=20,variant=PlasmaCloud-PA2200
* 2T2R 5 GHz (channel 36-64)
- QCA9888 hw2.0 (PCI)
- requires special BDF in QCA9888/hw2.0/board-2.bin
bus=pci,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA2200
* 2T2R 5 GHz (channel 100-165)
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=21,variant=PlasmaCloud-PA2200
* GPIO-LEDs for 2.4GHz, 5GHz-SoC and 5GHz-PCIE
* GPIO-LEDs for power (orange) and status (blue)
* 1x GPIO-button (reset)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x gigabit ethernet
- phy@mdio3:
+ Label: Ethernet 1
+ gmac0 (ethaddr) in original firmware
+ used as LAN interface
- phy@mdio4:
+ Label: Ethernet 2
+ gmac1 (eth1addr) in original firmware
+ 802.3at POE+
+ used as WAN interface
* 12V 2A DC
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai>
[sven@narfation.org: prepare commit message, rebase, use all LEDs, switch
to dualboot_datachk upgrade script, use eth1 as designated WAN interface]
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Device specifications:
* QCA IPQ4018
* 256 MB of RAM
* 32 MB of SPI NOR flash (w25q256)
- 2x 15 MB available; but one of the 15 MB regions is the recovery image
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA1200
* 2T2R 5 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=17,variant=PlasmaCloud-PA1200
* 3x GPIO-LEDs for status (cyan, purple, yellow)
* 1x GPIO-button (reset)
* 1x USB (xHCI)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x gigabit ethernet
- phy@mdio4:
+ Label: Ethernet 1
+ gmac0 (ethaddr) in original firmware
+ used as LAN interface
- phy@mdio3:
+ Label: Ethernet 2
+ gmac1 (eth1addr) in original firmware
+ 802.3af/at POE(+)
+ used as WAN interface
* 12V/24V 1A DC
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai>
[sven@narfation.org: prepare commit message, rebase, use all LEDs, switch
to dualboot_datachk upgrade script, use eth1 as designated WAN interface]
Signed-off-by: Sven Eckelmann <sven@narfation.org>
This pci@40000000 node from upstream was dropped when the device
was converted from local DTS(I) files to kernel patches in [1] to
ensure that change was purely cosmetic.
However, the DK04.1 has a PCI-E slot by default, so let's keep
(i.e. not remove) the kernel definition now.
[1] c4beac9ea2 ("ipq40xx: use upstream DTS files for IPQ4019/AP-DK04.1")
Suggested-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
A lot of patches are outdated versions of upstreamed patches and
drivers.
So lets pull in the upstreamed patches and reorder remaining ones.
This drops the unnecessary 721-dts-ipq4019-add-ethernet-essedma-node.patch
which adds nodes for not yet in OpenWrt IPQESS driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
[do not touch 902-dts-ipq4019-ap-dk04.1.patch here]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
There is no point in keeping the AR40xx driver as a patch as its
not pending merge or backport.
To allow for easier maintenance until DSA is ready move it into
files like EDMA is.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
[combine with removal from patches-5.4]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Upstream provides DTS(I) files for IPQ4019/AP-DK04.1, but we overwrite
them with local versions so far.
Remove the local files and use patches to be closer to upstream.
We already do the same for IPQ40xx/AP-DK01.1-C1.
Technically, this changes the compatible from "qcom,ipq4019" to
"qcom,ipq4019-dk04.1-c1", but it has never been implemented correctly
beforehand anyway.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The Linksys MR8300 is based on QCA4019 and QCA9888
and provides three, independent radios.
NAND provides two, alternate kernel/firmware images
with fail-over provided by the OEM U-Boot.
Hardware Highlights:
SoC: IPQ4019 at 717 MHz (4 CPUs)
RAM: 512MB RAM
SoC: Qualcomm IPQ4019 at 717 MHz (4 CPUs)
RAM: 512M DDR3
FLASH: 256 MB NAND (Winbond W29N02GV, 8-bit parallel)
ETH: Qualcomm QCA8075 (4x GigE LAN, 1x GigE Internet Ethernet Jacks)
BTN: Reset and WPS
USB: USB3.0, single port on rear with LED
SERIAL: Serial pads internal (unpopulated)
LED: Four status lights on top + USB LED
WIFI1: 2x2:2 QCA4019 2.4 GHz radio on ch. 1-14
WIFI2: 2x2:2 QCA4019 5 GHz radio on ch. 36-64
WIFI3: 2x2:2 QCA9888 5 GHz radio on ch. 100-165
Support is based on the already supported EA8300.
Key differences:
EA8300 has 256MB RAM where MR8300 has 512MB RAM.
MR8300 has a revised top panel LED setup.
Installation:
"Factory" images may be installed directly through the OEM GUI using
URL: https://ip-of-router/fwupdate.html (Typically 192.168.1.1)
Signed-off-by: Hans Geiblinger <cybrnook2002@yahoo.com>
[copied Hardware-highlights from EA8300. Fixed alphabetical order.
fixed commit subject, removed bogus unit-address of keys,
fixed author (used Signed-off-By to From:) ]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Luma Home WRTQ-329ACN, also known as Luma WiFi System, is a dual-band
wireless access point.
Specification
SoC: Qualcomm Atheros IPQ4018
RAM: 256 MB DDR3
Flash: 2 MB SPI NOR
128 MB SPI NAND
WIFI: 2.4 GHz 2T2R integrated
5 GHz 2T2R integrated
Ethernet: 2x 10/100/1000 Mbps QCA8075
USB: 1x 2.0
Bluetooth: 1x 4.0 CSR8510 A10, connected to USB bus
LEDS: 16x multicolor LEDs ring, controlled by MSP430G2403 MCU
Buttons: 1x GPIO controlled
EEPROM: 16 Kbit, compatible with AT24C16
UART: row of 4 holes marked on PCB as J19, starting count from the side
of J19 marking on PCB
1. GND, 2. RX, 3. TX, 4. 3.3V
baud: 115200, parity: none, flow control: none
The device supports OTA or USB flash drive updates, unfotunately they
are signed. Until the signing key is known, the UART access is mandatory
for installation. The difficult part is disassembling the casing, there
are a lot of latches holding it together.
Teardown
Prepare three thin, but sturdy, prying tools. Place the device with back
of it facing upwards. Start with the wall having a small notch. Insert
first tool, until You'll feel resistance and keep it there. Repeat the
procedure for neighbouring walls. With applying a pressure, one edge of
the back cover should pop up. Now carefully slide one of the tools to
free the rest of the latches.
There's no need to solder pins to the UART holes, You can use hook clips,
but wiring them outside the casing, will ease debuging and recovery if
problems occur.
Installation
1. Prepare TFTP server with OpenWrt initramfs image.
2. Connect to UART port (don't connect the voltage pin).
3. Connect to LAN port.
4. Power on the device, carefully observe the console output and when
asked quickly enter the failsafe mode.
5. Invoke 'mount_root'.
6. After the overlayfs is mounted run:
fw_setenv bootdelay 3
This will allow to access U-Boot shell.
7. Reboot the device and when prompted to stop autoboot, hit any key.
8. Adjust "ipaddr" and "serverip" addresses in U-Boot environment, use
'setenv' to do that, then run following commands:
tftpboot 0x84000000 <openwrt_initramfs_image_name>
bootm 0x84000000
and wait till OpenWrt boots.
9. In OpenWrt command line run following commands:
fw_setenv openwrt "setenv mtdids nand1=spi_nand; setenv mtdparts mtdparts=spi_nand:-(ubi); ubi part ubi; ubi read 0x84000000 kernel; bootm 0x84000000"
fw_setenv bootcmd "run openwrt"
10. Transfer OpenWrt sysupgrade image to /tmp directory and flash it
with:
ubirmvol /dev/ubi0 -N ubi_rootfs
sysupgrade -v -n /tmp/<openwrt_sysupgrade_image_name>
11. After flashing, the access point will reboot to OpenWrt, then it's
ready for configuration.
Reverting to OEM firmware
1. Execute installation guide steps: 1, 2, 3, 7, 8.
2. In OpenWrt command line run following commands:
ubirmvol /dev/ubi0 -N rootfs_data
ubirmvol /dev/ubi0 -N rootfs
ubirmvol /dev/ubi0 -N kernel
ubirename /dev/ubi0 kernel1 kernel ubi_rootfs1 ubi_rootfs
ubimkvol /dev/ubi0 -S 34 -N kernel1
ubimkvol /dev/ubi0 -S 320 -N ubi_rootfs1
ubimkvol /dev/ubi0 -S 264 -N rootfs_data
fw_setenv bootcmd bootipq
3. Reboot.
Known issues
The LEDs ring doesn't have any dedicated driver or application to control
it, the only available option atm is to manipulate it with 'i2cset'
command. The default action after applying power to device is spinning
blue light. This light will stay active at all time. To disable it
install 'i2c-tools' with opkg and run:
i2cset -y 2 0x48 3 1 0 0 i
The light will stay off until next cold boot.
Additional information
After completing 5. step from installation guide, one can disable asking
for root password on OEM firmware by running:
sed -e 's/root❌/root::/' -i /etc/passwd
This is useful for investigating the OEM firmware. One can look
at the communication between the stock firmware and the vendor's
cloud servers or as a way of making a backup of both flash chips.
The root password seems to be constant across all sold devices.
This is output of 'led_ctl' from OEM firmware to illustrate
possibilities of LEDs ring:
Usage: led_ctl [status | upgrade | force_upgrade | version]
led_ctl solid COLOR <brightness>
led_ctl single COLOR INDEX <brightness 0 - 15>
led_ctl spinning COLOR <period 1 - 16 (lower = faster)>
led_ctl fill COLOR <period 1 - 16 (lower = faster)>
( default is 5 )
led_ctl flashing COLOR <on dur 1 - 128> <off dur 1 - 128>
(default is 34) ( default is 34 )
led_ctl pulsing COLOR
COLOR: red, green, blue, yellow, purple, cyan, white
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
[squash "ipq-wifi: add BDFs for Luma Home WRTQ-329ACN" into commit,
changed ubi volumes for easier integration, slightly reworded
commit message, changed ubi volume layout to use standard names all
around]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
All modifications made by update_kernel.sh/no manual intervention needed
Run-tested: ipq806x (R7800), ath79 (Archer C7v5), x86/64
No dmesg regressions, everything appears functional
Signed-off-by: John Audia <graysky@archlinux.us>
[add run test from PR]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
flashing the unit
* first update to latest edcore FW as per the PDF instructions
* boot the initramfs
- tftpboot 0x88000000 openwrt-ipq40xx-generic-edgecore_oap100-initramfs-fit-uImage.itb; bootm
* inside the initramfs call the following commiands
- ubiattach -p /dev/mtd0
- ubirmvol /dev/ubi0 -n0
- ubirmvol /dev/ubi0 -n1
- ubirmvol /dev/ubi0 -n2
* scp the sysupgrade image to the board and call
- sysupgrade -n openwrt-ipq40xx-generic-edgecore_oap100-squashfs-nand-sysupgrade.bin
Signed-off-by: John Crispin <john@phrozen.org>
This patch adds support for the Edgecore ECW5211 indoor AP.
Specification:
- SoC: Qualcomm Atheros IPQ4018 ARMv7-A 4x Cortex A-7
- RAM: 256MB DDR3
- NOR Flash: 16MB SPI NOR
- NAND Flash: 128MB MX35LFxGE4AB SPI-NAND
- Ethernet: 2 x 1G via Q8075 PHY connected to ethernet adapter via PSGMII (802.3af POE IN on eth0)
- USB: 1 x USB 3.0 SuperSpeed
- WLAN: Built-in IPQ4018 (2x2 802.11bng, 2x2 802.11 acn)
- CC2540 BLE connected to USB 2.0 port
- Atmel AT97SC3205T I2C TPM
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
update_kernel.sh refreshed all patches, no human interaction was needed
Build system: x86_64
Run-tested: Netgear R7800 (ipq806x)
Signed-off-by: John Audia <graysky@archlinux.us>
As the the SoC uses implicit vlan tagging for dual MAC support, the
offload feature breaks when using double tagging.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: John Crispin <john@phrozen.org>
The patches for arch/arm/boot/dts/Makefile have not been updated
in a syntactically correct way (just body was changed). Fix it.
Fixes: 4a77a060ab ("ipq40xx: add support for Buffalo WTR-M2133HP")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Buffalo WTR-M2133HP is a Tri-Band router based on IPQ4019.
Specification
-------------
- SoC: Qualcomm IPQ4019
- RAM: 512MiB
- Flash Memory: NAND 128MiB (MXIC MX30LF1G18AC)
- Wi-Fi: Qualcomm IPQ4019 (2.4GHz, 1ch - 13ch)
- Wi-Fi: Qualcomm IPQ4019 (5GHz, 36ch - 64ch)
- Wi-Fi: Qualcomm QCA9984 (2T2R, 5GHz, 100ch - 140ch)
- Ethernet: 4x 10/100/1000 Mbps (1x WAN, 3x LAN)
- LED: 4x white LED, 4x orange LED, 1x blue LED
- USB: 1x USB 3.0 port
- Input: 2x tactile switch, 2x slide switch (2x SP3T)
- Serial console: 115200bps, pinheader JP5 on PCB
- Power: DC 12V 2A
Flash instruction
-----------------
1. Set up a TFTP server (IP address: 192.168.11.10)
2. Rename "initramfs-fit-uImage.itb" to "WTR-M2133HP-initramfs.uImage"
and put it into the TFTP server directory.
3. Connect the TFTP server and WTR-M2133HP.
4. Hold down the AOSS button, then power on the router.
5. After booting OpenWrt initramfs image, connect to the router by SSH.
6. Transfer "squashfs-nand-factory.ubi" to the router.
7. Execute the following commands.
# ubidetach -p /dev/mtd15
# ubiformat /dev/mtd15 -f /tmp/openwrt-ipq40xx-generic-buffalo_wtr-m2133hp-squashfs-nand-factory.ubi
# fw_setenv bootcmd bootipq
8. Perform reboot.
Recover to stock firmware
-------------------------
1. Execute the following command.
# fw_setenv bootcmd bootbf
2. Reboot and wait several minutes.
Signed-off-by: Yanase Yuki <dev@zpc.sakura.ne.jp>
Specifications:
SOC: Qualcomm IPQ4029 (DAKOTA) ARM Quad-Core
RAM: 512 MiB
FLASH1: 16 MiB NOR - SPI0
FLASH2: 8 GiB eMMC
ETH: Qualcomm QCA8075
WLAN1: Qualcomm Atheros QCA4029 2.4GHz 802.11b/g/n 2x2
WLAN2: Qualcomm Atheros QCA4029 5GHz 802.11n/ac W2 2x2
INPUT: Reset, WPS
LED: Power, Mesh, WLAN
UART1: On board pin header near to LED (3.3V, TX, RX, GND), 3.3V without pin - 115200 8N1
UART2: On board with BLE module
SPI1: On board socket for Zigbee module
Install via tftp
- NB: need to flash transition image firstly
Firstly install transition image:
(IPQ40xx) # tftpboot 0x84000000 s1300-factory-to-openwrt.img
(IPQ40xx) # sf probe && imgaddr=0x84000000 && source :script
Secondly install openwrt sysupgrade bin:
(IPQ40xx) # run lf
Revert to factory image:
(IPQ40xx) # tftpboot 0x84000000 s1300-openwrt-to-factory.img
(IPQ40xx) # sf probe && imgaddr=0x84000000 && source :script
The kernel and rootfs of factory firmware are on eMMC, and openwrt
firmware is on NOR flash. The transition image includes U-boot
and partition table, which decides where to load kernel and rootfs.
After you firstly install openwrt image, you can switch between
factory and openwrt firmware by flashing transition image.
Signed-off-by: Dongming Han <handongming@gl-inet.com>
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB
NOR: 32 MiB
ETH: Qualcomm Atheros QCA8072 (2 ports)
USB: 1 x 2.0 (Host controller in the SoC)
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: RESET Button
LEDS: White, Blue, Red, Orange
Flash instruction:
From EnGenius firmware to OpenWrt firmware:
In Firmware Upgrade page, upgrade your openwrt-ipq40xx-generic-engenius_emr3500-squashfs-factory.bin directly.
From OpenWrt firmware to EnGenius firmware:
1. Setup a TFTP server on your computer and configure static IP to 192.168.99.8
Put the EnGenius firmware in the TFTP server directory on your computer.
2. Power up EMR3500. Press 4 and then press any key to enter u-boot.
3. Download EnGenius firmware
(IPQ40xx) # tftpboot 0x84000000 openwrt-ipq40xx-emr3500-nor-fw-s.img
4. Flash the firmware
(IPQ40xx) # imgaddr=0x84000000 && source 0x84000000:script
5. Reboot
(IPQ40xx) # reset
Signed-off-by: Yen-Ting-Shen <frank.shen@senao.com>
[squashed update patch, updated to 5.4, dropped BOARD_NAME,
migrated to SOC]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
While "ok" is recognized in DT parsing, only "okay" is actually
mentioned as valid value. Replace it accordingly.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Hardware
--------
SoC: Qualcomm IPQ4029
RAM: 512M DDR3
FLASH: - 128MB NAND (Macronix MX30LF1G18AC)
- 4MB SPI-NOR (Macronix MX25R3235F)
TPM: Atmel AT97SC3203
BLE: Texas Instruments CC2540T
attached to ttyMSM0
ETH: Atheros AR8035
LED: System (red / green / amber)
BTN: Reset
The USB port on the device is (in contrast to other Aruba boards) real
USB. The AP uses a CP2101 USB TTY converter on the board.
Console baudrate is 9600 8n1.
To enable a full list of commands in the U-Boot "help" command, execute
the literal "diag" command.
Installation
------------
1. Get the OpenWrt initramfs image. Rename it to ipq40xx.ari and put it
into the TFTP server root directory. Configure the TFTP server to
be reachable at 192.168.1.75/24. Connect the machine running the TFTP
server to the ethernet port of the access point.
2. Connect to the serial console. Interrupt autobooting by pressing
Enter when prompted.
3. Configure the bootargs and bootcmd for OpenWrt.
$ setenv bootargs_openwrt "setenv bootargs console=ttyMSM1,9600n8"
$ setenv nandboot_openwrt "run bootargs_openwrt; ubi part aos1;
ubi read 0x85000000 kernel; bootm 0x85000000"
$ setenv ramboot_openwrt "run bootargs_openwrt;
setenv ipaddr 192.168.1.105; setenv serverip 192.168.1.75;
netget; set fdt_high 0x87000000; bootm"
$ setenv bootcmd "run nandboot_openwrt"
$ saveenv
4. Load OpenWrt into RAM:
$ run ramboot_openwrt
5. After OpenWrt booted, transfer the OpenWrt sysupgrade image to the
/tmp folder on the device.
6. Flash OpenWrt:
Make sure you use the mtd partition with the label "ubi" here!
$ ubidetach -p /dev/mtd1
$ ubiformat /dev/mtd1
$ sysupgrade -n /tmp/openwrt-sysupgrade.bin
To go back to the stock firmware, simply reset the bootcmd in the
bootloader to the original value:
$ setenv bootcmd "boot"
$ saveenv
Signed-off-by: David Bauer <mail@david-bauer.net>
Cell C RTL30VW is a LTE router with tho gigabit ethernets and integrated
QMI mPCIE modem.
This is stripped version of ASKEY RTL0030VW.
Hardware:
Specification:
-CPU: IPQ4019
-RAM: 256MB
-Flash: NAND 128MB + NOR 16MB
-WiFi: Integrated bgn/ac
-LTE: mPCIe card (Modem chipset MDM9230)
-LAN: 2 Gigabit Ports
-USB: 2x USB2.0
-Serial console: RJ-45 115200 8n1
-Unsupported VoIP
Known issues:
None so far.
Instruction install:
There are two methods: Factory web-gui and serial + tftp.
Web-gui:
1. Apply factory image via stock web-gui.
Serial + initramfs:
1. Rename OpenWrt initramfs image to "image"
2. Connect serial console (115200,8n1)
3. Set IP to different than 192.168.1.11, but 24 bit mask, eg. 192.168.1.4.
4. U-Boot commands:
sf probe && sf read 0x80000000 0x180000 0x10000
setenv serverip 192.168.1.4
set fdt_high 0x85000000
tftpboot 0x84000000 image
bootm 0x84000000
5. Install sysupgrade image via "sysupgrade -n"
Back to stock:
All is needed is swap 0x4c byte in mtd8 from 0 to 1 or 1 to 0,
do firstboot and factory reset with OFW:
1. read mtd8:
dd if=/dev/mtd8 of=/tmp/mtd8
2. go to tmp:
cd /tmp/
3. write first part of partition:
dd if=mtd8 of=mtd8.new bs=1 count=76
4. check which layout uses bootloader:
cat /proc/mtd
5a. If first are kernel_1 and rootfs_1 write 0:
echo -n -e '\x00' >> mtd8.new
5b. If first are kernel and rootfs write 1:
echo -n -e '\x01' >> mtd8.new
6. fill with rest of data:
dd if=mtd8 bs=1 skip=77 >> mtd8.new
7. CHECK IF mtd8.new HAVE CHANGED ONLY ONE BYTE! e.g with:
hexdump mtd8.new
8. write new mtd8 to flash:
mtd write mtd8.new /dev/mtd8
9. do firstboot
10.reboot
11. Do back to factory defaults in OFW GUI.
Based on work: Cezary Jackiewicz <cezary@eko.one.pl>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
MobiPromo CM520-79F is an AC1300 dual band router based on IPQ4019
Specification:
SoC/Wireless: QCA IPQ4019
RAM: 512MiB
Flash: 128MiB SLC NAND
Ethernet PHY: QCA8075
Ethernet ports: 1x WAN, 2x LAN
LEDs: 7 LEDs
2 (USB, CAN) are GPIO
other 5 (2.4G, 5G, LAN1, LAN2, WAN) are connected to a shift register
Button: Reset
Flash instruction:
Disassemble the router, connect UART pins like this:
GND TX RX
[x x . . x .]
[. . . . . .]
(QCA8075 and IPQ4019 below)
Baud-rate: 115200
Set up TFTP server: IP 192.168.1.188/24
Power on the router and interrupt the booting with UART console
env backup (in case you want to go back to stock and need it there):
printenv
(Copy the output to somewhere save)
Set bootenv:
setenv set_ubi 'set mtdids nand0=nand0; set mtdparts mtdparts=nand0:0x7480000@0xb80000(fs); ubi part fs'
setenv bootkernel 'ubi read 0x84000000 kernel; bootm 0x84000000#config@1'
setenv cm520_boot 'run set_ubi; run bootkernel'
setenv bootcmd 'run cm520_boot'
setenv bootargs
saveenv
Boot initramfs from TFTP:
tftpboot openwrt-ipq40xx-generic-mobipromo_cm520-79f-initramfs-fit-zImage.itb
bootm
After initramfs image is booted, backup rootfs partition in case of reverting to stock image
cat /dev/mtd12 > /tmp/mtd12.bin
Then fetch it via SCP
Upload nand-factory.ubi to /tmp via SCP, then run
mtd erase rootfs
mtd write /tmp/*nand-factory.ubi rootfs
reboot
To revert to stock image, restore default bootenv in uboot UART console
setenv bootcmd 'bootipq'
printenv
use the saved dump you did back when you installed OpenWrt to verify that
there are no other differences from back in the day.
saveenv
upload the backed up mtd12.bin and run
tftpboot mtd12.bin
nand erase 0xb80000 0x7480000
nand write 0x84000000 0xb80000 0x7480000
The BOOTCONFIG may have been configured to boot from alternate partition (rootfs_1) instead
In case of this, set it back to rootfs:
cd /tmp
cat /dev/mtd7 > mtd7.bin
echo -ne '\x0b' | dd of=mtd7.bin conv=notrunc bs=1 count=1 seek=4
for i in 28 48 68 108; do
dd if=/dev/zero of=mtd7.bin conv=notrunc bs=1 count=1 seek=$i
done
mtd write mtd7.bin BOOTCONFIG
mtd write mtd7.bin BOOTCONFIG1
Signed-off-by: DENG Qingfang <dengqf6@mail2.sysu.edu.cn>
[renamed volume to ubi to support autoboot,
as per David Lam's test in PR#2432]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
In 5.4 kernel old u32 array way of setting network features was dropped and linkmode is now the only way.
So lets migrate the PHY driver to support linkmode.
Also, now in order for gigabit to work, PHY driver needs to advertise PHY_GBIT_FEATURES instead of PHY_BASIC_FEATURES
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This patch adds support for the 8devices Habanero development board.
Specs are:
CPU: QCA IPQ4019
RAM: DDR3L 512MB
Storage: 32MB SPI-NOR and optional Parallel SLC NAND(Some boards ship with it and some without)
WLAN1: 2.4 GHz built into IPQ4019 (802.11n) 2x2
WLAN2: 5 GHz built into IPO4019 (802.11ac Wawe-2) 2x2
Ethernet: 5x Gbit LAN (QCA 8075)
USB: 1x USB 2.0 and 1x USB 3.0 (Both built into IPQ4019)
MicroSD slot (Uses SD controller built into IPQ4019)
SDIO3.0/EMMC slot (Uses the same SD controller)
Mini PCI-E Gen 2.0 slot (Built into IPQ4019)
5x LEDs (4 GPIO controllable)
2x Pushbutton (1 is connected to GPIO, other to SoC reset)
LCD ZIF socket (Uses the LCD controller built into IPQ4019 which has no driver support)
1x UART 115200 rate on J18
2x breakout development headers
12V DC Jack for power
DIP switch for bootstrap configuration
Installation instructions:
Since boards ship with vendors fork of OpenWrt sysupgrade can be used.
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit finally adds support for the built in SD/MMC controller in IPQ4019 SoC.
Controller is supported by the upstream SDHCI-MSM driver with a minor clock setting patch.
Patch is special to the IPQ4019 and cannot be upstreamed.
LDO and SDHCI node are upstreamed, and LDO node is awaiting to be accepted.
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch just refreshes the 5.4 patches. It seems as if
070-v4.20-soc-qcom-spm-add-SCM-probe-dependency.patch is
already applied, so drop it. It also does a quick
make kernel_oldconfig to get rid of unneeded symbols.
[Looks like USB and Ethernet need some more work].
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This backports commits from master that fix AES ciphers when using the
qce driver:
- A couple of simple fixes for CTR and XTS modes used with AES:
* 041-crypto-qce-fix-ctr-aes-qce-block-chunk-sizes.patch
* 042-crypto-qce-fix-xts-aes-qce-key-sizes.patch
- A fix for a bug that affected cases when there were more entries in
the input sg list than necessary to actually encrypt, resulting in
failure in gcm, where the authentication tag is present after the
encryption data:
* 043-crypto-qce-save-a-sg-table-slot-for-result-buf.patch
- A fix to update the IV buffer passed to the driver from the kernel:
* 044-crypto-qce-update-the-skcipher-IV.patch
- A patch that reduces memory footprint and driver initialization by
only initializing the fallback mechanism where it is actually used:
* 046-crypto-qce-initialize-fallback-only-for-AES.patch
- Three patches that make gcm and xts modes work with the qce driver,
and improve performance with small blocks:
* 047-crypto-qce-use-cryptlen-when-adding-extra-sgl.patch
* 048-crypto-qce-use-AES-fallback-for-small-requests.patch
* 049-crypto-qce-handle-AES-XTS-cases-that-qce-fails.patch
- A patch that allows the hashes/ciphers to be built individually.
* 051-crypto-qce-allow-building-only-hashes-ciphers.patch
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
[renumbered patches, added patches from dropped commit, refreshed, 5.4]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This backports a commit updating the API of the QCE crypto engine to
what is used in current kerenl, easing future upstream backports.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
[renumber patches, refreshed, added 5.4 patches]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
SOC: IPQ4019 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB
FLASH: NOR 4 MiB + NAND 128 MiB
ETH: Qualcomm Atheros QCA8072
WLAN1: Qualcomm Atheros QCA4019 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4019 5GHz 802.11a/n/ac 2:2x2
WLAN2: Qualcomm Atheros QCA9888 5GHz 802.11a/n/ac 2:2x2
INPUT: WPS Button
LEDS: Power, LAN1, LAN2, WLAN 2.4GHz, WLAN 5GHz-1, WLAN 5GHz-2, OPMODE
1. Load Ramdisk via U-Boot
To set up the flash memory environment, do the following:
a. As a preliminary step, ensure that the board console port is connected to the PC using these RS232 parameters:
* 115200bps
* 8N1
b. Confirm that the PC is connected to the board using one of the Ethernet ports.
c. Set a static ip 192.168.99.8 for Ethernet that connects to board.
d. The PC must have a TFTP server launched and listening on the interface to which the board is connected.
e. At this stage power up the board and, after a few seconds, press 4 and then any key during the countdown.
U-BOOT> set serverip 192.168.99.9 && tftpboot 0x84000000 192.168.99.8:openwrt.itb && bootm
Signed-off-by: Steven Lin <steven.lin@senao.com>
[copied 4.19 dts to 5.4]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
