13 Commits

Author SHA1 Message Date
Christian Marangi
80244360ae
generic: move QCOM SPI NAND driver to generic backports
QCOM SPI NAND driver got merged upstream hence we can drop the special
patch from qualcommax and qualcommbe target and move them to the generic
backports directory to reduce patch maintenance.

While at it refresh any affected patch and target and also backport other
minor fixup for the SPI NAND driver merged upstream later.

Link: https://github.com/openwrt/openwrt/pull/17788
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-10 15:01:09 +02:00
Andrew LaMarche
054b870196 generic: import rtl8261n patches from mediatek
RTL8261N is used on some Airoha and Realtek devices. Move the driver
from Mediatek to generic so it can be used everywhere.

Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18163
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-03-16 19:05:56 +01:00
Hauke Mehrtens
abd0418684 kernel: Activate CONFIG_NET_SWITCHDEV in generic config
The CONFIG_NET_SWITCHDEV option is needed by CONFIG_DSA and some other
options. It is boolean, we have to compile it into the kernel it self.
Activate it for all targets in the generic configuration, it is already
activated for most of them. This allows to install DSA drivers as a
module.

On the ramips/mt7620 target the kernel would grown by 4.5kB.

For some small targets which do not support a DSA switch by default the
option is deactivated.

Link: https://github.com/openwrt/openwrt/pull/17668
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-03-15 13:54:59 +01:00
Chuanhong Guo
2e5e022c30 siflower: move soruce-only flag to sf19a2890 subtarget
sf21 contains support for Bananapi BPI-RV2 which is a board available
to the general public. Limit the source-only flag to sf19a2890 instead.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2025-02-05 11:12:42 +08:00
Chuanhong Guo
704c9d0d1a siflower: sf19a2890: refresh kconfig
update kconfig for symbols from the newly added subtarget

Link: https://github.com/openwrt/openwrt/pull/17115
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2025-02-05 11:08:38 +08:00
Chuanhong Guo
b8a8bf53e9 siflower: sf21: add support for Bananapi BPI-RV2
Specification:
 - Siflower SF21H8898
 - 512MB DDR3, 128MB SPI-NAND and 16MB SPI-NOR
 - 5x Gigabit ports (SF23P1240 QSGMII PHY and SF23P1211F RGMII PHY)
 - 1x 2.5G port (Airoha EN8811H PHY)
 - M.2 Key B slot with USB2.0, PCIEx1 and a NanoSIM card slot
 - MiniPCIe slot with USB2.0 and PCIEx1
 - 1x USB2.0 port through USB Hub
 - PCF8563-compatible RTC

The SoC can only boot from SPI0. Two SPI flash chipselects are connected
to GPIO5 (SPI0 CS) and GPIO36 through a 2x2 jumper. It boots from
SPI-NOR or SPI-NAND depending on how the jumpers are connected.

The firmware can be flashed using U-boot web recovery from Siflower
vendor U-boot.

Link: https://github.com/openwrt/openwrt/pull/17115
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2025-02-05 11:08:37 +08:00
Chuanhong Guo
c057db94f8 siflower: sf21: new subtarget for sf21a6826/sf21h8898
Siflower SF21A6826/SF21H8898 are a family of RISC-V SoCs with:

 * Quad-core T-Head C908 (1.125G for SF21A6826, 1.25G for SF21H8898)
 * DDR3/DDR4 memory controller
 * 1 QSGMII 4x1G
 * 1 SGMII/2500Base-X 2.5G
 * 1 additional RGMII on SF21H8898
 * Network offloading engine for L2 switching and L3 NAT
 * 2 PCIE Gen2 lanes, operating in either one PCIE Gen2x2 or two
   PCIE Gen2x1 mode
 * 1 USB2.0

Link: https://github.com/openwrt/openwrt/pull/17115
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2025-02-05 11:08:37 +08:00
Chuanhong Guo
274df8eedb siflower: add ngpios property to gpio-siflower
The same GPIO controller is found on all current Siflower SoCs,
with different number of GPIOs. Add ngpios property instead of
specifying it with dt match data.

Link: https://github.com/openwrt/openwrt/pull/17115
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2025-02-05 11:08:37 +08:00
Chuanhong Guo
bbde170ec6 siflower: add per-subtarget image makefile
Move SF19A2890 images into a separated .mk in preparation for
more subtargets.

Link: https://github.com/openwrt/openwrt/pull/17115
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2025-02-05 11:08:37 +08:00
Rosen Penev
cd92cbddf8 kernel: filter out compiler opts from config
These get dynamically set based on compiler version. Not relevant for
targets.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16770
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-11-17 14:55:16 +01:00
Rosen Penev
cc98cfafd7
treewide: remove THIS_MODULE assignment
Matches upstream coccinelle check: api/platform_no_drv_owner.cocci.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16846
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-11-10 02:16:31 +01:00
Rosen Penev
f9da81d32f siflower: gpio: use gpiochip_get_data
No need to use container_of.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16749
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2024-10-21 09:18:21 +08:00
Chuanhong Guo
4ed209326b siflower: new target for Siflower SF19A2890
Siflower SF19A2890 is an SoC with:
Dual-core MIPS InterAptiv at 800MHz
DDR3 controller
One Gigabit Ethernet MAC with RGMII and IPv4 HNAT engine
Built-in 2x2 11N + 2x2 11AC WiFi radio
USB 2.0 OTG
I2C/SPI/GPIO and various other peripherals

This PR adds support for SF19A2890 EVB with ethernet support.

EVB spec:
Memory: DDR3 128M
Ethernet: RTL8367RB 5-port gigabit switch
Flash: 16M NOR
Others: MicroUSB OTG, LED x 1, Reset button x1

The built image can be flashed using u-boot recovery.

This target is marked as source-only until support for a commercial
router board comes.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2024-09-17 22:16:41 +08:00