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mediatek: update patches
Signed-off-by: John Crispin <john@phrozen.org>
This commit is contained in:
parent
b5516603dd
commit
abb0452cd8
@ -147,20 +147,7 @@
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#include "mtk_eth_soc.h"
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@@ -69,10 +71,12 @@ u32 mtk_m32(struct mtk_eth *eth, u32 mas
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{
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u32 val;
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+ spin_lock(ð->page_lock);
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val = mtk_r32(eth, reg);
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val &= ~mask;
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val |= set;
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mtk_w32(eth, val, reg);
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+ spin_unlock(ð->page_lock);
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return reg;
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}
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@@ -1298,8 +1302,16 @@ static int mtk_poll_rx(struct napi_struc
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@@ -1298,8 +1312,16 @@ static int mtk_poll_rx(struct napi_struc
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(trxd.rxd2 & RX_DMA_VTAG))
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
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RX_DMA_VID(trxd.rxd3));
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@ -179,7 +166,7 @@
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ring->data[idx] = new_data;
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rxd->rxd1 = (unsigned int)dma_addr;
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@@ -2216,6 +2228,9 @@ static int mtk_open(struct net_device *d
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@@ -2216,6 +2238,9 @@ static int mtk_open(struct net_device *d
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mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
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mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
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refcount_set(ð->dma_refcnt, 1);
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@ -189,7 +176,7 @@
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}
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else
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refcount_inc(ð->dma_refcnt);
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@@ -2274,6 +2289,9 @@ static int mtk_stop(struct net_device *d
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@@ -2274,6 +2299,9 @@ static int mtk_stop(struct net_device *d
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mtk_dma_free(eth);
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@ -199,7 +186,7 @@
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return 0;
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}
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@@ -2733,6 +2751,27 @@ static int mtk_set_rxnfc(struct net_devi
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@@ -2733,6 +2761,27 @@ static int mtk_set_rxnfc(struct net_devi
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return ret;
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}
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@ -227,7 +214,7 @@
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static const struct ethtool_ops mtk_ethtool_ops = {
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.get_link_ksettings = mtk_get_link_ksettings,
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.set_link_ksettings = mtk_set_link_ksettings,
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@@ -2764,6 +2803,9 @@ static const struct net_device_ops mtk_n
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@@ -2764,6 +2813,9 @@ static const struct net_device_ops mtk_n
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#ifdef CONFIG_NET_POLL_CONTROLLER
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.ndo_poll_controller = mtk_poll_controller,
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#endif
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@ -237,7 +224,7 @@
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};
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static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
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@@ -3097,6 +3139,7 @@ static const struct mtk_soc_data mt7622_
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@@ -3097,6 +3149,7 @@ static const struct mtk_soc_data mt7622_
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.hw_features = MTK_HW_FEATURES,
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.required_clks = MT7622_CLKS_BITMAP,
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.required_pctl = false,
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@ -0,0 +1,94 @@
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:05.702816632 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:19.590328084 +0800
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@@ -2191,6 +2191,31 @@
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return 0;
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}
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+static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
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+{
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+ int i;
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+
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+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
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+ return;
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+
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+ for (i = 0; i < MTK_MAC_COUNT; i++) {
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+ u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
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+
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+ /* default setup the forward port to send frame to PDMA */
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+ val &= ~0xffff;
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+
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+ /* Enable RX checksum */
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+ val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
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+
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+ val |= config;
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+
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+ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
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+ }
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+ /* Reset and enable PSE */
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+ mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
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+ mtk_w32(eth, 0, MTK_RST_GL);
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+}
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+
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static int mtk_open(struct net_device *dev)
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{
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struct mtk_mac *mac = netdev_priv(dev);
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@@ -2211,6 +2236,8 @@
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if (err)
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return err;
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+ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
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+
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napi_enable(ð->tx_napi);
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napi_enable(ð->rx_napi);
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mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
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@@ -2266,6 +2293,8 @@
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if (!refcount_dec_and_test(ð->dma_refcnt))
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return 0;
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+ mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
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+
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mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
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mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
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napi_disable(ð->tx_napi);
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@@ -2392,8 +2421,6 @@
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mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
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mtk_tx_irq_disable(eth, ~0);
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mtk_rx_irq_disable(eth, ~0);
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- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
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- mtk_w32(eth, 0, MTK_RST_GL);
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/* FE int grouping */
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mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
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@@ -2402,19 +2429,6 @@
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mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
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mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
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- for (i = 0; i < MTK_MAC_COUNT; i++) {
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- u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
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-
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- /* setup the forward port to send frame to PDMA */
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- val &= ~0xffff;
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-
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- /* Enable RX checksum */
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- val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
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-
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- /* setup the mac dma */
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- mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
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- }
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-
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return 0;
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err_disable_pm:
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-04-21 14:33:10.702640743 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-04-21 14:33:24.902141220 +0800
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@@ -84,6 +84,8 @@
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#define MTK_GDMA_ICS_EN BIT(22)
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#define MTK_GDMA_TCS_EN BIT(21)
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#define MTK_GDMA_UCS_EN BIT(20)
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+#define MTK_GDMA_TO_PDMA 0x0
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+#define MTK_GDMA_DROP_ALL 0x7777
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/* Unicast Filter MAC Address Register - Low */
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#define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000))
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@ -0,0 +1,25 @@
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:05.702816632 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:19.590328084 +0800
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@@ -1345,10 +1345,11 @@
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u32 next_cpu = desc->txd2;
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int mac = 0;
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- desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
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if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0)
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break;
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+ desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
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+
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tx_buf = mtk_desc_to_tx_buf(ring, desc);
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if (tx_buf->flags & MTK_TX_FLAGS_FPORT1)
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mac = 1;
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@@ -2172,7 +2173,7 @@
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
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mtk_w32(eth,
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- MTK_TX_WB_DDONE | MTK_TX_DMA_EN |
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+ MTK_TX_DMA_EN |
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MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
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MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
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MTK_RX_BT_32DWORDS,
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