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kernel: bump 6.6 to 6.6.28

Browse Source 
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.28

Removed upstream:
	pending-6.6/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch

All oither patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.28&id=8b6c4b62582606c62074a7e7c64156f56d2785f2

Build system: x86/64
Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
Run-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3

Signed-off-by: John Audia <therealgraysky@proton.me>
This commit is contained in:
John Audia 2024-04-17 15:01:37 -04:00 committed by Robert Marko
parent 80a063156f
commit 5efd41c10b
29 changed files with 98 additions and 581 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/kernel-6.6
View File

@ -1,2 +1,2 @@
LINUX_VERSION-6.6 = .27 LINUX_VERSION-6.6 = .28
LINUX_KERNEL_HASH-6.6.27 = 639e50060e3c8f23ed017cb10cfeacc6ba88ff5583812bb76859b4cc6a128291 LINUX_KERNEL_HASH-6.6.28 = 818716ed13e7dba6aaeae24e3073993e260812ed128d10272e94b922ee6d3394

4
target/linux/generic/backport-6.6/790-02-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2860,15 +2860,6 @@ static void mt753x_phylink_mac_link_down @@ -3021,15 +3021,6 @@ static void mt753x_phylink_mac_link_down
mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
} }
@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port, static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port,
unsigned int mode, unsigned int mode,
phy_interface_t interface, phy_interface_t interface,
@@ -2956,8 +2947,6 @@ mt7531_cpu_port_config(struct dsa_switch @@ -3117,8 +3108,6 @@ mt7531_cpu_port_config(struct dsa_switch
return ret; return ret;
mt7530_write(priv, MT7530_PMCR_P(port), mt7530_write(priv, MT7530_PMCR_P(port),
PMCR_CPU_PORT_SETTING(priv->id)); PMCR_CPU_PORT_SETTING(priv->id));

4
target/linux/generic/backport-6.6/790-04-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch
View File

@ -46,7 +46,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2182,24 +2182,40 @@ mt7530_free_irq_common(struct mt7530_pri @@ -2343,24 +2343,40 @@ mt7530_free_irq_common(struct mt7530_pri
static void static void
mt7530_free_irq(struct mt7530_priv *priv) mt7530_free_irq(struct mt7530_priv *priv)
{ {
@ -92,7 +92,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
bus->priv = priv; bus->priv = priv;
bus->name = KBUILD_MODNAME "-mii"; bus->name = KBUILD_MODNAME "-mii";
snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++); snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++);
@@ -2210,16 +2226,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr @@ -2371,16 +2387,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr
bus->parent = dev; bus->parent = dev;
bus->phy_mask = ~ds->phys_mii_mask; bus->phy_mask = ~ds->phys_mii_mask;

10
target/linux/generic/backport-6.6/790-05-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch
View File

@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -1071,10 +1071,6 @@ mt753x_cpu_port_enable(struct dsa_switch @@ -1232,10 +1232,6 @@ mt753x_cpu_port_enable(struct dsa_switch
mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |
UNU_FFP(BIT(port))); UNU_FFP(BIT(port)));
@ -49,7 +49,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Add the CPU port to the CPU port bitmap for MT7531 and the switch on /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
* the MT7988 SoC. Trapped frames will be forwarded to the CPU port that * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
* is affine to the inbound user port. * is affine to the inbound user port.
@@ -3128,6 +3124,36 @@ static int mt753x_set_mac_eee(struct dsa @@ -3289,6 +3285,36 @@ static int mt753x_set_mac_eee(struct dsa
return 0; return 0;
} }
@ -86,7 +86,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
{ {
return 0; return 0;
@@ -3183,6 +3209,7 @@ const struct dsa_switch_ops mt7530_switc @@ -3344,6 +3370,7 @@ const struct dsa_switch_ops mt7530_switc
.phylink_mac_link_up = mt753x_phylink_mac_link_up, .phylink_mac_link_up = mt753x_phylink_mac_link_up,
.get_mac_eee = mt753x_get_mac_eee, .get_mac_eee = mt753x_get_mac_eee,
.set_mac_eee = mt753x_set_mac_eee, .set_mac_eee = mt753x_set_mac_eee,
@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
#define MIRROR_EN BIT(3) #define MIRROR_EN BIT(3)
#define MIRROR_PORT(x) ((x) & 0x7) #define MIRROR_PORT(x) ((x) & 0x7)
#define MIRROR_MASK 0x7 #define MIRROR_MASK 0x7
@@ -780,6 +780,7 @@ struct mt753x_info { @@ -785,6 +785,7 @@ struct mt753x_info {
* @irq_domain: IRQ domain of the switch irq_chip * @irq_domain: IRQ domain of the switch irq_chip
* @irq_enable: IRQ enable bits, synced to SYS_INT_EN * @irq_enable: IRQ enable bits, synced to SYS_INT_EN
* @create_sgmii: Pointer to function creating SGMII PCS instance(s) * @create_sgmii: Pointer to function creating SGMII PCS instance(s)
@ -115,7 +115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
*/ */
struct mt7530_priv { struct mt7530_priv {
struct device *dev; struct device *dev;
@@ -806,6 +807,7 @@ struct mt7530_priv { @@ -811,6 +812,7 @@ struct mt7530_priv {
struct irq_domain *irq_domain; struct irq_domain *irq_domain;
u32 irq_enable; u32 irq_enable;
int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii);

4
target/linux/generic/backport-6.6/790-06-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch
View File

@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.h --- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h
@@ -703,7 +703,7 @@ struct mt7530_port { @@ -708,7 +708,7 @@ struct mt7530_port {
/* Port 5 interface select definitions */ /* Port 5 interface select definitions */
enum p5_interface_select { enum p5_interface_select {
@ -34,7 +34,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P0,
P5_INTF_SEL_PHY_P4, P5_INTF_SEL_PHY_P4,
P5_INTF_SEL_GMAC5, P5_INTF_SEL_GMAC5,
@@ -796,7 +796,7 @@ struct mt7530_priv { @@ -801,7 +801,7 @@ struct mt7530_priv {
bool mcm; bool mcm;
phy_interface_t p6_interface; phy_interface_t p6_interface;
phy_interface_t p5_interface; phy_interface_t p5_interface;

22
target/linux/generic/backport-6.6/790-07-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch
View File

@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
default: default:
return "unknown"; return "unknown";
} }
@@ -2524,6 +2510,12 @@ mt7531_setup(struct dsa_switch *ds) @@ -2685,6 +2671,12 @@ mt7531_setup(struct dsa_switch *ds)
return -ENODEV; return -ENODEV;
} }
@ -113,7 +113,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* all MACs must be forced link-down before sw reset */ /* all MACs must be forced link-down before sw reset */
for (i = 0; i < MT7530_NUM_PORTS; i++) for (i = 0; i < MT7530_NUM_PORTS; i++)
mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
@@ -2533,21 +2525,18 @@ mt7531_setup(struct dsa_switch *ds) @@ -2694,21 +2686,18 @@ mt7531_setup(struct dsa_switch *ds)
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
SYS_CTRL_REG_RST); SYS_CTRL_REG_RST);
@ -141,7 +141,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
MT7531_GPIO0_INTERRUPT); MT7531_GPIO0_INTERRUPT);
@@ -2607,11 +2596,6 @@ static void mt7530_mac_port_get_caps(str @@ -2768,11 +2757,6 @@ static void mt7530_mac_port_get_caps(str
} }
} }
@ -153,7 +153,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config) struct phylink_config *config)
{ {
@@ -2624,7 +2608,7 @@ static void mt7531_mac_port_get_caps(str @@ -2785,7 +2769,7 @@ static void mt7531_mac_port_get_caps(str
break; break;
case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
@ -162,7 +162,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
phy_interface_set_rgmii(config->supported_interfaces); phy_interface_set_rgmii(config->supported_interfaces);
break; break;
} }
@@ -2691,7 +2675,7 @@ static int mt7531_rgmii_setup(struct mt7 @@ -2852,7 +2836,7 @@ static int mt7531_rgmii_setup(struct mt7
{ {
u32 val; u32 val;
@ -171,7 +171,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
dev_err(priv->dev, "RGMII mode is not available for port %d\n", dev_err(priv->dev, "RGMII mode is not available for port %d\n",
port); port);
return -EINVAL; return -EINVAL;
@@ -2934,7 +2918,7 @@ mt7531_cpu_port_config(struct dsa_switch @@ -3095,7 +3079,7 @@ mt7531_cpu_port_config(struct dsa_switch
switch (port) { switch (port) {
case 5: case 5:
@ -180,7 +180,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
interface = PHY_INTERFACE_MODE_RGMII; interface = PHY_INTERFACE_MODE_RGMII;
else else
interface = PHY_INTERFACE_MODE_2500BASEX; interface = PHY_INTERFACE_MODE_2500BASEX;
@@ -3086,7 +3070,7 @@ mt753x_setup(struct dsa_switch *ds) @@ -3247,7 +3231,7 @@ mt753x_setup(struct dsa_switch *ds)
mt7530_free_irq_common(priv); mt7530_free_irq_common(priv);
if (priv->create_sgmii) { if (priv->create_sgmii) {
@ -191,7 +191,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
} }
--- a/drivers/net/dsa/mt7530.h --- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h
@@ -707,7 +707,6 @@ enum p5_interface_select { @@ -712,7 +712,6 @@ enum p5_interface_select {
P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P0,
P5_INTF_SEL_PHY_P4, P5_INTF_SEL_PHY_P4,
P5_INTF_SEL_GMAC5, P5_INTF_SEL_GMAC5,
@ -199,7 +199,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}; };
struct mt7530_priv; struct mt7530_priv;
@@ -776,6 +775,8 @@ struct mt753x_info { @@ -781,6 +780,8 @@ struct mt753x_info {
* registers * registers
* @p6_interface Holding the current port 6 interface * @p6_interface Holding the current port 6 interface
* @p5_intf_sel: Holding the current port 5 interface select * @p5_intf_sel: Holding the current port 5 interface select
@ -208,7 +208,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* @irq: IRQ number of the switch * @irq: IRQ number of the switch
* @irq_domain: IRQ domain of the switch irq_chip * @irq_domain: IRQ domain of the switch irq_chip
* @irq_enable: IRQ enable bits, synced to SYS_INT_EN * @irq_enable: IRQ enable bits, synced to SYS_INT_EN
@@ -797,6 +798,7 @@ struct mt7530_priv { @@ -802,6 +803,7 @@ struct mt7530_priv {
phy_interface_t p6_interface; phy_interface_t p6_interface;
phy_interface_t p5_interface; phy_interface_t p5_interface;
enum p5_interface_select p5_intf_sel; enum p5_interface_select p5_intf_sel;
@ -216,7 +216,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
u8 mirror_rx; u8 mirror_rx;
u8 mirror_tx; u8 mirror_tx;
struct mt7530_port ports[MT7530_NUM_PORTS]; struct mt7530_port ports[MT7530_NUM_PORTS];
@@ -806,7 +808,7 @@ struct mt7530_priv { @@ -811,7 +813,7 @@ struct mt7530_priv {
int irq; int irq;
struct irq_domain *irq_domain; struct irq_domain *irq_domain;
u32 irq_enable; u32 irq_enable;

12
target/linux/generic/backport-6.6/790-08-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch
View File

@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2574,12 +2574,14 @@ static void mt7530_mac_port_get_caps(str @@ -2735,12 +2735,14 @@ static void mt7530_mac_port_get_caps(str
struct phylink_config *config) struct phylink_config *config)
{ {
switch (port) { switch (port) {
@ -54,7 +54,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
phy_interface_set_rgmii(config->supported_interfaces); phy_interface_set_rgmii(config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_MII, __set_bit(PHY_INTERFACE_MODE_MII,
config->supported_interfaces); config->supported_interfaces);
@@ -2587,7 +2589,8 @@ static void mt7530_mac_port_get_caps(str @@ -2748,7 +2750,8 @@ static void mt7530_mac_port_get_caps(str
config->supported_interfaces); config->supported_interfaces);
break; break;
@ -64,7 +64,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
__set_bit(PHY_INTERFACE_MODE_RGMII, __set_bit(PHY_INTERFACE_MODE_RGMII,
config->supported_interfaces); config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_TRGMII, __set_bit(PHY_INTERFACE_MODE_TRGMII,
@@ -2602,19 +2605,24 @@ static void mt7531_mac_port_get_caps(str @@ -2763,19 +2766,24 @@ static void mt7531_mac_port_get_caps(str
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
switch (port) { switch (port) {
@ -92,7 +92,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
__set_bit(PHY_INTERFACE_MODE_SGMII, __set_bit(PHY_INTERFACE_MODE_SGMII,
config->supported_interfaces); config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_1000BASEX, __set_bit(PHY_INTERFACE_MODE_1000BASEX,
@@ -2633,11 +2641,13 @@ static void mt7988_mac_port_get_caps(str @@ -2794,11 +2802,13 @@ static void mt7988_mac_port_get_caps(str
phy_interface_zero(config->supported_interfaces); phy_interface_zero(config->supported_interfaces);
switch (port) { switch (port) {
@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
case 6: case 6:
__set_bit(PHY_INTERFACE_MODE_INTERNAL, __set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces); config->supported_interfaces);
@@ -2801,12 +2811,12 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2962,12 +2972,12 @@ mt753x_phylink_mac_config(struct dsa_swi
u32 mcr_cur, mcr_new; u32 mcr_cur, mcr_new;
switch (port) { switch (port) {
@ -122,7 +122,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (priv->p5_interface == state->interface) if (priv->p5_interface == state->interface)
break; break;
@@ -2816,7 +2826,7 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2977,7 +2987,7 @@ mt753x_phylink_mac_config(struct dsa_swi
if (priv->p5_intf_sel != P5_DISABLED) if (priv->p5_intf_sel != P5_DISABLED)
priv->p5_interface = state->interface; priv->p5_interface = state->interface;
break; break;

6
target/linux/generic/backport-6.6/790-09-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch
View File

@ -52,7 +52,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2362,16 +2362,15 @@ mt7530_setup(struct dsa_switch *ds) @@ -2523,16 +2523,15 @@ mt7530_setup(struct dsa_switch *ds)
return ret; return ret;
/* Setup port 5 */ /* Setup port 5 */
@ -75,7 +75,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
for_each_child_of_node(dn, mac_np) { for_each_child_of_node(dn, mac_np) {
if (!of_device_is_compatible(mac_np, if (!of_device_is_compatible(mac_np,
"mediatek,eth-mac")) "mediatek,eth-mac"))
@@ -2402,6 +2401,8 @@ mt7530_setup(struct dsa_switch *ds) @@ -2563,6 +2562,8 @@ mt7530_setup(struct dsa_switch *ds)
of_node_put(phy_node); of_node_put(phy_node);
break; break;
} }
@ -84,7 +84,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
} }
#ifdef CONFIG_GPIOLIB #ifdef CONFIG_GPIOLIB
@@ -2412,8 +2413,6 @@ mt7530_setup(struct dsa_switch *ds) @@ -2573,8 +2574,6 @@ mt7530_setup(struct dsa_switch *ds)
} }
#endif /* CONFIG_GPIOLIB */ #endif /* CONFIG_GPIOLIB */

4
target/linux/generic/backport-6.6/790-11-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch
View File

@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
default: default:
dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", dev_err(ds->dev, "Unsupported p5_intf_sel %d\n",
priv->p5_intf_sel); priv->p5_intf_sel);
@@ -2367,8 +2364,6 @@ mt7530_setup(struct dsa_switch *ds) @@ -2528,8 +2525,6 @@ mt7530_setup(struct dsa_switch *ds)
* Set priv->p5_intf_sel to the appropriate value if PHY muxing * Set priv->p5_intf_sel to the appropriate value if PHY muxing
* is detected. * is detected.
*/ */
@ -49,7 +49,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
for_each_child_of_node(dn, mac_np) { for_each_child_of_node(dn, mac_np) {
if (!of_device_is_compatible(mac_np, if (!of_device_is_compatible(mac_np,
"mediatek,eth-mac")) "mediatek,eth-mac"))
@@ -2400,7 +2395,9 @@ mt7530_setup(struct dsa_switch *ds) @@ -2561,7 +2556,9 @@ mt7530_setup(struct dsa_switch *ds)
break; break;
} }

2
target/linux/generic/backport-6.6/790-13-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch
View File

@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
switch (interface) { switch (interface) {
case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII:
trgint = 0; trgint = 0;
@@ -2295,6 +2288,12 @@ mt7530_setup(struct dsa_switch *ds) @@ -2456,6 +2449,12 @@ mt7530_setup(struct dsa_switch *ds)
return -ENODEV; return -ENODEV;
} }

2
target/linux/generic/backport-6.6/790-15-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch
View File

@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
return 0; return 0;
} }
@@ -2649,11 +2653,10 @@ mt7530_mac_config(struct dsa_switch *ds, @@ -2810,11 +2814,10 @@ mt7530_mac_config(struct dsa_switch *ds,
{ {
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;

20
target/linux/generic/backport-6.6/790-16-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch
View File

@ -47,7 +47,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static void static void
mt7531_pll_setup(struct mt7530_priv *priv) mt7531_pll_setup(struct mt7530_priv *priv)
{ {
@@ -2640,14 +2628,6 @@ static void mt7988_mac_port_get_caps(str @@ -2801,14 +2789,6 @@ static void mt7988_mac_port_get_caps(str
} }
static int static int
@ -62,7 +62,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface) phy_interface_t interface)
{ {
@@ -2812,8 +2792,6 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2973,8 +2953,6 @@ mt753x_phylink_mac_config(struct dsa_swi
if (priv->p6_interface == state->interface) if (priv->p6_interface == state->interface)
break; break;
@ -71,7 +71,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (mt753x_mac_config(ds, port, mode, state) < 0) if (mt753x_mac_config(ds, port, mode, state) < 0)
goto unsupported; goto unsupported;
@@ -3130,11 +3108,6 @@ mt753x_conduit_state_change(struct dsa_s @@ -3291,11 +3269,6 @@ mt753x_conduit_state_change(struct dsa_s
mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val);
} }
@ -83,7 +83,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
static int mt7988_setup(struct dsa_switch *ds) static int mt7988_setup(struct dsa_switch *ds)
{ {
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
@@ -3198,7 +3171,6 @@ const struct mt753x_info mt753x_table[] @@ -3359,7 +3332,6 @@ const struct mt753x_info mt753x_table[]
.phy_write_c22 = mt7530_phy_write_c22, .phy_write_c22 = mt7530_phy_write_c22,
.phy_read_c45 = mt7530_phy_read_c45, .phy_read_c45 = mt7530_phy_read_c45,
.phy_write_c45 = mt7530_phy_write_c45, .phy_write_c45 = mt7530_phy_write_c45,
@ -91,7 +91,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.mac_port_get_caps = mt7530_mac_port_get_caps, .mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_config = mt7530_mac_config, .mac_port_config = mt7530_mac_config,
}, },
@@ -3210,7 +3182,6 @@ const struct mt753x_info mt753x_table[] @@ -3371,7 +3343,6 @@ const struct mt753x_info mt753x_table[]
.phy_write_c22 = mt7530_phy_write_c22, .phy_write_c22 = mt7530_phy_write_c22,
.phy_read_c45 = mt7530_phy_read_c45, .phy_read_c45 = mt7530_phy_read_c45,
.phy_write_c45 = mt7530_phy_write_c45, .phy_write_c45 = mt7530_phy_write_c45,
@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.mac_port_get_caps = mt7530_mac_port_get_caps, .mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_config = mt7530_mac_config, .mac_port_config = mt7530_mac_config,
}, },
@@ -3222,7 +3193,6 @@ const struct mt753x_info mt753x_table[] @@ -3383,7 +3354,6 @@ const struct mt753x_info mt753x_table[]
.phy_write_c22 = mt7531_ind_c22_phy_write, .phy_write_c22 = mt7531_ind_c22_phy_write,
.phy_read_c45 = mt7531_ind_c45_phy_read, .phy_read_c45 = mt7531_ind_c45_phy_read,
.phy_write_c45 = mt7531_ind_c45_phy_write, .phy_write_c45 = mt7531_ind_c45_phy_write,
@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.cpu_port_config = mt7531_cpu_port_config, .cpu_port_config = mt7531_cpu_port_config,
.mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_config = mt7531_mac_config, .mac_port_config = mt7531_mac_config,
@@ -3235,7 +3205,6 @@ const struct mt753x_info mt753x_table[] @@ -3396,7 +3366,6 @@ const struct mt753x_info mt753x_table[]
.phy_write_c22 = mt7531_ind_c22_phy_write, .phy_write_c22 = mt7531_ind_c22_phy_write,
.phy_read_c45 = mt7531_ind_c45_phy_read, .phy_read_c45 = mt7531_ind_c45_phy_read,
.phy_write_c45 = mt7531_ind_c45_phy_write, .phy_write_c45 = mt7531_ind_c45_phy_write,
@ -115,7 +115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.cpu_port_config = mt7988_cpu_port_config, .cpu_port_config = mt7988_cpu_port_config,
.mac_port_get_caps = mt7988_mac_port_get_caps, .mac_port_get_caps = mt7988_mac_port_get_caps,
.mac_port_config = mt7988_mac_config, .mac_port_config = mt7988_mac_config,
@@ -3265,9 +3234,8 @@ mt7530_probe_common(struct mt7530_priv * @@ -3426,9 +3395,8 @@ mt7530_probe_common(struct mt7530_priv *
/* Sanity check if these required device operations are filled /* Sanity check if these required device operations are filled
* properly. * properly.
*/ */
@ -129,7 +129,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.h --- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h
@@ -724,8 +724,6 @@ struct mt753x_pcs { @@ -729,8 +729,6 @@ struct mt753x_pcs {
* @phy_write_c22: Holding the way writing PHY port using C22 * @phy_write_c22: Holding the way writing PHY port using C22
* @phy_read_c45: Holding the way reading PHY port using C45 * @phy_read_c45: Holding the way reading PHY port using C45
* @phy_write_c45: Holding the way writing PHY port using C45 * @phy_write_c45: Holding the way writing PHY port using C45
@ -138,7 +138,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* @phy_mode_supported: Check if the PHY type is being supported on a certain * @phy_mode_supported: Check if the PHY type is being supported on a certain
* port * port
* @mac_port_validate: Holding the way to set addition validate type for a * @mac_port_validate: Holding the way to set addition validate type for a
@@ -746,7 +744,6 @@ struct mt753x_info { @@ -751,7 +749,6 @@ struct mt753x_info {
int regnum); int regnum);
int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad,
int regnum, u16 val); int regnum, u16 val);

2
target/linux/generic/backport-6.6/790-17-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch
View File

@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2613,7 +2613,7 @@ static void mt7988_mac_port_get_caps(str @@ -2774,7 +2774,7 @@ static void mt7988_mac_port_get_caps(str
switch (port) { switch (port) {
/* Ports which are connected to switch PHYs. There is no MII pinout. */ /* Ports which are connected to switch PHYs. There is no MII pinout. */

2
target/linux/generic/backport-6.6/790-18-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch
View File

@ -27,7 +27,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2609,8 +2609,6 @@ static void mt7531_mac_port_get_caps(str @@ -2770,8 +2770,6 @@ static void mt7531_mac_port_get_caps(str
static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config) struct phylink_config *config)
{ {

8
target/linux/generic/backport-6.6/790-19-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch
View File

@ -33,7 +33,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2692,17 +2692,6 @@ static bool mt753x_is_mac_port(u32 port) @@ -2853,17 +2853,6 @@ static bool mt753x_is_mac_port(u32 port)
} }
static int static int
@ -51,7 +51,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface) phy_interface_t interface)
{ {
@@ -2742,6 +2731,9 @@ mt753x_mac_config(struct dsa_switch *ds, @@ -2903,6 +2892,9 @@ mt753x_mac_config(struct dsa_switch *ds,
{ {
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
@ -61,7 +61,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
return priv->info->mac_port_config(ds, port, mode, state->interface); return priv->info->mac_port_config(ds, port, mode, state->interface);
} }
@@ -3205,7 +3197,6 @@ const struct mt753x_info mt753x_table[] @@ -3366,7 +3358,6 @@ const struct mt753x_info mt753x_table[]
.phy_write_c45 = mt7531_ind_c45_phy_write, .phy_write_c45 = mt7531_ind_c45_phy_write,
.cpu_port_config = mt7988_cpu_port_config, .cpu_port_config = mt7988_cpu_port_config,
.mac_port_get_caps = mt7988_mac_port_get_caps, .mac_port_get_caps = mt7988_mac_port_get_caps,
@ -69,7 +69,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
}, },
}; };
EXPORT_SYMBOL_GPL(mt753x_table); EXPORT_SYMBOL_GPL(mt753x_table);
@@ -3233,8 +3224,7 @@ mt7530_probe_common(struct mt7530_priv * @@ -3394,8 +3385,7 @@ mt7530_probe_common(struct mt7530_priv *
* properly. * properly.
*/ */
if (!priv->info->sw_setup || !priv->info->phy_read_c22 || if (!priv->info->sw_setup || !priv->info->phy_read_c22 ||

2
target/linux/generic/backport-6.6/790-20-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch
View File

@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2091,7 +2091,7 @@ mt7530_setup_irq(struct mt7530_priv *pri @@ -2252,7 +2252,7 @@ mt7530_setup_irq(struct mt7530_priv *pri
} }
/* This register must be set for MT7530 to properly fire interrupts */ /* This register must be set for MT7530 to properly fire interrupts */

2
target/linux/generic/backport-6.6/790-21-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch
View File

@ -22,7 +22,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2487,14 +2487,12 @@ mt7531_setup(struct dsa_switch *ds) @@ -2648,14 +2648,12 @@ mt7531_setup(struct dsa_switch *ds)
val = mt7530_read(priv, MT7531_TOP_SIG_SR); val = mt7530_read(priv, MT7531_TOP_SIG_SR);
priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);

18
target/linux/generic/backport-6.6/790-22-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch
View File

@ -36,7 +36,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2623,7 +2623,7 @@ static void mt7988_mac_port_get_caps(str @@ -2784,7 +2784,7 @@ static void mt7988_mac_port_get_caps(str
} }
} }
@ -45,7 +45,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface) phy_interface_t interface)
{ {
@@ -2633,22 +2633,14 @@ mt7530_mac_config(struct dsa_switch *ds, @@ -2794,22 +2794,14 @@ mt7530_mac_config(struct dsa_switch *ds,
mt7530_setup_port5(priv->ds, interface); mt7530_setup_port5(priv->ds, interface);
else if (port == 6) else if (port == 6)
mt7530_setup_port6(priv->ds, interface); mt7530_setup_port6(priv->ds, interface);
@ -71,7 +71,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
val = mt7530_read(priv, MT7531_CLKGEN_CTRL); val = mt7530_read(priv, MT7531_CLKGEN_CTRL);
val |= GP_CLK_EN; val |= GP_CLK_EN;
val &= ~GP_MODE_MASK; val &= ~GP_MODE_MASK;
@@ -2676,20 +2668,14 @@ static int mt7531_rgmii_setup(struct mt7 @@ -2837,20 +2829,14 @@ static int mt7531_rgmii_setup(struct mt7
case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_ID:
break; break;
default: default:
@ -95,7 +95,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface) phy_interface_t interface)
{ {
@@ -2697,42 +2683,21 @@ mt7531_mac_config(struct dsa_switch *ds, @@ -2858,42 +2844,21 @@ mt7531_mac_config(struct dsa_switch *ds,
struct phy_device *phydev; struct phy_device *phydev;
struct dsa_port *dp; struct dsa_port *dp;
@ -143,7 +143,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
} }
static struct phylink_pcs * static struct phylink_pcs *
@@ -2761,17 +2726,11 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2922,17 +2887,11 @@ mt753x_phylink_mac_config(struct dsa_swi
u32 mcr_cur, mcr_new; u32 mcr_cur, mcr_new;
switch (port) { switch (port) {
@ -162,7 +162,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
if (priv->p5_intf_sel != P5_DISABLED) if (priv->p5_intf_sel != P5_DISABLED)
priv->p5_interface = state->interface; priv->p5_interface = state->interface;
@@ -2780,16 +2739,10 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2941,16 +2900,10 @@ mt753x_phylink_mac_config(struct dsa_swi
if (priv->p6_interface == state->interface) if (priv->p6_interface == state->interface)
break; break;
@ -180,7 +180,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
} }
mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
@@ -2872,7 +2825,6 @@ mt7531_cpu_port_config(struct dsa_switch @@ -3033,7 +2986,6 @@ mt7531_cpu_port_config(struct dsa_switch
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
phy_interface_t interface; phy_interface_t interface;
int speed; int speed;
@ -188,7 +188,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
switch (port) { switch (port) {
case 5: case 5:
@@ -2897,9 +2849,8 @@ mt7531_cpu_port_config(struct dsa_switch @@ -3058,9 +3010,8 @@ mt7531_cpu_port_config(struct dsa_switch
else else
speed = SPEED_1000; speed = SPEED_1000;
@ -202,7 +202,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL,
--- a/drivers/net/dsa/mt7530.h --- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h
@@ -750,9 +750,9 @@ struct mt753x_info { @@ -755,9 +755,9 @@ struct mt753x_info {
void (*mac_port_validate)(struct dsa_switch *ds, int port, void (*mac_port_validate)(struct dsa_switch *ds, int port,
phy_interface_t interface, phy_interface_t interface,
unsigned long *supported); unsigned long *supported);

32
target/linux/generic/backport-6.6/790-23-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch
View File

@ -57,7 +57,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -1002,18 +1002,10 @@ mt753x_trap_frames(struct mt7530_priv *p @@ -1163,18 +1163,10 @@ mt753x_trap_frames(struct mt7530_priv *p
MT753X_BPDU_CPU_ONLY); MT753X_BPDU_CPU_ONLY);
} }
@ -77,7 +77,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
/* Enable Mediatek header mode on the cpu port */ /* Enable Mediatek header mode on the cpu port */
mt7530_write(priv, MT7530_PVC_P(port), mt7530_write(priv, MT7530_PVC_P(port),
@@ -1039,8 +1031,6 @@ mt753x_cpu_port_enable(struct dsa_switch @@ -1200,8 +1192,6 @@ mt753x_cpu_port_enable(struct dsa_switch
/* Set to fallback mode for independent VLAN learning */ /* Set to fallback mode for independent VLAN learning */
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
MT7530_PORT_FALLBACK_MODE); MT7530_PORT_FALLBACK_MODE);
@ -86,7 +86,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
} }
static int static int
@@ -2297,8 +2287,6 @@ mt7530_setup(struct dsa_switch *ds) @@ -2458,8 +2448,6 @@ mt7530_setup(struct dsa_switch *ds)
val |= MHWTRAP_MANUAL; val |= MHWTRAP_MANUAL;
mt7530_write(priv, MT7530_MHWTRAP, val); mt7530_write(priv, MT7530_MHWTRAP, val);
@ -95,7 +95,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mt753x_trap_frames(priv); mt753x_trap_frames(priv);
/* Enable and reset MIB counters */ /* Enable and reset MIB counters */
@@ -2313,9 +2301,7 @@ mt7530_setup(struct dsa_switch *ds) @@ -2474,9 +2462,7 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
if (dsa_is_cpu_port(ds, i)) { if (dsa_is_cpu_port(ds, i)) {
@ -106,7 +106,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
} else { } else {
mt7530_port_disable(ds, i); mt7530_port_disable(ds, i);
@@ -2419,9 +2405,7 @@ mt7531_setup_common(struct dsa_switch *d @@ -2580,9 +2566,7 @@ mt7531_setup_common(struct dsa_switch *d
mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR); mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR);
if (dsa_is_cpu_port(ds, i)) { if (dsa_is_cpu_port(ds, i)) {
@ -117,7 +117,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
} else { } else {
mt7530_port_disable(ds, i); mt7530_port_disable(ds, i);
@@ -2510,10 +2494,6 @@ mt7531_setup(struct dsa_switch *ds) @@ -2671,10 +2655,6 @@ mt7531_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
MT7531_GPIO0_INTERRUPT); MT7531_GPIO0_INTERRUPT);
@ -128,7 +128,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
/* Enable PHY core PLL, since phy_device has not yet been created /* Enable PHY core PLL, since phy_device has not yet been created
* provided for phy_[read,write]_mmd_indirect is called, we provide * provided for phy_[read,write]_mmd_indirect is called, we provide
* our own mt7531_ind_mmd_phy_[read,write] to complete this * our own mt7531_ind_mmd_phy_[read,write] to complete this
@@ -2725,26 +2705,9 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2886,26 +2866,9 @@ mt753x_phylink_mac_config(struct dsa_swi
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new; u32 mcr_cur, mcr_new;
@ -156,7 +156,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
mcr_new = mcr_cur; mcr_new = mcr_cur;
mcr_new &= ~PMCR_LINK_SETTINGS_MASK; mcr_new &= ~PMCR_LINK_SETTINGS_MASK;
@@ -2780,17 +2743,10 @@ static void mt753x_phylink_mac_link_up(s @@ -2941,17 +2904,10 @@ static void mt753x_phylink_mac_link_up(s
mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK; mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
@ -176,7 +176,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mcr |= PMCR_FORCE_SPEED_1000; mcr |= PMCR_FORCE_SPEED_1000;
break; break;
case SPEED_100: case SPEED_100:
@@ -2808,6 +2764,7 @@ static void mt753x_phylink_mac_link_up(s @@ -2969,6 +2925,7 @@ static void mt753x_phylink_mac_link_up(s
if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) { if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) {
switch (speed) { switch (speed) {
case SPEED_1000: case SPEED_1000:
@ -184,7 +184,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mcr |= PMCR_FORCE_EEE1G; mcr |= PMCR_FORCE_EEE1G;
break; break;
case SPEED_100: case SPEED_100:
@@ -2819,61 +2776,6 @@ static void mt753x_phylink_mac_link_up(s @@ -2980,61 +2937,6 @@ static void mt753x_phylink_mac_link_up(s
mt7530_set(priv, MT7530_PMCR_P(port), mcr); mt7530_set(priv, MT7530_PMCR_P(port), mcr);
} }
@ -246,7 +246,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config) struct phylink_config *config)
{ {
@@ -3132,7 +3034,6 @@ const struct mt753x_info mt753x_table[] @@ -3293,7 +3195,6 @@ const struct mt753x_info mt753x_table[]
.phy_write_c22 = mt7531_ind_c22_phy_write, .phy_write_c22 = mt7531_ind_c22_phy_write,
.phy_read_c45 = mt7531_ind_c45_phy_read, .phy_read_c45 = mt7531_ind_c45_phy_read,
.phy_write_c45 = mt7531_ind_c45_phy_write, .phy_write_c45 = mt7531_ind_c45_phy_write,
@ -254,7 +254,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
.mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_config = mt7531_mac_config, .mac_port_config = mt7531_mac_config,
}, },
@@ -3144,7 +3045,6 @@ const struct mt753x_info mt753x_table[] @@ -3305,7 +3206,6 @@ const struct mt753x_info mt753x_table[]
.phy_write_c22 = mt7531_ind_c22_phy_write, .phy_write_c22 = mt7531_ind_c22_phy_write,
.phy_read_c45 = mt7531_ind_c45_phy_read, .phy_read_c45 = mt7531_ind_c45_phy_read,
.phy_write_c45 = mt7531_ind_c45_phy_write, .phy_write_c45 = mt7531_ind_c45_phy_write,
@ -264,7 +264,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
}; };
--- a/drivers/net/dsa/mt7530.h --- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h
@@ -331,13 +331,6 @@ enum mt7530_vlan_port_acc_frm { @@ -336,13 +336,6 @@ enum mt7530_vlan_port_acc_frm {
PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
PMCR_FORCE_FDX | PMCR_FORCE_LNK | \ PMCR_FORCE_FDX | PMCR_FORCE_LNK | \
PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100) PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100)
@ -278,7 +278,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100) #define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
#define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24) #define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24)
@@ -744,7 +737,6 @@ struct mt753x_info { @@ -749,7 +742,6 @@ struct mt753x_info {
int regnum); int regnum);
int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad,
int regnum, u16 val); int regnum, u16 val);
@ -286,7 +286,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
void (*mac_port_get_caps)(struct dsa_switch *ds, int port, void (*mac_port_get_caps)(struct dsa_switch *ds, int port,
struct phylink_config *config); struct phylink_config *config);
void (*mac_port_validate)(struct dsa_switch *ds, int port, void (*mac_port_validate)(struct dsa_switch *ds, int port,
@@ -770,7 +762,6 @@ struct mt753x_info { @@ -775,7 +767,6 @@ struct mt753x_info {
* @ports: Holding the state among ports * @ports: Holding the state among ports
* @reg_mutex: The lock for protecting among process accessing * @reg_mutex: The lock for protecting among process accessing
* registers * registers
@ -294,7 +294,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* @p5_intf_sel: Holding the current port 5 interface select * @p5_intf_sel: Holding the current port 5 interface select
* @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch
* has got SGMII * has got SGMII
@@ -792,8 +783,6 @@ struct mt7530_priv { @@ -797,8 +788,6 @@ struct mt7530_priv {
const struct mt753x_info *info; const struct mt753x_info *info;
unsigned int id; unsigned int id;
bool mcm; bool mcm;

4
target/linux/generic/backport-6.6/790-24-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch
View File

@ -18,7 +18,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2670,16 +2670,6 @@ mt7531_mac_config(struct dsa_switch *ds, @@ -2831,16 +2831,6 @@ mt7531_mac_config(struct dsa_switch *ds,
} }
} }
@ -35,7 +35,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
static struct phylink_pcs * static struct phylink_pcs *
mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port, mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port,
phy_interface_t interface) phy_interface_t interface)
@@ -2705,8 +2695,8 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2866,8 +2856,8 @@ mt753x_phylink_mac_config(struct dsa_swi
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new; u32 mcr_cur, mcr_new;

4
target/linux/generic/backport-6.6/790-25-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch
View File

@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2848,17 +2848,9 @@ static int @@ -3009,17 +3009,9 @@ static int
mt753x_setup(struct dsa_switch *ds) mt753x_setup(struct dsa_switch *ds)
{ {
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
@ -40,7 +40,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
if (ret) if (ret)
return ret; return ret;
@@ -2870,6 +2862,14 @@ mt753x_setup(struct dsa_switch *ds) @@ -3031,6 +3023,14 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq) if (ret && priv->irq)
mt7530_free_irq_common(priv); mt7530_free_irq_common(priv);

8
target/linux/generic/backport-6.6/790-26-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -1054,7 +1054,6 @@ mt7530_port_enable(struct dsa_switch *ds @@ -1215,7 +1215,6 @@ mt7530_port_enable(struct dsa_switch *ds
priv->ports[port].enable = true; priv->ports[port].enable = true;
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
priv->ports[port].pm); priv->ports[port].pm);
@ -32,7 +32,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mutex_unlock(&priv->reg_mutex); mutex_unlock(&priv->reg_mutex);
@@ -1074,7 +1073,6 @@ mt7530_port_disable(struct dsa_switch *d @@ -1235,7 +1234,6 @@ mt7530_port_disable(struct dsa_switch *d
priv->ports[port].enable = false; priv->ports[port].enable = false;
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
PCR_MATRIX_CLR); PCR_MATRIX_CLR);
@ -40,7 +40,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
mutex_unlock(&priv->reg_mutex); mutex_unlock(&priv->reg_mutex);
} }
@@ -2293,6 +2291,12 @@ mt7530_setup(struct dsa_switch *ds) @@ -2454,6 +2452,12 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_mib_reset(ds); mt7530_mib_reset(ds);
for (i = 0; i < MT7530_NUM_PORTS; i++) { for (i = 0; i < MT7530_NUM_PORTS; i++) {
@ -53,7 +53,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
/* Disable forwarding by default on all ports */ /* Disable forwarding by default on all ports */
mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
PCR_MATRIX_CLR); PCR_MATRIX_CLR);
@@ -2395,6 +2399,12 @@ mt7531_setup_common(struct dsa_switch *d @@ -2556,6 +2560,12 @@ mt7531_setup_common(struct dsa_switch *d
UNU_FFP_MASK); UNU_FFP_MASK);
for (i = 0; i < MT7530_NUM_PORTS; i++) { for (i = 0; i < MT7530_NUM_PORTS; i++) {

4
target/linux/generic/backport-6.6/790-27-v6.9-net-dsa-mt7530-simplify-link-operations.patch
View File

@ -45,7 +45,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2703,23 +2703,13 @@ mt753x_phylink_mac_config(struct dsa_swi @@ -2864,23 +2864,13 @@ mt753x_phylink_mac_config(struct dsa_swi
const struct phylink_link_state *state) const struct phylink_link_state *state)
{ {
struct mt7530_priv *priv = ds->priv; struct mt7530_priv *priv = ds->priv;
@ -72,7 +72,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port, static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port,
--- a/drivers/net/dsa/mt7530.h --- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h
@@ -324,8 +324,6 @@ enum mt7530_vlan_port_acc_frm { @@ -329,8 +329,6 @@ enum mt7530_vlan_port_acc_frm {
MT7531_FORCE_DPX | \ MT7531_FORCE_DPX | \
MT7531_FORCE_RX_FC | \ MT7531_FORCE_RX_FC | \
MT7531_FORCE_TX_FC) MT7531_FORCE_TX_FC)

2
target/linux/generic/backport-6.6/790-28-v6.9-net-dsa-mt7530-disable-LEDs-before-reset.patch
View File

@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2228,6 +2228,12 @@ mt7530_setup(struct dsa_switch *ds) @@ -2389,6 +2389,12 @@ mt7530_setup(struct dsa_switch *ds)
} }
} }

4
target/linux/generic/backport-6.6/790-29-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch
View File

@ -53,7 +53,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2274,8 +2274,6 @@ mt7530_setup(struct dsa_switch *ds) @@ -2435,8 +2435,6 @@ mt7530_setup(struct dsa_switch *ds)
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
SYS_CTRL_REG_RST); SYS_CTRL_REG_RST);
@ -62,7 +62,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
/* Lower Tx driving for TRGMII path */ /* Lower Tx driving for TRGMII path */
for (i = 0; i < NUM_TRGMII_CTRL; i++) for (i = 0; i < NUM_TRGMII_CTRL; i++)
mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), mt7530_write(priv, MT7530_TRGMII_TD_ODT(i),
@@ -2291,6 +2289,9 @@ mt7530_setup(struct dsa_switch *ds) @@ -2452,6 +2450,9 @@ mt7530_setup(struct dsa_switch *ds)
val |= MHWTRAP_MANUAL; val |= MHWTRAP_MANUAL;
mt7530_write(priv, MT7530_MHWTRAP, val); mt7530_write(priv, MT7530_MHWTRAP, val);

2
target/linux/generic/backport-6.6/790-30-v6.9-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch
View File

@ -139,7 +139,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2228,12 +2228,6 @@ mt7530_setup(struct dsa_switch *ds) @@ -2389,12 +2389,6 @@ mt7530_setup(struct dsa_switch *ds)
} }
} }

2
target/linux/generic/pending-6.6/610-netfilter_match_bypass_default_checks.patch
View File

@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
for (i = sizeof(struct ipt_entry); for (i = sizeof(struct ipt_entry);
i < e->target_offset; i < e->target_offset;
i += m->u.match_size) { i += m->u.match_size) {
@@ -1223,12 +1260,15 @@ compat_copy_entry_to_user(struct ipt_ent @@ -1225,12 +1262,15 @@ compat_copy_entry_to_user(struct ipt_ent
compat_uint_t origsize; compat_uint_t origsize;
const struct xt_entry_match *ematch; const struct xt_entry_match *ematch;
int ret = 0; int ret = 0;

4
target/linux/generic/pending-6.6/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch
View File

@ -49,7 +49,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
--- a/drivers/net/dsa/mt7530.c --- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c
@@ -2505,18 +2505,25 @@ mt7531_setup(struct dsa_switch *ds) @@ -2666,18 +2666,25 @@ mt7531_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
MT7531_GPIO0_INTERRUPT); MT7531_GPIO0_INTERRUPT);
@ -82,7 +82,7 @@ Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
/* Setup VLAN ID 0 for VLAN-unaware bridges */ /* Setup VLAN ID 0 for VLAN-unaware bridges */
--- a/drivers/net/dsa/mt7530.h --- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h
@@ -616,6 +616,7 @@ enum mt7531_clk_skew { @@ -621,6 +621,7 @@ enum mt7531_clk_skew {
#define RG_SYSPLL_DDSFBK_EN BIT(12) #define RG_SYSPLL_DDSFBK_EN BIT(12)
#define RG_SYSPLL_BIAS_EN BIT(11) #define RG_SYSPLL_BIAS_EN BIT(11)
#define RG_SYSPLL_BIAS_LPF_EN BIT(10) #define RG_SYSPLL_BIAS_LPF_EN BIT(10)

483
target/linux/generic/pending-6.6/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch
View File

@ -1,483 +0,0 @@
From b7427d66cb3d6dca5165de5f7d80d59f08c2795b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
Date: Tue, 9 Apr 2024 18:01:14 +0300
Subject: [PATCH 2/2] net: dsa: mt7530: trap link-local frames regardless of ST
Port State
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer
(DLL) of the Open Systems Interconnection basic reference model (OSI/RM)
are described; the medium access control (MAC) and logical link control
(LLC) sublayers. The MAC sublayer is the one facing the physical layer.
In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A
Bridge component comprises a MAC Relay Entity for interconnecting the Ports
of the Bridge, at least two Ports, and higher layer entities with at least
a Spanning Tree Protocol Entity included.
Each Bridge Port also functions as an end station and shall provide the MAC
Service to an LLC Entity. Each instance of the MAC Service is provided to a
distinct LLC Entity that supports protocol identification, multiplexing,
and demultiplexing, for protocol data unit (PDU) transmission and reception
by one or more higher layer entities.
It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC
Entity associated with each Bridge Port is modeled as being directly
connected to the attached Local Area Network (LAN).
On the switch with CPU port architecture, CPU port functions as Management
Port, and the Management Port functionality is provided by software which
functions as an end station. Software is connected to an IEEE 802 LAN that
is wholly contained within the system that incorporates the Bridge.
Software provides access to the LLC Entity associated with each Bridge Port
by the value of the source port field on the special tag on the frame
received by software.
We call frames that carry control information to determine the active
topology and current extent of each Virtual Local Area Network (VLAN),
i.e., spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN
Registration Protocol Data Units (MVRPDUs), and frames from other link
constrained protocols, such as Extensible Authentication Protocol over LAN
(EAPOL) and Link Layer Discovery Protocol (LLDP), link-local frames. They
are not forwarded by a Bridge. Permanently configured entries in the
filtering database (FDB) ensure that such frames are discarded by the
Forwarding Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in
detail:
Each of the reserved MAC addresses specified in Table 8-1
(01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be
permanently configured in the FDB in C-VLAN components and ERs.
Each of the reserved MAC addresses specified in Table 8-2
(01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently
configured in the FDB in S-VLAN components.
Each of the reserved MAC addresses specified in Table 8-3
(01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB
in TPMR components.
The FDB entries for reserved MAC addresses shall specify filtering for all
Bridge Ports and all VIDs. Management shall not provide the capability to
modify or remove entries for reserved MAC addresses.
The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of
propagation of PDUs within a Bridged Network, as follows:
The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that
no conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN)
component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward.
PDUs transmitted using this destination address, or any other addresses
that appear in Table 8-1, Table 8-2, and Table 8-3
(01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can
therefore travel no further than those stations that can be reached via a
single individual LAN from the originating station.
The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an
address that no conformant S-VLAN component, C-VLAN component, or MAC
Bridge can forward; however, this address is relayed by a TPMR component.
PDUs using this destination address, or any of the other addresses that
appear in both Table 8-1 and Table 8-2 but not in Table 8-3
(01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed
by any TPMRs but will propagate no further than the nearest S-VLAN
component, C-VLAN component, or MAC Bridge.
The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an
address that no conformant C-VLAN component, MAC Bridge can forward;
however, it is relayed by TPMR components and S-VLAN components. PDUs
using this destination address, or any of the other addresses that appear
in Table 8-1 but not in either Table 8-2 or Table 8-3
(01-80-C2-00-00-[00,0B,0C,0D,0F]), will be relayed by TPMR components and
S-VLAN components but will propagate no further than the nearest C-VLAN
component or MAC Bridge.
Because the LLC Entity associated with each Bridge Port is provided via CPU
port, we must not filter these frames but forward them to CPU port.
In a Bridge, the transmission Port is majorly decided by ingress and egress
rules, FDB, and spanning tree Port State functions of the Forwarding
Process. For link-local frames, only CPU port should be designated as
destination port in the FDB, and the other functions of the Forwarding
Process must not interfere with the decision of the transmission Port. We
call this process trapping frames to CPU port.
Therefore, on the switch with CPU port architecture, link-local frames must
be trapped to CPU port, and certain link-local frames received by a Port of
a Bridge comprising a TPMR component or an S-VLAN component must be
excluded from it.
A Bridge of the switch with CPU port architecture cannot comprise a
Two-Port MAC Relay (TPMR) component as a TPMR component supports only a
subset of the functionality of a MAC Bridge. A Bridge comprising two Ports
(Management Port doesn't count) of this architecture will either function
as a standard MAC Bridge or a standard VLAN Bridge.
Therefore, a Bridge of this architecture can only comprise S-VLAN
components, C-VLAN components, or MAC Bridge components. Since there's no
TPMR component, we don't need to relay PDUs using the destination addresses
specified on the Nearest non-TPMR section, and the proportion of the
Nearest Customer Bridge section where they must be relayed by TPMR
components.
One option to trap link-local frames to CPU port is to add static FDB
entries with CPU port designated as destination port. However, because that
Independent VLAN Learning (IVL) is being used on every VID, each entry only
applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC
Bridge component or a C-VLAN component, there would have to be 16 times
4096 entries. This switch intellectual property can only hold a maximum of
2048 entries. Using this option, there also isn't a mechanism to prevent
link-local frames from being discarded when the spanning tree Port State of
the reception Port is discarding.
The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4
registers. Whilst this applies to every VID, it doesn't contain all of the
reserved MAC addresses without affecting the remaining Standard Group MAC
Addresses. The REV_UN frame tag utilised using the RGAC4 register covers
the remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination
addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF
destination addresses which may be relayed by MAC Bridges or VLAN Bridges.
The latter option provides better but not complete conformance.
This switch intellectual property also does not provide a mechanism to trap
link-local frames with specific destination addresses to CPU port by
Bridge, to conform to the filtering rules for the distinct Bridge
components.
Therefore, regardless of the type of the Bridge component, link-local
frames with these destination addresses will be trapped to CPU port:
01-80-C2-00-00-[00,01,02,03,0E]
In a Bridge comprising a MAC Bridge component or a C-VLAN component:
Link-local frames with these destination addresses won't be trapped to
CPU port which won't conform to IEEE Std 802.1Q-2022:
01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F]
In a Bridge comprising an S-VLAN component:
Link-local frames with these destination addresses will be trapped to CPU
port which won't conform to IEEE Std 802.1Q-2022:
01-80-C2-00-00-00
Link-local frames with these destination addresses won't be trapped to
CPU port which won't conform to IEEE Std 802.1Q-2022:
01-80-C2-00-00-[04,05,06,07,08,09,0A]
Currently on this switch intellectual property, if the spanning tree Port
State of the reception Port is discarding, link-local frames will be
discarded.
To trap link-local frames regardless of the spanning tree Port State, make
the switch regard them as Bridge Protocol Data Units (BPDUs). This switch
intellectual property only lets the frames regarded as BPDUs bypass the
spanning tree Port State function of the Forwarding Process.
With this change, the only remaining interference is the ingress rules.
When the reception Port has no PVID assigned on software, VLAN-untagged
frames won't be allowed in. There doesn't seem to be a mechanism on the
switch intellectual property to have link-local frames bypass this function
of the Forwarding Process.
Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
drivers/net/dsa/mt7530.c | 229 +++++++++++++++++++++++++++++++++------
drivers/net/dsa/mt7530.h | 5 +
2 files changed, 200 insertions(+), 34 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -950,20 +950,173 @@ static void mt7530_setup_port5(struct ds
mutex_unlock(&priv->reg_mutex);
}
-/* On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE Std
- * 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC DA
- * must only be propagated to C-VLAN and MAC Bridge components. That means
- * VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports,
- * these frames are supposed to be processed by the CPU (software). So we make
- * the switch only forward them to the CPU port. And if received from a CPU
- * port, forward to a single port. The software is responsible of making the
- * switch conform to the latter by setting a single port as destination port on
- * the special tag.
- *
- * This switch intellectual property cannot conform to this part of the standard
- * fully. Whilst the REV_UN frame tag covers the remaining :04-0D and :0F MAC
- * DAs, it also includes :22-FF which the scope of propagation is not supposed
- * to be restricted for these MAC DAs.
+/* In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer (DLL)
+ * of the Open Systems Interconnection basic reference model (OSI/RM) are
+ * described; the medium access control (MAC) and logical link control (LLC)
+ * sublayers. The MAC sublayer is the one facing the physical layer.
+ *
+ * In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A
+ * Bridge component comprises a MAC Relay Entity for interconnecting the Ports
+ * of the Bridge, at least two Ports, and higher layer entities with at least a
+ * Spanning Tree Protocol Entity included.
+ *
+ * Each Bridge Port also functions as an end station and shall provide the MAC
+ * Service to an LLC Entity. Each instance of the MAC Service is provided to a
+ * distinct LLC Entity that supports protocol identification, multiplexing, and
+ * demultiplexing, for protocol data unit (PDU) transmission and reception by
+ * one or more higher layer entities.
+ *
+ * It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC
+ * Entity associated with each Bridge Port is modeled as being directly
+ * connected to the attached Local Area Network (LAN).
+ *
+ * On the switch with CPU port architecture, CPU port functions as Management
+ * Port, and the Management Port functionality is provided by software which
+ * functions as an end station. Software is connected to an IEEE 802 LAN that is
+ * wholly contained within the system that incorporates the Bridge. Software
+ * provides access to the LLC Entity associated with each Bridge Port by the
+ * value of the source port field on the special tag on the frame received by
+ * software.
+ *
+ * We call frames that carry control information to determine the active
+ * topology and current extent of each Virtual Local Area Network (VLAN), i.e.,
+ * spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN Registration
+ * Protocol Data Units (MVRPDUs), and frames from other link constrained
+ * protocols, such as Extensible Authentication Protocol over LAN (EAPOL) and
+ * Link Layer Discovery Protocol (LLDP), link-local frames. They are not
+ * forwarded by a Bridge. Permanently configured entries in the filtering
+ * database (FDB) ensure that such frames are discarded by the Forwarding
+ * Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in detail:
+ *
+ * Each of the reserved MAC addresses specified in Table 8-1
+ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be
+ * permanently configured in the FDB in C-VLAN components and ERs.
+ *
+ * Each of the reserved MAC addresses specified in Table 8-2
+ * (01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently
+ * configured in the FDB in S-VLAN components.
+ *
+ * Each of the reserved MAC addresses specified in Table 8-3
+ * (01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB in
+ * TPMR components.
+ *
+ * The FDB entries for reserved MAC addresses shall specify filtering for all
+ * Bridge Ports and all VIDs. Management shall not provide the capability to
+ * modify or remove entries for reserved MAC addresses.
+ *
+ * The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of
+ * propagation of PDUs within a Bridged Network, as follows:
+ *
+ * The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that no
+ * conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN)
+ * component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward.
+ * PDUs transmitted using this destination address, or any other addresses
+ * that appear in Table 8-1, Table 8-2, and Table 8-3
+ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can
+ * therefore travel no further than those stations that can be reached via a
+ * single individual LAN from the originating station.
+ *
+ * The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an
+ * address that no conformant S-VLAN component, C-VLAN component, or MAC
+ * Bridge can forward; however, this address is relayed by a TPMR component.
+ * PDUs using this destination address, or any of the other addresses that
+ * appear in both Table 8-1 and Table 8-2 but not in Table 8-3
+ * (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed by
+ * any TPMRs but will propagate no further than the nearest S-VLAN component,
+ * C-VLAN component, or MAC Bridge.
+ *
+ * The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an address
+ * that no conformant C-VLAN component, MAC Bridge can forward; however, it is
+ * relayed by TPMR components and S-VLAN components. PDUs using this
+ * destination address, or any of the other addresses that appear in Table 8-1
+ * but not in either Table 8-2 or Table 8-3 (01-80-C2-00-00-[00,0B,0C,0D,0F]),
+ * will be relayed by TPMR components and S-VLAN components but will propagate
+ * no further than the nearest C-VLAN component or MAC Bridge.
+ *
+ * Because the LLC Entity associated with each Bridge Port is provided via CPU
+ * port, we must not filter these frames but forward them to CPU port.
+ *
+ * In a Bridge, the transmission Port is majorly decided by ingress and egress
+ * rules, FDB, and spanning tree Port State functions of the Forwarding Process.
+ * For link-local frames, only CPU port should be designated as destination port
+ * in the FDB, and the other functions of the Forwarding Process must not
+ * interfere with the decision of the transmission Port. We call this process
+ * trapping frames to CPU port.
+ *
+ * Therefore, on the switch with CPU port architecture, link-local frames must
+ * be trapped to CPU port, and certain link-local frames received by a Port of a
+ * Bridge comprising a TPMR component or an S-VLAN component must be excluded
+ * from it.
+ *
+ * A Bridge of the switch with CPU port architecture cannot comprise a Two-Port
+ * MAC Relay (TPMR) component as a TPMR component supports only a subset of the
+ * functionality of a MAC Bridge. A Bridge comprising two Ports (Management Port
+ * doesn't count) of this architecture will either function as a standard MAC
+ * Bridge or a standard VLAN Bridge.
+ *
+ * Therefore, a Bridge of this architecture can only comprise S-VLAN components,
+ * C-VLAN components, or MAC Bridge components. Since there's no TPMR component,
+ * we don't need to relay PDUs using the destination addresses specified on the
+ * Nearest non-TPMR section, and the proportion of the Nearest Customer Bridge
+ * section where they must be relayed by TPMR components.
+ *
+ * One option to trap link-local frames to CPU port is to add static FDB entries
+ * with CPU port designated as destination port. However, because that
+ * Independent VLAN Learning (IVL) is being used on every VID, each entry only
+ * applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC
+ * Bridge component or a C-VLAN component, there would have to be 16 times 4096
+ * entries. This switch intellectual property can only hold a maximum of 2048
+ * entries. Using this option, there also isn't a mechanism to prevent
+ * link-local frames from being discarded when the spanning tree Port State of
+ * the reception Port is discarding.
+ *
+ * The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4
+ * registers. Whilst this applies to every VID, it doesn't contain all of the
+ * reserved MAC addresses without affecting the remaining Standard Group MAC
+ * Addresses. The REV_UN frame tag utilised using the RGAC4 register covers the
+ * remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination
+ * addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF
+ * destination addresses which may be relayed by MAC Bridges or VLAN Bridges.
+ * The latter option provides better but not complete conformance.
+ *
+ * This switch intellectual property also does not provide a mechanism to trap
+ * link-local frames with specific destination addresses to CPU port by Bridge,
+ * to conform to the filtering rules for the distinct Bridge components.
+ *
+ * Therefore, regardless of the type of the Bridge component, link-local frames
+ * with these destination addresses will be trapped to CPU port:
+ *
+ * 01-80-C2-00-00-[00,01,02,03,0E]
+ *
+ * In a Bridge comprising a MAC Bridge component or a C-VLAN component:
+ *
+ * Link-local frames with these destination addresses won't be trapped to CPU
+ * port which won't conform to IEEE Std 802.1Q-2022:
+ *
+ * 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F]
+ *
+ * In a Bridge comprising an S-VLAN component:
+ *
+ * Link-local frames with these destination addresses will be trapped to CPU
+ * port which won't conform to IEEE Std 802.1Q-2022:
+ *
+ * 01-80-C2-00-00-00
+ *
+ * Link-local frames with these destination addresses won't be trapped to CPU
+ * port which won't conform to IEEE Std 802.1Q-2022:
+ *
+ * 01-80-C2-00-00-[04,05,06,07,08,09,0A]
+ *
+ * To trap link-local frames to CPU port as conformant as this switch
+ * intellectual property can allow, link-local frames are made to be regarded as
+ * Bridge Protocol Data Units (BPDUs). This is because this switch intellectual
+ * property only lets the frames regarded as BPDUs bypass the spanning tree Port
+ * State function of the Forwarding Process.
+ *
+ * The only remaining interference is the ingress rules. When the reception Port
+ * has no PVID assigned on software, VLAN-untagged frames won't be allowed in.
+ * There doesn't seem to be a mechanism on the switch intellectual property to
+ * have link-local frames bypass this function of the Forwarding Process.
*/
static void
mt753x_trap_frames(struct mt7530_priv *priv)
@@ -971,35 +1124,43 @@ mt753x_trap_frames(struct mt7530_priv *p
/* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them
* VLAN-untagged.
*/
- mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK |
- MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK |
- MT753X_BPDU_PORT_FW_MASK,
- MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) |
- MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
+ mt7530_rmw(priv, MT753X_BPC,
+ MT753X_PAE_BPDU_FR | MT753X_PAE_EG_TAG_MASK |
+ MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK |
+ MT753X_BPDU_PORT_FW_MASK,
+ MT753X_PAE_BPDU_FR |
+ MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) |
+ MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_BPDU_CPU_ONLY);
/* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress
* them VLAN-untagged.
*/
- mt7530_rmw(priv, MT753X_RGAC1, MT753X_R02_EG_TAG_MASK |
- MT753X_R02_PORT_FW_MASK | MT753X_R01_EG_TAG_MASK |
- MT753X_R01_PORT_FW_MASK,
- MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) |
- MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
+ mt7530_rmw(priv, MT753X_RGAC1,
+ MT753X_R02_BPDU_FR | MT753X_R02_EG_TAG_MASK |
+ MT753X_R02_PORT_FW_MASK | MT753X_R01_BPDU_FR |
+ MT753X_R01_EG_TAG_MASK | MT753X_R01_PORT_FW_MASK,
+ MT753X_R02_BPDU_FR |
+ MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) |
+ MT753X_R01_BPDU_FR |
+ MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_BPDU_CPU_ONLY);
/* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress
* them VLAN-untagged.
*/
- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK |
- MT753X_R0E_PORT_FW_MASK | MT753X_R03_EG_TAG_MASK |
- MT753X_R03_PORT_FW_MASK,
- MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) |
- MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
- MT753X_BPDU_CPU_ONLY);
+ mt7530_rmw(priv, MT753X_RGAC2,
+ MT753X_R0E_BPDU_FR | MT753X_R0E_EG_TAG_MASK |
+ MT753X_R0E_PORT_FW_MASK | MT753X_R03_BPDU_FR |
+ MT753X_R03_EG_TAG_MASK | MT753X_R03_PORT_FW_MASK,
+ MT753X_R0E_BPDU_FR |
+ MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) |
+ MT753X_R03_BPDU_FR |
+ MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
+ MT753X_BPDU_CPU_ONLY);
}
static void
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -65,6 +65,7 @@ enum mt753x_id {
/* Registers for BPDU and PAE frame control*/
#define MT753X_BPC 0x24
+#define MT753X_PAE_BPDU_FR BIT(25)
#define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22)
#define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x)
#define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16)
@@ -75,20 +76,24 @@ enum mt753x_id {
/* Register for :01 and :02 MAC DA frame control */
#define MT753X_RGAC1 0x28
+#define MT753X_R02_BPDU_FR BIT(25)
#define MT753X_R02_EG_TAG_MASK GENMASK(24, 22)
#define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x)
#define MT753X_R02_PORT_FW_MASK GENMASK(18, 16)
#define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x)
+#define MT753X_R01_BPDU_FR BIT(9)
#define MT753X_R01_EG_TAG_MASK GENMASK(8, 6)
#define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x)
#define MT753X_R01_PORT_FW_MASK GENMASK(2, 0)
/* Register for :03 and :0E MAC DA frame control */
#define MT753X_RGAC2 0x2c
+#define MT753X_R0E_BPDU_FR BIT(25)
#define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22)
#define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x)
#define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16)
#define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x)
+#define MT753X_R03_BPDU_FR BIT(9)
#define MT753X_R03_EG_TAG_MASK GENMASK(8, 6)
#define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x)
#define MT753X_R03_PORT_FW_MASK GENMASK(2, 0)