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68 lines
1.7 KiB
Diff
68 lines
1.7 KiB
Diff
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From 9fec662b54fc956b776df15c704e996c61292850 Mon Sep 17 00:00:00 2001
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From: Alexander Couzens <lynxis@fe80.eu>
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Date: Sat, 13 Aug 2022 13:05:09 +0200
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Subject: [PATCH 02/10] net: mt7531: only do PLL once after the reset
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Move the PLL init of the switch out of the pad configuration of the port
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6 (usally cpu port).
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Fix a unidirectional 100 mbit limitation on 1 gbit or 2.5 gbit links for
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outbound traffic on port 5 or port 6.
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Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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---
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drivers/net/dsa/mt7530.c | 15 +++++++++------
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1 file changed, 9 insertions(+), 6 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -506,14 +506,19 @@ static bool mt7531_dual_sgmii_supported(
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static int
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mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
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{
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- struct mt7530_priv *priv = ds->priv;
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+ return 0;
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+}
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+
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+static void
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+mt7531_pll_setup(struct mt7530_priv *priv)
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+{
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u32 top_sig;
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u32 hwstrap;
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u32 xtal;
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u32 val;
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if (mt7531_dual_sgmii_supported(priv))
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- return 0;
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+ return;
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val = mt7530_read(priv, MT7531_CREV);
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top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
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@@ -592,8 +597,6 @@ mt7531_pad_setup(struct dsa_switch *ds,
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val |= EN_COREPLL;
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mt7530_write(priv, MT7531_PLLGP_EN, val);
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usleep_range(25, 35);
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-
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- return 0;
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}
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static void
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@@ -2326,6 +2329,8 @@ mt7531_setup(struct dsa_switch *ds)
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SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
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SYS_CTRL_REG_RST);
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+ mt7531_pll_setup(priv);
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+
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if (mt7531_dual_sgmii_supported(priv)) {
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priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII;
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@@ -2882,8 +2887,6 @@ mt7531_cpu_port_config(struct dsa_switch
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case 6:
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interface = PHY_INTERFACE_MODE_2500BASEX;
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- mt7531_pad_setup(ds, interface);
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-
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priv->p6_interface = interface;
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break;
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default:
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