mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 09:39:00 +00:00
69 lines
2.2 KiB
Diff
69 lines
2.2 KiB
Diff
|
From 932dac0380bbf7276d4111c35674679bc9ad6384 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Vabhav Sharma <vabhav.sharma@nxp.com>
|
||
|
|
Date: Thu, 31 Oct 2019 19:20:47 +0530
|
||
|
|
Subject: [PATCH] tty: serial: lpuart: add LS1028A support
|
||
|
|
|
||
|
|
NXP LS1028A lpuart is the same IP as LS1021A, but it is
|
||
|
|
little endian for register accessing instead of big endian
|
||
|
|
on LS1021A.
|
||
|
|
|
||
|
|
So add LS1028A matching data to distiguish the chips.
|
||
|
|
|
||
|
|
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
|
||
|
|
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
|
||
|
|
Acked-by: Fugang Duan <fugang.duan@nxp.com>
|
||
|
|
---
|
||
|
|
drivers/tty/serial/fsl_lpuart.c | 14 ++++++++++++--
|
||
|
|
1 file changed, 12 insertions(+), 2 deletions(-)
|
||
|
|
|
||
|
|
--- a/drivers/tty/serial/fsl_lpuart.c
|
||
|
|
+++ b/drivers/tty/serial/fsl_lpuart.c
|
||
|
|
@@ -3,6 +3,7 @@
|
||
|
|
* Freescale lpuart serial port driver
|
||
|
|
*
|
||
|
|
* Copyright 2012-2014 Freescale Semiconductor, Inc.
|
||
|
|
+ * Copyright 2019 NXP
|
||
|
|
*/
|
||
|
|
|
||
|
|
#if defined(CONFIG_SERIAL_FSL_LPUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
|
||
|
|
@@ -260,6 +261,7 @@ static DEFINE_IDA(fsl_lpuart_ida);
|
||
|
|
enum lpuart_type {
|
||
|
|
VF610_LPUART,
|
||
|
|
LS1021A_LPUART,
|
||
|
|
+ LS1028A_LPUART,
|
||
|
|
IMX7ULP_LPUART,
|
||
|
|
IMX8QXP_LPUART,
|
||
|
|
};
|
||
|
|
@@ -311,13 +313,20 @@ static const struct lpuart_soc_data vf_d
|
||
|
|
.rx_dma_cyclic = true,
|
||
|
|
};
|
||
|
|
|
||
|
|
-static const struct lpuart_soc_data ls_data = {
|
||
|
|
+static const struct lpuart_soc_data ls1021a_data = {
|
||
|
|
.devtype = LS1021A_LPUART,
|
||
|
|
.iotype = UPIO_MEM32BE,
|
||
|
|
.rx_watermark = 0,
|
||
|
|
.rx_dma_cyclic = true,
|
||
|
|
};
|
||
|
|
|
||
|
|
+static const struct lpuart_soc_data ls1028a_data = {
|
||
|
|
+ .devtype = LS1028A_LPUART,
|
||
|
|
+ .iotype = UPIO_MEM32,
|
||
|
|
+ .rx_watermark = 0,
|
||
|
|
+ .rx_dma_cyclic = true,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
static struct lpuart_soc_data imx7ulp_data = {
|
||
|
|
.devtype = IMX7ULP_LPUART,
|
||
|
|
.iotype = UPIO_MEM32,
|
||
|
|
@@ -336,7 +345,8 @@ static struct lpuart_soc_data imx8qxp_da
|
||
|
|
|
||
|
|
static const struct of_device_id lpuart_dt_ids[] = {
|
||
|
|
{ .compatible = "fsl,vf610-lpuart", .data = &vf_data, },
|
||
|
|
- { .compatible = "fsl,ls1021a-lpuart", .data = &ls_data, },
|
||
|
|
+ { .compatible = "fsl,ls1021a-lpuart", .data = &ls1021a_data, },
|
||
|
|
+ { .compatible = "fsl,ls1028a-lpuart", .data = &ls1028a_data, },
|
||
|
|
{ .compatible = "fsl,imx7ulp-lpuart", .data = &imx7ulp_data, },
|
||
|
|
{ .compatible = "fsl,imx8qxp-lpuart", .data = &imx8qxp_data, },
|
||
|
|
{ /* sentinel */ }
|