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194 lines
4.7 KiB
Diff
194 lines
4.7 KiB
Diff
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From 510cd9e688453166b2bff3999ed21cac97385bb5 Mon Sep 17 00:00:00 2001
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From: Alexey Charkov <alchark@gmail.com>
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Date: Mon, 17 Jun 2024 22:28:51 +0400
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Subject: [PATCH] arm64: dts: rockchip: add thermal zones information on RK3588
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This includes the necessary device tree data to allow thermal
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monitoring on RK3588(s) using the on-chip TSADC device, along with
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trip points for automatic thermal management.
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Each of the CPU clusters (one for the little cores and two for
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the big cores) get a passive cooling trip point at 85C, which
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will trigger DVFS throttling of the respective cluster upon
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reaching a high temperature condition.
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All zones also have a critical trip point at 115C, which will
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trigger a reset.
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Signed-off-by: Alexey Charkov <alchark@gmail.com>
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Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-1-c1f5f3267f1e@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 153 ++++++++++++++++++
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1 file changed, 153 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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@@ -10,6 +10,7 @@
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#include <dt-bindings/reset/rockchip,rk3588-cru.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/ata/ahci.h>
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+#include <dt-bindings/thermal/thermal.h>
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/ {
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compatible = "rockchip,rk3588";
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@@ -2368,6 +2369,158 @@
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status = "disabled";
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};
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+ thermal_zones: thermal-zones {
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+ /* sensor near the center of the SoC */
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+ package_thermal: package-thermal {
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+ polling-delay-passive = <0>;
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+ polling-delay = <0>;
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+ thermal-sensors = <&tsadc 0>;
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+
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+ trips {
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+ package_crit: package-crit {
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+ temperature = <115000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ /* sensor between A76 cores 0 and 1 */
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+ bigcore0_thermal: bigcore0-thermal {
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+ polling-delay-passive = <100>;
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+ polling-delay = <0>;
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+ thermal-sensors = <&tsadc 1>;
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+
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+ trips {
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+ bigcore0_alert: bigcore0-alert {
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+ temperature = <85000>;
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+ hysteresis = <2000>;
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+ type = "passive";
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+ };
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+
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+ bigcore0_crit: bigcore0-crit {
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+ temperature = <115000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&bigcore0_alert>;
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+ cooling-device =
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+ <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ };
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+ };
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+
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+ /* sensor between A76 cores 2 and 3 */
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+ bigcore2_thermal: bigcore2-thermal {
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+ polling-delay-passive = <100>;
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+ polling-delay = <0>;
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+ thermal-sensors = <&tsadc 2>;
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+
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+ trips {
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+ bigcore2_alert: bigcore2-alert {
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+ temperature = <85000>;
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+ hysteresis = <2000>;
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+ type = "passive";
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+ };
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+
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+ bigcore2_crit: bigcore2-crit {
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+ temperature = <115000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&bigcore2_alert>;
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+ cooling-device =
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+ <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ };
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+ };
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+
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+ /* sensor between the four A55 cores */
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+ little_core_thermal: littlecore-thermal {
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+ polling-delay-passive = <100>;
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+ polling-delay = <0>;
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+ thermal-sensors = <&tsadc 3>;
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+
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+ trips {
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+ littlecore_alert: littlecore-alert {
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+ temperature = <85000>;
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+ hysteresis = <2000>;
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+ type = "passive";
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+ };
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+
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+ littlecore_crit: littlecore-crit {
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+ temperature = <115000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&littlecore_alert>;
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+ cooling-device =
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+ <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ };
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+ };
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+
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+ /* sensor near the PD_CENTER power domain */
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+ center_thermal: center-thermal {
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+ polling-delay-passive = <0>;
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+ polling-delay = <0>;
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+ thermal-sensors = <&tsadc 4>;
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+
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+ trips {
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+ center_crit: center-crit {
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+ temperature = <115000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ gpu_thermal: gpu-thermal {
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+ polling-delay-passive = <0>;
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+ polling-delay = <0>;
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+ thermal-sensors = <&tsadc 5>;
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+
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+ trips {
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+ gpu_crit: gpu-crit {
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+ temperature = <115000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ npu_thermal: npu-thermal {
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+ polling-delay-passive = <0>;
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+ polling-delay = <0>;
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+ thermal-sensors = <&tsadc 6>;
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+
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+ trips {
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+ npu_crit: npu-crit {
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+ temperature = <115000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+ };
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+
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tsadc: tsadc@fec00000 {
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compatible = "rockchip,rk3588-tsadc";
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reg = <0x0 0xfec00000 0x0 0x400>;
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