2021-03-01 00:02:09 +00:00
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From b3e8bd33b84a6b6c863bd1733bd15b5f1483b8ab Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Wed, 25 Nov 2020 17:06:55 +0100
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Subject: [PATCH 05/10] drivers: thermal: tsens: Fix bug in sensor enable for
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msm8960
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Device based on tsens VER_0 contains a hardware bug that results in some
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problem with sensor enablement. Sensor id 6-11 can't be enabled
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selectively and all of them must be enabled in one step.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
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---
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drivers/thermal/qcom/tsens-8960.c | 23 ++++++++++++++++++++---
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1 file changed, 20 insertions(+), 3 deletions(-)
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--- a/drivers/thermal/qcom/tsens-8960.c
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+++ b/drivers/thermal/qcom/tsens-8960.c
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@@ -27,9 +27,9 @@
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#define EN BIT(0)
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#define SW_RST BIT(1)
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#define SENSOR0_EN BIT(3)
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+#define MEASURE_PERIOD BIT(18)
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#define SLP_CLK_ENA BIT(26)
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#define SLP_CLK_ENA_8660 BIT(24)
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-#define MEASURE_PERIOD 1
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#define SENSOR0_SHIFT 3
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/* INT_STATUS_ADDR bitmasks */
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2021-05-07 18:32:18 +00:00
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@@ -126,17 +126,34 @@ static int resume_8960(struct tsens_priv
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2021-03-01 00:02:09 +00:00
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static int enable_8960(struct tsens_priv *priv, int id)
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{
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int ret;
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- u32 reg, mask;
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+ u32 reg, mask = BIT(id);
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ret = regmap_read(priv->tm_map, CNTL_ADDR, ®);
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if (ret)
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return ret;
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- mask = BIT(id + SENSOR0_SHIFT);
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+ /* HARDWARE BUG:
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+ * On platforms with more than 6 sensors, all remaining sensors
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+ * must be enabled together, otherwise undefined results are expected.
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+ * (Sensor 6-7 disabled, Sensor 3 disabled...) In the original driver,
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+ * all the sensors are enabled in one step hence this bug is not
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+ * triggered.
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+ */
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+ if (id > 5)
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+ mask = GENMASK(10, 6);
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+
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+ mask <<= SENSOR0_SHIFT;
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+
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+ /* Sensors already enabled. Skip. */
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+ if ((reg & mask) == mask)
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+ return 0;
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+
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ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST);
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if (ret)
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return ret;
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+ reg |= MEASURE_PERIOD;
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+
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if (priv->num_sensors > 1)
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reg |= mask | SLP_CLK_ENA | EN;
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else
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