2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_64BIT=y
|
2021-05-07 15:53:09 +00:00
|
|
|
# CONFIG_AHCI_MTK is not set
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
|
|
|
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
|
|
|
CONFIG_ARCH_MEDIATEK=y
|
|
|
|
CONFIG_ARCH_MMAP_RND_BITS=18
|
|
|
|
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
|
|
|
|
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
|
|
|
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
|
|
|
|
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
|
|
|
CONFIG_ARCH_PROC_KCORE_TEXT=y
|
|
|
|
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
|
|
|
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
|
|
|
|
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
2020-10-24 19:15:20 +00:00
|
|
|
CONFIG_ARCH_STACKWALK=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
|
|
|
CONFIG_ARM64=y
|
|
|
|
CONFIG_ARM64_4K_PAGES=y
|
2020-09-06 10:19:32 +00:00
|
|
|
# CONFIG_ARM64_CNP is not set
|
|
|
|
CONFIG_ARM64_ERRATUM_843419=y
|
|
|
|
CONFIG_ARM64_ERRATUM_845719=y
|
|
|
|
CONFIG_ARM64_MODULE_PLTS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_ARM64_PAGE_SHIFT=12
|
|
|
|
CONFIG_ARM64_PA_BITS=48
|
|
|
|
CONFIG_ARM64_PA_BITS_48=y
|
2020-09-06 10:19:32 +00:00
|
|
|
# CONFIG_ARM64_PTR_AUTH is not set
|
|
|
|
# CONFIG_ARM64_SVE is not set
|
2020-02-10 08:33:15 +00:00
|
|
|
# CONFIG_ARM64_SW_TTBR0_PAN is not set
|
|
|
|
CONFIG_ARM64_TAGGED_ADDR_ABI=y
|
|
|
|
CONFIG_ARM64_VA_BITS=39
|
|
|
|
CONFIG_ARM64_VA_BITS_39=y
|
|
|
|
# CONFIG_ARMV8_DEPRECATED is not set
|
|
|
|
CONFIG_ARM_AMBA=y
|
|
|
|
CONFIG_ARM_ARCH_TIMER=y
|
|
|
|
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
|
|
|
CONFIG_ARM_GIC=y
|
|
|
|
CONFIG_ARM_GIC_V2M=y
|
|
|
|
CONFIG_ARM_GIC_V3=y
|
|
|
|
CONFIG_ARM_GIC_V3_ITS=y
|
|
|
|
CONFIG_ARM_GIC_V3_ITS_PCI=y
|
|
|
|
CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
|
|
|
CONFIG_ARM_PMU=y
|
|
|
|
CONFIG_ARM_PSCI_FW=y
|
|
|
|
CONFIG_ATA=y
|
|
|
|
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
2021-02-24 19:10:36 +00:00
|
|
|
CONFIG_BLK_DEV_LOOP=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_BLK_DEV_SD=y
|
|
|
|
CONFIG_BLK_MQ_PCI=y
|
|
|
|
CONFIG_BLK_PM=y
|
|
|
|
CONFIG_BLK_SCSI_REQUEST=y
|
|
|
|
CONFIG_BLOCK_COMPAT=y
|
|
|
|
CONFIG_BSD_PROCESS_ACCT=y
|
|
|
|
CONFIG_BSD_PROCESS_ACCT_V3=y
|
|
|
|
CONFIG_CLKDEV_LOOKUP=y
|
|
|
|
CONFIG_CLKSRC_MMIO=y
|
|
|
|
CONFIG_CLONE_BACKWARDS=y
|
|
|
|
CONFIG_COMMON_CLK=y
|
|
|
|
CONFIG_COMMON_CLK_MEDIATEK=y
|
|
|
|
CONFIG_COMMON_CLK_MT2712=y
|
|
|
|
# CONFIG_COMMON_CLK_MT2712_BDPSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT2712_IMGSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT2712_JPGDECSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT2712_MFGCFG is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT2712_MMSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT2712_VDECSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT2712_VENCSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT6779 is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT6797 is not set
|
|
|
|
CONFIG_COMMON_CLK_MT7622=y
|
|
|
|
CONFIG_COMMON_CLK_MT7622_AUDSYS=y
|
|
|
|
CONFIG_COMMON_CLK_MT7622_ETHSYS=y
|
|
|
|
CONFIG_COMMON_CLK_MT7622_HIFSYS=y
|
|
|
|
# CONFIG_COMMON_CLK_MT8173 is not set
|
|
|
|
CONFIG_COMMON_CLK_MT8183=y
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_AUDIOSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_CAMSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_IMGSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_IPU_ADL is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_IPU_CONN is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_IPU_CORE0 is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_IPU_CORE1 is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_MFGCFG is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_MMSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_VDECSYS is not set
|
|
|
|
# CONFIG_COMMON_CLK_MT8183_VENCSYS is not set
|
|
|
|
CONFIG_COMMON_CLK_MT8516=y
|
|
|
|
# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
|
|
|
|
CONFIG_COMPAT=y
|
|
|
|
CONFIG_COMPAT_32BIT_TIME=y
|
|
|
|
CONFIG_COMPAT_BINFMT_ELF=y
|
2020-03-27 14:34:33 +00:00
|
|
|
CONFIG_COMPAT_NETLINK_MESSAGES=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_COMPAT_OLD_SIGACTION=y
|
2021-10-08 21:18:34 +00:00
|
|
|
CONFIG_CONFIGFS_FS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
|
|
|
|
# CONFIG_CPUFREQ_DT is not set
|
|
|
|
CONFIG_CPU_FREQ=y
|
|
|
|
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
|
|
|
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_COMMON=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
|
|
|
CONFIG_CPU_FREQ_STAT=y
|
|
|
|
CONFIG_CPU_RMAP=y
|
|
|
|
CONFIG_CPU_THERMAL=y
|
|
|
|
CONFIG_CRC16=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_CRYPTO_ACOMP2=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_CRYPTO_AEAD=y
|
|
|
|
CONFIG_CRYPTO_AEAD2=y
|
|
|
|
CONFIG_CRYPTO_CMAC=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_CRYPTO_CRC32=y
|
|
|
|
CONFIG_CRYPTO_CRC32C=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_CRYPTO_DEFLATE=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_CRYPTO_DRBG=y
|
|
|
|
CONFIG_CRYPTO_DRBG_HMAC=y
|
|
|
|
CONFIG_CRYPTO_DRBG_MENU=y
|
|
|
|
CONFIG_CRYPTO_ECB=y
|
|
|
|
CONFIG_CRYPTO_ECC=y
|
|
|
|
CONFIG_CRYPTO_ECDH=y
|
|
|
|
CONFIG_CRYPTO_HASH=y
|
|
|
|
CONFIG_CRYPTO_HASH2=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_CRYPTO_HASH_INFO=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_CRYPTO_HMAC=y
|
|
|
|
CONFIG_CRYPTO_JITTERENTROPY=y
|
|
|
|
CONFIG_CRYPTO_KPP=y
|
|
|
|
CONFIG_CRYPTO_KPP2=y
|
|
|
|
CONFIG_CRYPTO_LIB_SHA256=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_CRYPTO_LZO=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_CRYPTO_MANAGER=y
|
|
|
|
CONFIG_CRYPTO_MANAGER2=y
|
|
|
|
CONFIG_CRYPTO_NULL2=y
|
|
|
|
CONFIG_CRYPTO_RNG=y
|
|
|
|
CONFIG_CRYPTO_RNG2=y
|
|
|
|
CONFIG_CRYPTO_RNG_DEFAULT=y
|
|
|
|
CONFIG_CRYPTO_SHA256=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_CRYPTO_ZSTD=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_DCACHE_WORD_ACCESS=y
|
|
|
|
CONFIG_DEBUG_MISC=y
|
|
|
|
CONFIG_DEVTMPFS=y
|
|
|
|
CONFIG_DEVTMPFS_MOUNT=y
|
2020-09-04 10:31:17 +00:00
|
|
|
CONFIG_DIMLIB=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_DMADEVICES=y
|
|
|
|
CONFIG_DMATEST=y
|
|
|
|
CONFIG_DMA_DIRECT_REMAP=y
|
|
|
|
CONFIG_DMA_ENGINE=y
|
|
|
|
CONFIG_DMA_ENGINE_RAID=y
|
|
|
|
CONFIG_DMA_OF=y
|
|
|
|
CONFIG_DMA_REMAP=y
|
|
|
|
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
|
|
|
CONFIG_DTC=y
|
|
|
|
CONFIG_DYNAMIC_DEBUG=y
|
|
|
|
CONFIG_EDAC_SUPPORT=y
|
|
|
|
CONFIG_EINT_MTK=y
|
mediatek: rework support for BananaPi BPi-R64
**What's new**
* Bring support for the Bananapi BPi-R64 to the level desirable for
a nice hackable routerboard.
* Use ARM Trusted Firmware A from source. (goodbye binary preloader)
* Use Das U-Boot from source. (see previous commit)
* Assemble SD-card image using OpenWrt image-commands.
(no gen_sd_cruz_foo.sh added, this is not Raspbian)
* Updated kernel options to support root filesystem.
* Updated DTS to match OpenWrt LAN ports, known LEDs, buttons, ...
* Detect root device, handle sysupgrade, config restore, ...
* Wire up (known) LEDs and buttons in OpenWrt-fashion.
* Build one set of images from SD-card and eMMC.
* Hopefully provide a good example of how things can be done right
from scratch.
**Installation and images**
* Have an empty SD-card at hand
* Write stuff to the card, as root (card device is /dev/mmcblkX)
- write header, gpt, bl2, atf, u-boot and recovery kernel:
`cat *bpi-r64-boot-sdcard.img *bpi-r64-initramfs-recovery.fit > /dev/mmcblkX`
- rescan partitions:
`blockdev --rereadpt /dev/mmcblkX`
- write main system to production partition:
`cat *bpi-r64-squashfs-sysupgrade.fit > /dev/mmcblkXp5`
* Installation to eMMC works using SD-card bootloader via TFTP
When running OpenWrt of SD-card, issue this to trigger installation
to eMMC:
`fw_setenv bootcmd run emmc_init`
Be prepared to serve the content of bin/targets/mediatek/mt7622 on
TFTP server address 192.168.1.254.
**What's missing**
* The red LED is always on, probably a hardware bug.
* AHCI (probably needs DTS changes)
* Ship SD-card image ready with every needed for eMMC install.
* The eMMC has a second, currently unused boot partition. This would
be ideal to store the WiFi EEPROM and Ethernet MAC address(es).
@sinovoip ideas?
Thanks to Thomas Hühn @thuehn for providing the hardware!
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2021-02-27 14:17:09 +00:00
|
|
|
CONFIG_EXT4_FS=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_F2FS_FS=y
|
mediatek: add alternative UBI NAND layout for Linksys E8450
The vendor flash layout of the Linksys E8450 is problematic as it uses
the SPI-NAND chip without any wear-leveling while at the same time
wasting a lot of space for padding.
Use an all-UBI layout instead, storing the kernel+dtb+squashfs in
uImage.FIT standard format in UBI volume 'fit', the read-write
overlay in UBI volume 'rootfs_data' as well as reduntant U-Boot
environments 'ubootenv' and 'ubootenv2', and a 'recovery'
kernel+dtb+initramfs uImage.FIT for dual-boot.
** WARNING **
THIS PROCEDURE CAN EASILY BRICK YOUR DEVICE PERMANENTLY IF NOT CARRIED
OUT VERY CAREFULLY AND EXACTLY AS DESCRIBED!
Step 0
* Configure your PC to have the static IPv4 address 192.168.1.254/24
* Provide bin/targets/mediatek/mt7622 via TFTP
Now continue EITHER with step 1A or 1B, depending on your preference
(and on having serial console wired up or not).
Step 1A (Using the vendor web interface (or non-UBI OpenWrt install))
In order to update to the new bootloader and UBI-based firmware,
use the web browser of your choice to open the routers web-interface
accessible on http://192.168.1.1
* Navigate to
'Configuration' -> 'Administration' -> 'Firmware Upgrade'
* Upload the file
openwrt-mediatek-mt7622-linksys_e8450-ubi-initramfs-recovery.itb
and proceed with the upgrade.
* Once OpenWrt comes up, use SCP to upload the new bootloader files to
/tmp on the router:
*-mt7622-linksys_e8450-ubi-preloader.bin
*-mt7622-linksys_e8450-ubi-bl31-uboot.fip
* Connect via SSH as you will now need to replace the bootloader in
the Flash.
ssh root@192.168.1.1
(the usual warnings)
* First of all, backup all the flash now:
for mtd in /dev/mtdblock*; do
dd if=$mtd of=/tmp/$(basename $mtd);
done
* Then use SCP to copy /tmp/mtdblock* from the router and keep them
safe. You will need them should you ever want to return to the
factory firmware!
* Now flow the uploaded files:
mtd -e /dev/mtd0 write /tmp/*linksys_e8450-ubi-preloader.bin /dev/mtd0
mtd -e /dev/mtd1 write /tmp/*linksys_e8450-ubi-bl31-uboot.fip /dev/mtd1
If and only if both writes look like the completed successfully
reboot the router. Now continue with step 2.
Step 1B (Using the vendor bootloader serial console)
* Use the serial to backup all /dev/mtd* devices before using the
stock firmware (you got root shell when connected to serial).
* Then reboot and select 'U-Boot Console' in the boot menu.
* Copy the following lines, one by one:
tftpboot 0x40080000 openwrt-mediatek-mt7622-linksys_e8450-ubi-preloader.bin
tftpboot 0x40100000 openwrt-mediatek-mt7622-linksys_e8450-ubi-bl31-uboot.fip
nand erase 0x0 0x180000
nand write 0x40080000 0x0 0x180000
reset
Now continue with step 2
Step 2
Once the new bootchain comes up, the loader will initialize UBI and the
ubootenv volumes. It will then of course fail to find any bootable
volume and hence resort to load kernel via TFTP from server
192.168.1.254 while giving itself the address 192.168.1.1
The requested file is called
openwrt-mediatek-mt7622-linksys_e8450-ubi-initramfs-recovery.itb
and your TFTP server should provide exactly that :)
It will be written to UBI as recovery image and booted.
You can then continue and flash the production OS image, either
by using sysupgrade in the booted initramfs recovery OS, or by using
the bootloader menu and TFTP.
That's it. Go ahead and mess around with a bootchain built almost
completely from source (only DRAM calibration blobs are fitted in bl2,
and the irreplacable on-chip ROM loader remains, of course).
And enjoy U-Boot built with many great features out-of-the-box.
You can access the bootloader environment from within OpenWrt using the
'fw_printenv' and 'fw_setenv' commands. Don't be afraid, once you got
the new bootchain installed the device should be fairly unbrickable
(holding reset button before and during power-on resets things and
allows reflashing recovery image via TFTP)
Special thanks to @dvn0 (Devan Carpenter) for providing amazingly fast
infra for test-builds, allowing for `make clean ; make -j$(nproc)` in
less than two minutes :)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2021-02-09 23:07:42 +00:00
|
|
|
CONFIG_FIT_PARTITION=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_FIXED_PHY=y
|
|
|
|
CONFIG_FIX_EARLYCON_MEM=y
|
|
|
|
# CONFIG_FLATMEM_MANUAL is not set
|
|
|
|
CONFIG_FRAME_POINTER=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_FS_IOMAP=y
|
|
|
|
CONFIG_FS_MBCACHE=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_FW_LOADER_PAGED_BUF=y
|
|
|
|
CONFIG_GENERIC_ALLOCATOR=y
|
|
|
|
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
|
|
|
CONFIG_GENERIC_BUG=y
|
|
|
|
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
|
|
|
CONFIG_GENERIC_CLOCKEVENTS=y
|
|
|
|
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
|
|
|
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
|
|
|
CONFIG_GENERIC_CPU_VULNERABILITIES=y
|
|
|
|
CONFIG_GENERIC_CSUM=y
|
|
|
|
CONFIG_GENERIC_EARLY_IOREMAP=y
|
|
|
|
CONFIG_GENERIC_GETTIMEOFDAY=y
|
|
|
|
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
|
|
|
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
|
|
|
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
|
|
|
CONFIG_GENERIC_IRQ_SHOW=y
|
|
|
|
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
|
|
|
CONFIG_GENERIC_MSI_IRQ=y
|
|
|
|
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
|
|
|
CONFIG_GENERIC_PCI_IOMAP=y
|
|
|
|
CONFIG_GENERIC_PHY=y
|
|
|
|
CONFIG_GENERIC_PINCONF=y
|
|
|
|
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
|
|
|
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
|
|
|
CONFIG_GENERIC_SCHED_CLOCK=y
|
|
|
|
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
|
|
|
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
|
|
|
CONFIG_GENERIC_STRNLEN_USER=y
|
|
|
|
CONFIG_GENERIC_TIME_VSYSCALL=y
|
|
|
|
CONFIG_GLOB=y
|
|
|
|
CONFIG_GPIOLIB=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_GRO_CELLS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_HANDLE_DOMAIN_IRQ=y
|
|
|
|
CONFIG_HARDIRQS_SW_RESEND=y
|
|
|
|
CONFIG_HAS_DMA=y
|
|
|
|
CONFIG_HAS_IOMEM=y
|
|
|
|
CONFIG_HAS_IOPORT_MAP=y
|
|
|
|
CONFIG_HOLES_IN_ZONE=y
|
2021-07-12 23:11:57 +00:00
|
|
|
CONFIG_HW_RANDOM=y
|
|
|
|
CONFIG_HW_RANDOM_MTK=y
|
2021-04-16 10:30:43 +00:00
|
|
|
CONFIG_I2C=y
|
|
|
|
CONFIG_I2C_BOARDINFO=y
|
|
|
|
CONFIG_I2C_CHARDEV=y
|
|
|
|
CONFIG_I2C_MT65XX=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_ICPLUS_PHY=y
|
|
|
|
CONFIG_IIO=y
|
|
|
|
CONFIG_IKCONFIG=y
|
|
|
|
CONFIG_IKCONFIG_PROC=y
|
|
|
|
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
|
|
|
CONFIG_INITRAMFS_SOURCE=""
|
|
|
|
CONFIG_IO_URING=y
|
|
|
|
CONFIG_IRQCHIP=y
|
|
|
|
CONFIG_IRQ_DOMAIN=y
|
|
|
|
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
|
|
|
CONFIG_IRQ_FORCED_THREADING=y
|
|
|
|
CONFIG_IRQ_TIME_ACCOUNTING=y
|
|
|
|
CONFIG_IRQ_WORK=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_JBD2=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_JUMP_LABEL=y
|
2021-08-11 00:09:25 +00:00
|
|
|
# CONFIG_KEYBOARD_MTK_PMIC is not set
|
2021-04-16 10:30:43 +00:00
|
|
|
CONFIG_LEDS_UBNT_LEDBAR=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_LIBFDT=y
|
|
|
|
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
|
|
|
CONFIG_LOCK_SPIN_ON_OWNER=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_LZO_COMPRESS=y
|
|
|
|
CONFIG_LZO_DECOMPRESS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_MAGIC_SYSRQ=y
|
|
|
|
CONFIG_MDIO_BUS=y
|
|
|
|
CONFIG_MDIO_DEVICE=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_MDIO_DEVRES=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_MEDIATEK_MT6577_AUXADC=y
|
|
|
|
CONFIG_MEDIATEK_WATCHDOG=y
|
|
|
|
CONFIG_MEMFD_CREATE=y
|
|
|
|
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
|
|
|
|
CONFIG_MFD_SYSCON=y
|
|
|
|
CONFIG_MIGRATION=y
|
|
|
|
CONFIG_MMC=y
|
2021-02-24 19:10:35 +00:00
|
|
|
CONFIG_MMC_BLOCK=y
|
2020-10-24 19:15:20 +00:00
|
|
|
CONFIG_MMC_CQHCI=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_MMC_MTK=y
|
|
|
|
CONFIG_MODULES_TREE_LOOKUP=y
|
|
|
|
CONFIG_MODULES_USE_ELF_RELA=y
|
|
|
|
CONFIG_MTD_NAND_CORE=y
|
2020-10-24 19:15:20 +00:00
|
|
|
CONFIG_MTD_NAND_ECC=y
|
2020-03-27 14:34:33 +00:00
|
|
|
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
|
|
|
|
CONFIG_MTD_NAND_MTK=y
|
2020-04-09 07:53:24 +00:00
|
|
|
CONFIG_MTD_NAND_MTK_BMT=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_MTD_PARSER_TRX=y
|
2020-03-27 14:34:33 +00:00
|
|
|
CONFIG_MTD_RAW_NAND=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_MTD_SPI_NAND=y
|
|
|
|
CONFIG_MTD_SPI_NOR=y
|
2020-03-27 14:34:33 +00:00
|
|
|
CONFIG_MTD_SPLIT_FIRMWARE=y
|
|
|
|
CONFIG_MTD_SPLIT_FIT_FW=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_MTD_UBI=y
|
|
|
|
CONFIG_MTD_UBI_BEB_LIMIT=20
|
|
|
|
CONFIG_MTD_UBI_BLOCK=y
|
|
|
|
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
2020-02-10 08:33:15 +00:00
|
|
|
# CONFIG_MTK_CMDQ is not set
|
|
|
|
# CONFIG_MTK_CQDMA is not set
|
|
|
|
CONFIG_MTK_EFUSE=y
|
|
|
|
CONFIG_MTK_HSDMA=y
|
|
|
|
CONFIG_MTK_INFRACFG=y
|
|
|
|
CONFIG_MTK_PMIC_WRAP=y
|
|
|
|
CONFIG_MTK_SCPSYS=y
|
2021-05-25 13:26:09 +00:00
|
|
|
CONFIG_MTK_SPI_NAND=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_MTK_THERMAL=y
|
|
|
|
CONFIG_MTK_TIMER=y
|
|
|
|
# CONFIG_MTK_UART_APDMA is not set
|
|
|
|
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
|
|
|
CONFIG_NEED_DMA_MAP_STATE=y
|
|
|
|
CONFIG_NEED_SG_DMA_LENGTH=y
|
2020-06-04 13:07:28 +00:00
|
|
|
CONFIG_NET_DEVLINK=y
|
|
|
|
CONFIG_NET_DSA=y
|
|
|
|
CONFIG_NET_DSA_MT7530=y
|
|
|
|
CONFIG_NET_DSA_TAG_MTK=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_NET_FLOW_LIMIT=y
|
|
|
|
CONFIG_NET_MEDIATEK_SOC=y
|
2020-06-04 13:07:28 +00:00
|
|
|
CONFIG_NET_SWITCHDEV=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_NET_VENDOR_MEDIATEK=y
|
|
|
|
CONFIG_NLS=y
|
|
|
|
CONFIG_NO_HZ_COMMON=y
|
|
|
|
CONFIG_NO_HZ_IDLE=y
|
|
|
|
CONFIG_NR_CPUS=2
|
|
|
|
CONFIG_NVMEM=y
|
|
|
|
CONFIG_NVMEM_SYSFS=y
|
|
|
|
CONFIG_OF=y
|
|
|
|
CONFIG_OF_ADDRESS=y
|
2021-10-08 21:18:34 +00:00
|
|
|
CONFIG_OF_CONFIGFS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_OF_EARLY_FLATTREE=y
|
|
|
|
CONFIG_OF_FLATTREE=y
|
|
|
|
CONFIG_OF_GPIO=y
|
|
|
|
CONFIG_OF_IRQ=y
|
|
|
|
CONFIG_OF_KOBJ=y
|
|
|
|
CONFIG_OF_MDIO=y
|
|
|
|
CONFIG_OF_NET=y
|
2021-10-08 21:18:34 +00:00
|
|
|
CONFIG_OF_OVERLAY=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_OLD_SIGSUSPEND3=y
|
|
|
|
CONFIG_PADATA=y
|
|
|
|
CONFIG_PARTITION_PERCPU=y
|
|
|
|
CONFIG_PCI=y
|
2020-09-04 10:31:17 +00:00
|
|
|
CONFIG_PCIEAER=y
|
|
|
|
CONFIG_PCIEASPM=y
|
|
|
|
# CONFIG_PCIEASPM_DEFAULT is not set
|
|
|
|
CONFIG_PCIEASPM_PERFORMANCE=y
|
|
|
|
# CONFIG_PCIEASPM_POWERSAVE is not set
|
|
|
|
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
|
|
|
|
CONFIG_PCIEPORTBUS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_PCIE_MEDIATEK=y
|
2020-09-04 10:31:17 +00:00
|
|
|
CONFIG_PCIE_PME=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_PCI_DEBUG=y
|
|
|
|
CONFIG_PCI_DOMAINS=y
|
|
|
|
CONFIG_PCI_DOMAINS_GENERIC=y
|
|
|
|
CONFIG_PCI_MSI=y
|
|
|
|
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
2020-10-24 19:15:20 +00:00
|
|
|
CONFIG_PERF_EVENTS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_PGTABLE_LEVELS=3
|
|
|
|
CONFIG_PHYLIB=y
|
|
|
|
CONFIG_PHYLINK=y
|
|
|
|
CONFIG_PHYS_ADDR_T_64BIT=y
|
|
|
|
CONFIG_PHY_MTK_TPHY=y
|
|
|
|
# CONFIG_PHY_MTK_UFS is not set
|
|
|
|
# CONFIG_PHY_MTK_XSPHY is not set
|
|
|
|
CONFIG_PINCTRL=y
|
|
|
|
# CONFIG_PINCTRL_MT2712 is not set
|
|
|
|
# CONFIG_PINCTRL_MT6765 is not set
|
|
|
|
# CONFIG_PINCTRL_MT6797 is not set
|
|
|
|
CONFIG_PINCTRL_MT7622=y
|
|
|
|
# CONFIG_PINCTRL_MT8173 is not set
|
|
|
|
# CONFIG_PINCTRL_MT8183 is not set
|
|
|
|
CONFIG_PINCTRL_MT8516=y
|
|
|
|
CONFIG_PINCTRL_MTK=y
|
|
|
|
CONFIG_PINCTRL_MTK_MOORE=y
|
2020-10-24 19:15:20 +00:00
|
|
|
CONFIG_PINCTRL_MTK_V2=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_PM=y
|
|
|
|
CONFIG_PM_CLK=y
|
|
|
|
CONFIG_PM_GENERIC_DOMAINS=y
|
|
|
|
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
|
|
|
CONFIG_PM_OPP=y
|
|
|
|
CONFIG_POWER_RESET=y
|
|
|
|
CONFIG_POWER_RESET_SYSCON=y
|
|
|
|
CONFIG_POWER_SUPPLY=y
|
|
|
|
CONFIG_PRINTK_TIME=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_PSTORE=y
|
|
|
|
# CONFIG_PSTORE_842_COMPRESS is not set
|
|
|
|
# CONFIG_PSTORE_BLK is not set
|
|
|
|
CONFIG_PSTORE_COMPRESS=y
|
|
|
|
CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
|
|
|
|
CONFIG_PSTORE_CONSOLE=y
|
|
|
|
CONFIG_PSTORE_DEFLATE_COMPRESS=y
|
|
|
|
CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
|
|
|
|
# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
|
|
|
|
# CONFIG_PSTORE_LZ4_COMPRESS is not set
|
|
|
|
# CONFIG_PSTORE_LZO_COMPRESS is not set
|
|
|
|
CONFIG_PSTORE_PMSG=y
|
|
|
|
CONFIG_PSTORE_RAM=y
|
|
|
|
# CONFIG_PSTORE_ZSTD_COMPRESS is not set
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_PWM=y
|
|
|
|
CONFIG_PWM_MEDIATEK=y
|
|
|
|
# CONFIG_PWM_MTK_DISP is not set
|
|
|
|
CONFIG_PWM_SYSFS=y
|
|
|
|
CONFIG_QUEUED_RWLOCKS=y
|
|
|
|
CONFIG_QUEUED_SPINLOCKS=y
|
|
|
|
CONFIG_RAS=y
|
|
|
|
CONFIG_RATIONAL=y
|
|
|
|
# CONFIG_RAVE_SP_CORE is not set
|
|
|
|
CONFIG_REALTEK_PHY=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_REED_SOLOMON=y
|
|
|
|
CONFIG_REED_SOLOMON_DEC8=y
|
|
|
|
CONFIG_REED_SOLOMON_ENC8=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_REGMAP=y
|
|
|
|
CONFIG_REGMAP_MMIO=y
|
|
|
|
CONFIG_REGULATOR=y
|
|
|
|
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
|
|
|
CONFIG_REGULATOR_MT6380=y
|
|
|
|
CONFIG_RESET_CONTROLLER=y
|
|
|
|
CONFIG_RFS_ACCEL=y
|
|
|
|
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
|
|
|
|
CONFIG_RPS=y
|
|
|
|
CONFIG_RTC_CLASS=y
|
|
|
|
CONFIG_RTC_DRV_MT7622=y
|
|
|
|
CONFIG_RTC_I2C_AND_SPI=y
|
2020-04-03 15:42:44 +00:00
|
|
|
CONFIG_RTL8367S_GSW=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
|
|
|
CONFIG_SCSI=y
|
|
|
|
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
|
|
|
CONFIG_SERIAL_8250_FSL=y
|
|
|
|
CONFIG_SERIAL_8250_MT6577=y
|
|
|
|
CONFIG_SERIAL_8250_NR_UARTS=3
|
|
|
|
CONFIG_SERIAL_8250_RUNTIME_UARTS=3
|
|
|
|
CONFIG_SERIAL_DEV_BUS=y
|
|
|
|
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
|
|
|
|
CONFIG_SERIAL_MCTRL_GPIO=y
|
|
|
|
CONFIG_SERIAL_OF_PLATFORM=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_SGL_ALLOC=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_SG_POOL=y
|
|
|
|
CONFIG_SMP=y
|
2021-08-10 18:22:18 +00:00
|
|
|
# CONFIG_SND_SOC_MT6359 is not set
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_SPARSEMEM=y
|
|
|
|
CONFIG_SPARSEMEM_EXTREME=y
|
|
|
|
CONFIG_SPARSEMEM_MANUAL=y
|
|
|
|
CONFIG_SPARSEMEM_VMEMMAP=y
|
|
|
|
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
|
|
|
CONFIG_SPARSE_IRQ=y
|
|
|
|
CONFIG_SPI=y
|
|
|
|
CONFIG_SPI_MASTER=y
|
|
|
|
CONFIG_SPI_MEM=y
|
|
|
|
CONFIG_SPI_MT65XX=y
|
2021-03-01 11:56:23 +00:00
|
|
|
CONFIG_SPI_MTK_NOR=y
|
2020-03-27 14:34:33 +00:00
|
|
|
CONFIG_SPI_MTK_SNFI=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_SRCU=y
|
2020-04-03 15:42:44 +00:00
|
|
|
CONFIG_SWCONFIG=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_SWIOTLB=y
|
|
|
|
CONFIG_SWPHY=y
|
|
|
|
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
|
|
|
CONFIG_SYSVIPC_COMPAT=y
|
|
|
|
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
|
|
|
|
CONFIG_THERMAL=y
|
|
|
|
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
|
|
|
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
|
|
|
CONFIG_THERMAL_EMULATION=y
|
|
|
|
CONFIG_THERMAL_GOV_BANG_BANG=y
|
|
|
|
CONFIG_THERMAL_GOV_FAIR_SHARE=y
|
|
|
|
CONFIG_THERMAL_GOV_STEP_WISE=y
|
|
|
|
CONFIG_THERMAL_GOV_USER_SPACE=y
|
|
|
|
CONFIG_THERMAL_OF=y
|
|
|
|
CONFIG_THERMAL_WRITABLE_TRIPS=y
|
|
|
|
CONFIG_THREAD_INFO_IN_TASK=y
|
|
|
|
CONFIG_TICK_CPU_ACCOUNTING=y
|
|
|
|
CONFIG_TIMER_OF=y
|
|
|
|
CONFIG_TIMER_PROBE=y
|
|
|
|
CONFIG_TREE_RCU=y
|
|
|
|
CONFIG_TREE_SRCU=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_UBIFS_FS=y
|
2020-02-10 08:33:15 +00:00
|
|
|
# CONFIG_UCLAMP_TASK is not set
|
|
|
|
# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
|
|
|
|
CONFIG_USB=y
|
|
|
|
CONFIG_USB_COMMON=y
|
|
|
|
CONFIG_USB_SUPPORT=y
|
|
|
|
CONFIG_USB_XHCI_HCD=y
|
|
|
|
CONFIG_USB_XHCI_MTK=y
|
|
|
|
# CONFIG_USB_XHCI_PLATFORM is not set
|
|
|
|
CONFIG_VMAP_STACK=y
|
|
|
|
CONFIG_WATCHDOG_CORE=y
|
|
|
|
CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
|
|
|
|
CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
|
|
|
|
# CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP is not set
|
|
|
|
CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
|
|
|
|
CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
|
|
|
|
CONFIG_WATCHDOG_SYSFS=y
|
|
|
|
CONFIG_XPS=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_XXHASH=y
|
2020-07-16 07:16:34 +00:00
|
|
|
CONFIG_ZLIB_DEFLATE=y
|
|
|
|
CONFIG_ZLIB_INFLATE=y
|
2020-02-10 08:33:15 +00:00
|
|
|
CONFIG_ZONE_DMA32=y
|
2021-05-07 15:53:09 +00:00
|
|
|
CONFIG_ZSTD_COMPRESS=y
|
|
|
|
CONFIG_ZSTD_DECOMPRESS=y
|