2024-04-24 01:26:01 +00:00
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From e7a9cc3cc00b40e0bc2bae40bd2ece0e48fa51d5 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Apr 2024 10:15:22 +0300
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Subject: [PATCH 15/15] net: dsa: mt7530: explain exposing MDIO bus of MT7531AE
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better
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on MT7531AE.
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Therefore, the GPIO 11-12 pins are set to function as MDC and MDIO to
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expose the MDIO bus of the switch. Replace the comment with a better
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explanation.
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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---
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drivers/net/dsa/mt7530.c | 5 ++++-
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1 file changed, 4 insertions(+), 1 deletion(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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2024-04-27 12:05:30 +00:00
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@@ -2635,7 +2635,10 @@ mt7531_setup(struct dsa_switch *ds)
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2024-04-24 01:26:01 +00:00
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if (!priv->p5_sgmii) {
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mt7531_pll_setup(priv);
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} else {
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- /* Let ds->slave_mii_bus be able to access external phy. */
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+ /* Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on
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+ * MT7531AE. Set the GPIO 11-12 pins to function as MDC and MDIO
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+ * to expose the MDIO bus of the switch.
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+ */
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mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,
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MT7531_EXT_P_MDC_11);
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mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,
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