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193 lines
3.4 KiB
Plaintext
193 lines
3.4 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7628an.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "tplink,archer-mr200-v5", "mediatek,mt7628an-soc";
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model = "TP-Link Archer MR200 v5";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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label-mac-device = ðernet;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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leds {
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compatible = "gpio-leds";
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lan {
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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};
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wan {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
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};
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led_power: power {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
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};
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signal1 {
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label = "white:signal1";
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gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
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};
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signal2 {
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label = "white:signal2";
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gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
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};
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signal3 {
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label = "white:signal3";
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gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
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};
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wlan {
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function = LED_FUNCTION_WLAN;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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rfkill {
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label = "rfkill";
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gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <104000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@20000 {
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compatible = "tplink,firmware";
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label = "firmware";
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reg = <0x20000 0x7b0000>;
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};
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partition@7d0000 {
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label = "config";
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reg = <0x7d0000 0x10000>;
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read-only;
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};
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partition@7e0000 {
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label = "romfile";
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reg = <0x7e0000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_romfile_f100: macaddr@f100 {
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compatible = "mac-base";
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reg = <0xf100 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@7f0000 {
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label = "radio";
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reg = <0x7f0000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_radio_0: eeprom@0 {
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reg = <0x0 0x400>;
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};
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eeprom_radio_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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};
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};
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};
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "uart1", "wdt";
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function = "gpio";
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};
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};
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&wmac {
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nvmem-cells = <&eeprom_radio_0>, <&macaddr_romfile_f100 0>;
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nvmem-cell-names = "eeprom", "mac-address";
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status = "okay";
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};
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&esw {
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mediatek,portdisable = <0x30>;
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};
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ðernet {
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nvmem-cells = <&macaddr_romfile_f100 0>;
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nvmem-cell-names = "mac-address";
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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ieee80211-freq-limit = <5000000 6000000>;
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nvmem-cells = <&eeprom_radio_8000>, <&macaddr_romfile_f100 (-1)>;
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nvmem-cell-names = "eeprom", "mac-address";
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};
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};
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