mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 08:51:13 +00:00
46 lines
1.9 KiB
Diff
46 lines
1.9 KiB
Diff
|
From e41ad4213ce6742646c9dfed661289e69d5af5c1 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
|
||
|
|
Date: Fri, 2 Aug 2019 16:42:53 +0800
|
||
|
|
Subject: [PATCH] arm64: dts: ls1028a: Fix interrupt-map property of PCIe nodes
|
||
|
|
|
||
|
|
The current interrupt-map entries lost the 'parent unit address',
|
||
|
|
it will result in fail to allocate legacy INTx interrupts.
|
||
|
|
|
||
|
|
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
|
||
|
|
---
|
||
|
|
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 16 ++++++++--------
|
||
|
|
1 file changed, 8 insertions(+), 8 deletions(-)
|
||
|
|
|
||
|
|
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
|
||
|
|
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
|
||
|
|
@@ -695,10 +695,10 @@
|
||
|
|
msi-parent = <&its>;
|
||
|
|
#interrupt-cells = <1>;
|
||
|
|
interrupt-map-mask = <0 0 0 7>;
|
||
|
|
- interrupt-map = <0000 0 0 1 &gic GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
- <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
- <0000 0 0 3 &gic GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
- <0000 0 0 4 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
@@ -720,10 +720,10 @@
|
||
|
|
msi-parent = <&its>;
|
||
|
|
#interrupt-cells = <1>;
|
||
|
|
interrupt-map-mask = <0 0 0 7>;
|
||
|
|
- interrupt-map = <0000 0 0 1 &gic GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
- <0000 0 0 2 &gic GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
- <0000 0 0 3 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
- <0000 0 0 4 &gic GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|