openwrt/target/linux/realtek/patches-6.6/702-include-linux-add-phy-hsgmii-mode.patch

From 9d9bf16aa8d966834ac1280f96c37d22552c33d1 Mon Sep 17 00:00:00 2001
From: Birger Koblitz <git@birger-koblitz.de>
Date: Wed, 8 Sep 2021 16:13:18 +0200
Subject: realtek phy: Add PHY hsgmii mode

This adds RTL93xx-specific MAC configuration routines that allow also configuration
of 10GBit links for phylink. There is support for the Realtek-specific HSGMII
protocol.

Submitted-by: Birger Koblitz <git@birger-koblitz.de>
---
 drivers/net/phy/phy-core.c | 1 +
 drivers/net/phy/phylink.c  | 4 ++++
 include/linux/phy.h        | 3 +++
 3 files changed, 8 insertions(+)

--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -126,6 +126,7 @@ int phy_interface_num_ports(phy_interfac
 	case PHY_INTERFACE_MODE_MOCA:
 	case PHY_INTERFACE_MODE_TRGMII:
 	case PHY_INTERFACE_MODE_USXGMII:
+	case PHY_INTERFACE_MODE_HSGMII:
 	case PHY_INTERFACE_MODE_SGMII:
 	case PHY_INTERFACE_MODE_SMII:
 	case PHY_INTERFACE_MODE_1000BASEX:
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -124,6 +124,7 @@ do {									\
 static const phy_interface_t phylink_sfp_interface_preference[] = {
 	PHY_INTERFACE_MODE_25GBASER,
 	PHY_INTERFACE_MODE_USXGMII,
+	PHY_INTERFACE_MODE_HSGMII,
 	PHY_INTERFACE_MODE_10GBASER,
 	PHY_INTERFACE_MODE_5GBASER,
 	PHY_INTERFACE_MODE_2500BASEX,
@@ -238,6 +239,7 @@ static int phylink_interface_max_speed(p
 
 	case PHY_INTERFACE_MODE_XGMII:
 	case PHY_INTERFACE_MODE_RXAUI:
+	case PHY_INTERFACE_MODE_HSGMII:
 	case PHY_INTERFACE_MODE_XAUI:
 	case PHY_INTERFACE_MODE_10GBASER:
 	case PHY_INTERFACE_MODE_10GKR:
@@ -547,6 +549,7 @@ unsigned long phylink_get_capabilities(p
 		break;
 
 	case PHY_INTERFACE_MODE_XGMII:
+	case PHY_INTERFACE_MODE_HSGMII:
 	case PHY_INTERFACE_MODE_RXAUI:
 	case PHY_INTERFACE_MODE_XAUI:
 	case PHY_INTERFACE_MODE_10GBASER:
@@ -957,6 +960,7 @@ static int phylink_parse_mode(struct phy
 			fallthrough;
 		case PHY_INTERFACE_MODE_USXGMII:
 		case PHY_INTERFACE_MODE_10GKR:
+		case PHY_INTERFACE_MODE_HSGMII:
 		case PHY_INTERFACE_MODE_10GBASER:
 			phylink_set(pl->supported, 10baseT_Half);
 			phylink_set(pl->supported, 10baseT_Full);
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -148,6 +148,7 @@ typedef enum {
 	PHY_INTERFACE_MODE_XGMII,
 	PHY_INTERFACE_MODE_XLGMII,
 	PHY_INTERFACE_MODE_MOCA,
+	PHY_INTERFACE_MODE_HSGMII,
 	PHY_INTERFACE_MODE_PSGMII,
 	PHY_INTERFACE_MODE_QSGMII,
 	PHY_INTERFACE_MODE_TRGMII,
@@ -256,6 +257,8 @@ static inline const char *phy_modes(phy_
 		return "xlgmii";
 	case PHY_INTERFACE_MODE_MOCA:
 		return "moca";
+	case PHY_INTERFACE_MODE_HSGMII:
+		return "hsgmii";
 	case PHY_INTERFACE_MODE_PSGMII:
 		return "psgmii";
 	case PHY_INTERFACE_MODE_QSGMII: