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239 lines
4.1 KiB
Plaintext
239 lines
4.1 KiB
Plaintext
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "meig,slt866", "mediatek,mt7621-soc";
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model = "MeiG SLT866";
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aliases {
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led-boot = &led_internet;
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led-failsafe = &led_internet;
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led-upgrade = &led_internet;
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label-mac-device = &gmac1;
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};
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leds {
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compatible = "gpio-leds";
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signal4 {
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label = "blue:signal4";
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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};
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lanwan {
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label = "blue:lanwan";
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gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
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};
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led_internet: internet {
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label = "blue:internet";
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gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
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};
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wifi {
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label = "blue:wifi";
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gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0tpt";
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};
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signal3 {
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label = "blue:signal3";
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gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
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};
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signal2 {
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label = "blue:signal2";
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gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
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};
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signal1 {
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label = "blue:signal1";
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gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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regulator-pa-5g {
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compatible = "regulator-fixed";
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regulator-name = "pa-5g";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&state_default {
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gpio {
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groups = "jtag", "uart2", "uart3", "wdt";
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function = "gpio";
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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reg = <0>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Bootloader";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "Config";
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reg = <0x30000 0x10000>;
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};
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partition@40000 {
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label = "Factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x4da8>;
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};
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};
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};
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partition@50000 {
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label = "firmware";
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compatible = "denx,uimage";
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reg = <0x50000 0xf90000>;
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};
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partition@fe0000 {
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label = "m_custom";
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reg = <0xfe0000 0x20000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_custom_0: macaddr@0 {
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reg = <0x0 0xc>;
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compatible = "mac-base";
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#nvmem-cell-cells = <1>;
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};
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macaddr_custom_40: macaddr@40 {
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reg = <0x40 0xc>;
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compatible = "mac-base";
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#nvmem-cell-cells = <1>;
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};
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macaddr_custom_100: macaddr@100 {
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reg = <0x100 0xc>;
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compatible = "mac-base";
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#nvmem-cell-cells = <1>;
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};
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macaddr_custom_140: macaddr@140 {
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reg = <0x140 0xc>;
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compatible = "mac-base";
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@1000000 {
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label = "fota_bak";
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reg = <0x1000000 0x1000000>;
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read-only;
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};
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};
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_custom_40 0>;
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nvmem-cell-names = "mac-address";
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};
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&gmac1 {
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status = "okay";
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label = "wan";
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phy-handle = <ðphy4>;
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nvmem-cells = <&macaddr_custom_0 0>;
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nvmem-cell-names = "mac-address";
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};
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&mdio {
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ethphy4: ethernet-phy@4 {
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reg = <4>;
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};
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};
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&switch0 {
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ports {
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port@3 {
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status = "okay";
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label = "lan";
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_0>, <&macaddr_custom_100 0>;
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nvmem-cell-names = "eeprom", "mac-address";
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};
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};
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&pcie1 {
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mt76@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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ieee80211-freq-limit = <5000000 6000000>;
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nvmem-cells = <&eeprom_factory_8000>, <&macaddr_custom_140 0>;
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nvmem-cell-names = "eeprom", "mac-address";
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};
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};
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