openwrt/target/linux/layerscape/patches-5.4/302-dts-0049-sdk-dts-ls104x-move-dma-coherent-from-soc-to-its-chi.patch

From 6795bab4281aa9ed8e0ba3fbba06de8dd369b17c Mon Sep 17 00:00:00 2001
From: Ran Wang <ran.wang_1@nxp.com>
Date: Thu, 21 Feb 2019 13:32:59 +0800
Subject: [PATCH] sdk: dts: ls104x move dma-coherent from soc to its child
 nodes

Since SMMU is not supported for SDK version, USB function will down if
still apply property 'dma-coherent' in scope of soc (USB driver is not
ready to support it alone) in SDK device trees, decide to remove it.
And add dma-coherent on other non-USB child nodes under soc.

dma-coherent feature in dts node will cause issue that
QE-HDLC received too little, when a lot of data is transmitted while
just little data received, the Tx buffer will run out.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
 .../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts     | 184 ++++++++++++++++++++-
 .../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts     | 177 ++++++++++++++++++++
 .../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts  |   4 +
 .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts     | 175 ++++++++++++++++++++
 .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts     | 178 ++++++++++++++++++++
 .../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts  |   4 +
 6 files changed, 719 insertions(+), 3 deletions(-)

--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
@@ -62,19 +62,24 @@
 };
 
 &soc {
+/delete-property/ dma-coherent;
+
 #include "qoriq-dpaa-eth.dtsi"
 #include "qoriq-fman3-0-6oh.dtsi"
 
 pcie@3400000 {
-       /delete-property/ iommu-map;
+	/delete-property/ iommu-map;
+	dma-coherent;
 };
 
 pcie@3500000 {
-       /delete-property/ iommu-map;
+	/delete-property/ iommu-map;
+	dma-coherent;
 };
 
 pcie@3600000 {
-       /delete-property/ iommu-map;
+	/delete-property/ iommu-map;
+	dma-coherent;
 };
 
 /delete-node/ iommu@9000000;
@@ -82,4 +87,177 @@ pcie@3600000 {
 
 &fman0 {
 	compatible = "fsl,fman", "simple-bus";
+	dma-coherent;
+};
+
+&clockgen {
+	dma-coherent;
+};
+
+&scfg {
+	dma-coherent;
+};
+
+&crypto {
+	dma-coherent;
+};
+
+&dcfg {
+	dma-coherent;
+};
+
+&ifc {
+	dma-coherent;
+};
+
+&qspi {
+	dma-coherent;
+};
+
+&esdhc {
+	dma-coherent;
+};
+
+&ddr {
+	dma-coherent;
+};
+
+&tmu {
+	dma-coherent;
+};
+
+&qman {
+	dma-coherent;
+};
+
+&bman {
+	dma-coherent;
+};
+
+&bportals {
+	dma-coherent;
+};
+
+&qportals {
+	dma-coherent;
+};
+
+&dspi0 {
+	dma-coherent;
+};
+
+&dspi1 {
+	dma-coherent;
+};
+
+&i2c0 {
+	dma-coherent;
+};
+
+&i2c1 {
+	dma-coherent;
+};
+
+&i2c2 {
+	dma-coherent;
+};
+
+&i2c3 {
+	dma-coherent;
+};
+
+&duart0 {
+	dma-coherent;
+};
+
+&duart1 {
+	dma-coherent;
+};
+
+&duart2 {
+	dma-coherent;
+};
+
+&duart3 {
+	dma-coherent;
+};
+
+&gpio1 {
+	dma-coherent;
+};
+
+&gpio2 {
+	dma-coherent;
+};
+
+&gpio3 {
+	dma-coherent;
+};
+
+&gpio4 {
+	dma-coherent;
+};
+
+&uqe {
+	dma-coherent;
+};
+
+&lpuart0 {
+	dma-coherent;
+};
+
+&lpuart1 {
+	dma-coherent;
+};
+
+&lpuart2 {
+	dma-coherent;
+};
+
+&lpuart3 {
+	dma-coherent;
+};
+
+&lpuart4 {
+	dma-coherent;
+};
+
+&lpuart5 {
+	dma-coherent;
+};
+
+&ftm0 {
+	dma-coherent;
+};
+
+&wdog0 {
+	dma-coherent;
+};
+
+&edma0 {
+	dma-coherent;
+};
+
+&qdma {
+	dma-coherent;
+};
+
+&msi1 {
+	dma-coherent;
+};
+
+&msi2 {
+	dma-coherent;
+};
+
+&msi3 {
+	dma-coherent;
+};
+
+&ptp_timer0 {
+	dma-coherent;
+};
+
+&fsldpaa {
+	dma-coherent;
 };
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
@@ -62,19 +62,24 @@
 };
 
 &soc {
+/delete-property/ dma-coherent;
+
 #include "qoriq-dpaa-eth.dtsi"
 #include "qoriq-fman3-0-6oh.dtsi"
 
 pcie@3400000 {
 	/delete-property/ iommu-map;
+	dma-coherent;
 };
 
 pcie@3500000 {
 	/delete-property/ iommu-map;
+	dma-coherent;
 };
 
 pcie@3600000 {
 	/delete-property/ iommu-map;
+	dma-coherent;
 };
 
 /delete-node/ iommu@9000000;
@@ -83,3 +88,175 @@ pcie@3600000 {
 &fman0 {
 	compatible = "fsl,fman", "simple-bus";
 };
+
+&clockgen {
+	dma-coherent;
+};
+
+&scfg {
+	dma-coherent;
+};
+
+&crypto {
+	dma-coherent;
+};
+
+&dcfg {
+	dma-coherent;
+};
+
+&ifc {
+	dma-coherent;
+};
+
+&qspi {
+	dma-coherent;
+};
+
+&esdhc {
+	dma-coherent;
+};
+
+&ddr {
+	dma-coherent;
+};
+
+&tmu {
+	dma-coherent;
+};
+
+&qman {
+	dma-coherent;
+};
+
+&bman {
+	dma-coherent;
+};
+
+&bportals {
+	dma-coherent;
+};
+
+&qportals {
+	dma-coherent;
+};
+
+&dspi0 {
+	dma-coherent;
+};
+
+&dspi1 {
+	dma-coherent;
+};
+
+&i2c0 {
+	dma-coherent;
+};
+
+&i2c1 {
+	dma-coherent;
+};
+
+&i2c2 {
+	dma-coherent;
+};
+
+&i2c3 {
+	dma-coherent;
+};
+
+&duart0 {
+	dma-coherent;
+};
+
+&duart1 {
+	dma-coherent;
+};
+
+&duart2 {
+	dma-coherent;
+};
+
+&duart3 {
+	dma-coherent;
+};
+
+&gpio1 {
+	dma-coherent;
+};
+
+&gpio2 {
+	dma-coherent;
+};
+
+&gpio3 {
+	dma-coherent;
+};
+
+&gpio4 {
+	dma-coherent;
+};
+
+&lpuart0 {
+	dma-coherent;
+};
+
+&lpuart1 {
+	dma-coherent;
+};
+
+&lpuart2 {
+	dma-coherent;
+};
+
+&lpuart3 {
+	dma-coherent;
+};
+
+&lpuart4 {
+	dma-coherent;
+};
+
+&lpuart5 {
+	dma-coherent;
+};
+
+&ftm0 {
+	dma-coherent;
+};
+
+&wdog0 {
+	dma-coherent;
+};
+
+&edma0 {
+	dma-coherent;
+};
+
+&qdma {
+	dma-coherent;
+};
+
+&msi1 {
+	dma-coherent;
+};
+
+&msi2 {
+	dma-coherent;
+};
+
+&msi3 {
+	dma-coherent;
+};
+
+&fman0 {
+	dma-coherent;
+};
+
+&ptp_timer0 {
+	dma-coherent;
+};
+
+&fsldpaa {
+	dma-coherent;
+};
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
@@ -16,6 +16,7 @@
 		fsl,bpid = <7>;
 		fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
 		fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+		dma-coherent;
 	};
 
 	bp8: buffer-pool@8 {
@@ -23,6 +24,7 @@
 		fsl,bpid = <8>;
 		fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
 		fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+		dma-coherent;
 	};
 
 	bp9: buffer-pool@9 {
@@ -30,10 +32,12 @@
 		fsl,bpid = <9>;
 		fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
 		fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+		dma-coherent;
 	};
 
 	fsl,dpaa {
 		compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
+		dma-coherent;
 
 		ethernet@0 {
 			compatible = "fsl,dpa-ethernet-init";
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
@@ -62,6 +62,8 @@
 };
 
 &soc {
+/delete-property/ dma-coherent;
+
 #include "qoriq-dpaa-eth.dtsi"
 #include "qoriq-fman3-0-6oh.dtsi"
 
@@ -90,4 +92,177 @@ pcie@3600000 {
 
 &fman0 {
 	compatible = "fsl,fman", "simple-bus";
+	dma-coherent;
+};
+
+&clockgen {
+	dma-coherent;
+};
+
+&scfg {
+	dma-coherent;
+};
+
+&crypto {
+	dma-coherent;
+};
+
+&dcfg {
+	dma-coherent;
+};
+
+&ifc {
+	dma-coherent;
+};
+
+&qspi {
+	dma-coherent;
+};
+
+&esdhc {
+	dma-coherent;
+};
+
+&ddr {
+	dma-coherent;
+};
+
+&tmu {
+	dma-coherent;
+};
+
+&qman {
+	dma-coherent;
+};
+
+&bman {
+	dma-coherent;
+};
+
+&bportals {
+	dma-coherent;
+};
+
+&qportals {
+	dma-coherent;
+};
+
+&dspi {
+	dma-coherent;
+};
+
+&i2c0 {
+	dma-coherent;
+};
+
+&i2c1 {
+	dma-coherent;
+};
+
+&i2c2 {
+	dma-coherent;
+};
+
+&i2c3 {
+	dma-coherent;
+};
+
+&duart0 {
+	dma-coherent;
+};
+
+&duart1 {
+	dma-coherent;
+};
+
+&duart2 {
+	dma-coherent;
+};
+
+&duart3 {
+	dma-coherent;
+};
+
+&gpio0 {
+	dma-coherent;
+};
+
+&gpio1 {
+	dma-coherent;
+};
+
+&gpio2 {
+	dma-coherent;
+};
+
+&gpio3 {
+	dma-coherent;
+};
+
+&lpuart0 {
+	dma-coherent;
+};
+
+&lpuart1 {
+	dma-coherent;
+};
+
+&lpuart2 {
+	dma-coherent;
+};
+
+&lpuart3 {
+	dma-coherent;
+};
+
+&lpuart4 {
+	dma-coherent;
+};
+
+&lpuart5 {
+	dma-coherent;
+};
+
+&ftm0 {
+	dma-coherent;
+};
+
+&wdog0 {
+	dma-coherent;
+};
+
+&edma0 {
+	dma-coherent;
+};
+
+&sata {
+	dma-coherent;
+};
+
+&qdma {
+	dma-coherent;
+};
+
+&msi1 {
+	dma-coherent;
+};
+
+&msi2 {
+	dma-coherent;
+};
+
+&msi3 {
+	dma-coherent;
+};
+
+&ptp_timer0 {
+	dma-coherent;
+};
+
+&serdes1 {
+	dma-coherent;
+};
+
+&fsldpaa {
+	dma-coherent;
 };
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
@@ -62,6 +62,8 @@
 };
 
 &soc {
+/delete-property/ dma-coherent;
+
 #include "qoriq-dpaa-eth.dtsi"
 #include "qoriq-fman3-0-6oh.dtsi"
 
@@ -127,3 +129,179 @@ pcie@3600000 {
  *	phy-handle = <&pcsphy7>;
  *};
 */
+
+&clockgen {
+	dma-coherent;
+};
+
+&scfg {
+	dma-coherent;
+};
+
+&crypto {
+	dma-coherent;
+};
+
+&dcfg {
+	dma-coherent;
+};
+
+&ifc {
+	dma-coherent;
+};
+
+&qspi {
+	dma-coherent;
+};
+
+&esdhc {
+	dma-coherent;
+};
+
+&ddr {
+	dma-coherent;
+};
+
+&tmu {
+	dma-coherent;
+};
+
+&qman {
+	dma-coherent;
+};
+
+&bman {
+	dma-coherent;
+};
+
+&bportals {
+	dma-coherent;
+};
+
+&qportals {
+	dma-coherent;
+};
+
+&dspi {
+	dma-coherent;
+};
+
+&i2c0 {
+	dma-coherent;
+};
+
+&i2c1 {
+	dma-coherent;
+};
+
+&i2c2 {
+	dma-coherent;
+};
+
+&i2c3 {
+	dma-coherent;
+};
+
+&duart0 {
+	dma-coherent;
+};
+
+&duart1 {
+	dma-coherent;
+};
+
+&duart2 {
+	dma-coherent;
+};
+
+&duart3 {
+	dma-coherent;
+};
+
+&gpio0 {
+	dma-coherent;
+};
+
+&gpio1 {
+	dma-coherent;
+};
+
+&gpio2 {
+	dma-coherent;
+};
+
+&gpio3 {
+	dma-coherent;
+};
+
+&lpuart0 {
+	dma-coherent;
+};
+
+&lpuart1 {
+	dma-coherent;
+};
+
+&lpuart2 {
+	dma-coherent;
+};
+
+&lpuart3 {
+	dma-coherent;
+};
+
+&lpuart4 {
+	dma-coherent;
+};
+
+&lpuart5 {
+	dma-coherent;
+};
+
+&ftm0 {
+	dma-coherent;
+};
+
+&wdog0 {
+	dma-coherent;
+};
+
+&edma0 {
+	dma-coherent;
+};
+
+&sata {
+	dma-coherent;
+};
+
+&qdma {
+	dma-coherent;
+};
+
+&msi1 {
+	dma-coherent;
+};
+
+&msi2 {
+	dma-coherent;
+};
+
+&msi3 {
+	dma-coherent;
+};
+
+&fman0 {
+	dma-coherent;
+};
+
+&ptp_timer0 {
+	dma-coherent;
+};
+
+&serdes1 {
+	dma-coherent;
+};
+
+&fsldpaa {
+	dma-coherent;
+};
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
@@ -16,6 +16,7 @@
 		fsl,bpid = <7>;
 		fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
 		fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+		dma-coherent;
 	};
 
 	bp8: buffer-pool@8 {
@@ -23,6 +24,7 @@
 		fsl,bpid = <8>;
 		fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
 		fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+		dma-coherent;
 	};
 
 	bp9: buffer-pool@9 {
@@ -30,10 +32,12 @@
 		fsl,bpid = <9>;
 		fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
 		fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+		dma-coherent;
 	};
 
 	fsl,dpaa {
 		compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
+		dma-coherent;
 
 		ethernet@2 {
 			compatible = "fsl,dpa-ethernet-init";