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68 lines
2.1 KiB
Diff
68 lines
2.1 KiB
Diff
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From b1e679aba75e5e137c70bc76169c34835ef0e474 Mon Sep 17 00:00:00 2001
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From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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Date: Tue, 24 Jul 2018 13:11:03 +0300
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Subject: [PATCH] arm64: dts: ls104x: make dma-coherent global to the SoC
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These SoCs are really completely dma coherent in their entirety so add
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the dma-coherent property at the soc level in the device tree and drop
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the instances where it's specifically added to a few select devices.
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Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 +----
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arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
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2 files changed, 2 insertions(+), 4 deletions(-)
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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@@ -219,6 +219,7 @@
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#size-cells = <2>;
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ranges;
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dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
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+ dma-coherent;
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clockgen: clocking@1ee1000 {
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compatible = "fsl,ls1043a-clockgen";
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@@ -771,7 +772,6 @@
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reg-names = "ahci", "sata-ecc";
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interrupts = <0 69 0x4>;
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clocks = <&clockgen 4 0>;
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- dma-coherent;
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};
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msi1: msi-controller1@1571000 {
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@@ -806,7 +806,6 @@
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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- dma-coherent;
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iommu-map = <0 &smmu 0 1>; /* update by bootloader */
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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@@ -833,7 +832,6 @@
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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- dma-coherent;
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iommu-map = <0 &smmu 0 1>; /* update by bootloader */
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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@@ -860,7 +858,6 @@
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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- dma-coherent;
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iommu-map = <0 &smmu 0 1>; /* update by bootloader */
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
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@@ -191,6 +191,7 @@
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#size-cells = <2>;
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ranges;
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dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
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+ dma-coherent;
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ddr: memory-controller@1080000 {
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compatible = "fsl,qoriq-memory-controller";
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