2022-10-18 21:46:43 +00:00
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From 908c361b3c3a139eb3e6a798cb620a6da7514d5c Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Fri, 23 Sep 2022 19:05:39 +0200
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Subject: [PATCH 2/4] clk: qcom: clk-krait: generilize div functions
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Generilize div functions and remove hardcode to a divisor of 2.
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This is just a cleanup and permit to make it more clear the settings of
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the devisor when used by the krait-cc driver.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/clk/qcom/clk-krait.c | 57 ++++++++++++++++++++----------------
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drivers/clk/qcom/clk-krait.h | 11 ++++---
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drivers/clk/qcom/krait-cc.c | 7 +++--
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3 files changed, 42 insertions(+), 33 deletions(-)
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--- a/drivers/clk/qcom/clk-krait.c
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+++ b/drivers/clk/qcom/clk-krait.c
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2024-03-20 00:33:05 +00:00
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@@ -97,53 +97,57 @@ const struct clk_ops krait_mux_clk_ops =
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2022-10-18 21:46:43 +00:00
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EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
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/* The divider can divide by 2, 4, 6 and 8. But we only really need div-2. */
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2024-03-20 00:33:05 +00:00
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-static int krait_div2_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
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+static int krait_div_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
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2022-10-18 21:46:43 +00:00
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{
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2024-03-20 00:33:05 +00:00
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- req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), req->rate * 2);
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- req->rate = DIV_ROUND_UP(req->best_parent_rate, 2);
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2022-10-18 21:46:43 +00:00
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+ struct krait_div_clk *d = to_krait_div_clk(hw);
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+
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2024-03-20 00:33:05 +00:00
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+ req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
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+ req->rate * d->divisor);
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+ req->rate = DIV_ROUND_UP(req->best_parent_rate, d->divisor);
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return 0;
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2022-10-18 21:46:43 +00:00
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}
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-static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate,
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+static int krait_div_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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- struct krait_div2_clk *d = to_krait_div2_clk(hw);
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+ struct krait_div_clk *d = to_krait_div_clk(hw);
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+ u8 div_val = krait_div_to_val(d->divisor);
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unsigned long flags;
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- u32 val;
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- u32 mask = BIT(d->width) - 1;
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-
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- if (d->lpl)
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- mask = mask << (d->shift + LPL_SHIFT) | mask << d->shift;
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- else
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- mask <<= d->shift;
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+ u32 regval;
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spin_lock_irqsave(&krait_clock_reg_lock, flags);
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- val = krait_get_l2_indirect_reg(d->offset);
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- val &= ~mask;
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- krait_set_l2_indirect_reg(d->offset, val);
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+ regval = krait_get_l2_indirect_reg(d->offset);
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+
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+ regval &= ~(d->mask << d->shift);
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+ regval |= (div_val & d->mask) << d->shift;
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+
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+ if (d->lpl) {
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+ regval &= ~(d->mask << (d->shift + LPL_SHIFT));
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+ regval |= (div_val & d->mask) << (d->shift + LPL_SHIFT);
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+ }
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+
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+ krait_set_l2_indirect_reg(d->offset, regval);
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spin_unlock_irqrestore(&krait_clock_reg_lock, flags);
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return 0;
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}
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static unsigned long
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-krait_div2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
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+krait_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
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{
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- struct krait_div2_clk *d = to_krait_div2_clk(hw);
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- u32 mask = BIT(d->width) - 1;
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+ struct krait_div_clk *d = to_krait_div_clk(hw);
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u32 div;
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div = krait_get_l2_indirect_reg(d->offset);
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div >>= d->shift;
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- div &= mask;
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- div = (div + 1) * 2;
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+ div &= d->mask;
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- return DIV_ROUND_UP(parent_rate, div);
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+ return DIV_ROUND_UP(parent_rate, krait_val_to_div(div));
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}
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-const struct clk_ops krait_div2_clk_ops = {
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2024-03-20 00:33:05 +00:00
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- .determine_rate = krait_div2_determine_rate,
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2022-10-18 21:46:43 +00:00
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- .set_rate = krait_div2_set_rate,
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- .recalc_rate = krait_div2_recalc_rate,
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+const struct clk_ops krait_div_clk_ops = {
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2024-03-20 00:33:05 +00:00
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+ .determine_rate = krait_div_determine_rate,
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2022-10-18 21:46:43 +00:00
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+ .set_rate = krait_div_set_rate,
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+ .recalc_rate = krait_div_recalc_rate,
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};
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-EXPORT_SYMBOL_GPL(krait_div2_clk_ops);
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+EXPORT_SYMBOL_GPL(krait_div_clk_ops);
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--- a/drivers/clk/qcom/clk-krait.h
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+++ b/drivers/clk/qcom/clk-krait.h
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@@ -25,17 +25,20 @@ struct krait_mux_clk {
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extern const struct clk_ops krait_mux_clk_ops;
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-struct krait_div2_clk {
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+struct krait_div_clk {
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u32 offset;
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- u8 width;
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+ u32 mask;
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+ u8 divisor;
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u32 shift;
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bool lpl;
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struct clk_hw hw;
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};
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-#define to_krait_div2_clk(_hw) container_of(_hw, struct krait_div2_clk, hw)
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+#define to_krait_div_clk(_hw) container_of(_hw, struct krait_div_clk, hw)
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+#define krait_div_to_val(_div) ((_div) / 2) - 1
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+#define krait_val_to_div(_val) ((_val) + 1) * 2
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-extern const struct clk_ops krait_div2_clk_ops;
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+extern const struct clk_ops krait_div_clk_ops;
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#endif
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--- a/drivers/clk/qcom/krait-cc.c
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+++ b/drivers/clk/qcom/krait-cc.c
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@@ -86,11 +86,11 @@ static int krait_notifier_register(struc
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static struct clk_hw *
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krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
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{
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- struct krait_div2_clk *div;
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+ struct krait_div_clk *div;
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static struct clk_parent_data p_data[1];
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struct clk_init_data init = {
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.num_parents = ARRAY_SIZE(p_data),
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- .ops = &krait_div2_clk_ops,
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+ .ops = &krait_div_clk_ops,
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.flags = CLK_SET_RATE_PARENT,
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};
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struct clk_hw *clk;
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@@ -101,7 +101,8 @@ krait_add_div(struct device *dev, int id
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if (!div)
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return ERR_PTR(-ENOMEM);
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- div->width = 2;
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+ div->mask = 0x3;
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+ div->divisor = 2;
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div->shift = 6;
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div->lpl = id >= 0;
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div->offset = offset;
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