ipq806x: 6.6: rework kernel patches for new kernel

Rework kernel patches for new kernel. Mainly adaptation for patch
related to DTS and changes for the downstream div generalize patch that
now use determine_rate.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi 2024-03-20 01:33:05 +01:00
parent a705c8c681
commit a0cbf7f5d5
No known key found for this signature in database
GPG Key ID: AC001D09ADBFEAD7
8 changed files with 192 additions and 94 deletions

View File

@ -11,11 +11,11 @@ for the secondary mux.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++--
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++--
1 file changed, 32 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -301,6 +301,12 @@
};
@ -29,30 +29,7 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
cxo_board: cxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -575,15 +581,30 @@
clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
clock-names = "pll8_vote", "pxo";
clock-output-names = "acpu_l2_aux";
+ #clock-cells = <0>;
+ };
+
+ kraitcc: clock-controller {
+ compatible = "qcom,krait-cc-v1";
+ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>,
+ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>;
+ clock-names = "hfpll0", "hfpll1", "hfpll_l2",
+ "acpu0_aux", "acpu1_aux", "acpu_l2_aux",
+ "qsb", "pxo";
+ #clock-cells = <1>;
};
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu0_aux";
+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+ clock-names = "pll8_vote", "pxo";
+ #clock-cells = <0>;
@@ -575,7 +581,7 @@
};
saw0: regulator@2089000 {
@ -61,14 +38,7 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
regulator;
};
@@ -591,14 +612,24 @@
acc1: clock-controller@2098000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu1_aux";
+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+ clock-names = "pll8_vote", "pxo";
+ #clock-cells = <0>;
@@ -591,11 +612,27 @@
};
saw1: regulator@2099000 {
@ -84,6 +54,16 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
+ regulator;
+ };
+
nss_common: syscon@03000000 {
+ kraitcc: clock-controller {
+ compatible = "qcom,krait-cc-v1";
+ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>,
+ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>;
+ clock-names = "hfpll0", "hfpll1", "hfpll_l2",
+ "acpu0_aux", "acpu1_aux", "acpu_l2_aux",
+ "qsb", "pxo";
+ #clock-cells = <1>;
+ };
+
nss_common: syscon@3000000 {
compatible = "syscon";
reg = <0x03000000 0x0000FFFF>;

View File

@ -18,11 +18,11 @@ Opp-level is set based on the logic of
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -48,6 +48,105 @@
};
};
@ -129,8 +129,8 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
thermal-zones {
sensor0-thermal {
polling-delay-passive = <0>;
--- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi
@@ -6,3 +6,92 @@
model = "Qualcomm Technologies, Inc. IPQ8065";
compatible = "qcom,ipq8065", "qcom,ipq8064";
@ -224,8 +224,8 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
+ opp-level = <2>;
+ };
+};
--- a/arch/arm/boot/dts/qcom-ipq8062.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi
@@ -6,3 +6,39 @@
model = "Qualcomm Technologies, Inc. IPQ8062";
compatible = "qcom,ipq8062", "qcom,ipq8064";

View File

@ -10,11 +10,11 @@ definition for ipq8064 dtsi.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -30,6 +30,15 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
@ -31,7 +31,7 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
};
cpu1: cpu@1 {
@@ -40,11 +49,35 @@
@@ -40,12 +49,36 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
@ -59,6 +59,7 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
+ qcom,saw = <&saw_l2>;
+
+ clocks = <&kraitcc 4>;
@ -67,8 +68,8 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
};
};
--- a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8064.dtsi"
@ -88,8 +89,8 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
&rpm {
smb208_regulators: regulators {
compatible = "qcom,rpm-smb208-regulators";
--- a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8064-v2.0.dtsi"
@ -109,8 +110,8 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
&rpm {
smb208_regulators: regulators {
compatible = "qcom,rpm-smb208-regulators";
--- a/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8062.dtsi"
@ -130,8 +131,8 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
&rpm {
smb208_regulators: regulators {
compatible = "qcom,rpm-smb208-regulators";
--- a/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8065.dtsi"

View File

@ -7,11 +7,11 @@ Fix wrong nand_pings definition for bias-disable pins.
Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 7 ++-----
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -599,12 +599,9 @@
};

View File

@ -9,13 +9,13 @@ correctly use the new tag.
Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
---
arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++
arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 14 +++
2 files changed, 81 insertions(+), 67 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
@@ -25,73 +25,6 @@
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
@@ -25,131 +25,6 @@
device_type = "memory";
};
@ -32,8 +32,6 @@ Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
-
- switch0: switch@10 {
- compatible = "qca,qca8337";
- #address-cells = <1>;
- #size-cells = <0>;
-
- dsa,member = <0 0>;
-
@ -61,26 +59,86 @@ Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
- port@1 {
- reg = <1>;
- label = "sw1";
-
- leds {
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- default-state = "keep";
- };
- };
- };
-
- port@2 {
- reg = <2>;
- label = "sw2";
-
- leds {
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- default-state = "keep";
- };
- };
- };
-
- port@3 {
- reg = <3>;
- label = "sw3";
-
- leds {
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- default-state = "keep";
- };
- };
- };
-
- port@4 {
- reg = <4>;
- label = "sw4";
-
- leds {
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- default-state = "keep";
- };
- };
- };
-
- port@5 {
- reg = <5>;
- label = "sw5";
-
- leds {
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- default-state = "keep";
- };
- };
- };
- };
- };
@ -89,7 +147,7 @@ Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
mdio1: mdio-1 {
status = "okay";
compatible = "virtual,mdio-gpio";
@@ -222,6 +155,73 @@
@@ -222,6 +155,131 @@
status = "okay";
};
@ -106,8 +164,6 @@ Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
+
+ switch0: switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dsa,member = <0 0>;
+
@ -135,26 +191,86 @@ Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
+ port@1 {
+ reg = <1>;
+ label = "sw1";
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "sw2";
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "sw3";
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "sw4";
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "sw5";
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+ };
+ };
@ -163,10 +279,10 @@ Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
&gmac0 {
status = "okay";
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -476,6 +476,20 @@
snps,blen = <16 0 0 0 0 0 0>;
status = "disabled";
};
+ mdio0: mdio@37000000 {
@ -183,6 +299,6 @@ Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
+ status = "disabled";
+ };
+
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
gmac0: ethernet@37000000 {
device_type = "network";
compatible = "qcom,ipq806x-gmac", "snps,dwmac";

View File

@ -9,12 +9,12 @@ driver correctly probe.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 22 +++++++++++-----------
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -69,16 +69,6 @@
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -69,17 +69,6 @@
min-residency-us = <3000>;
};
};
@ -22,6 +22,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
- L2: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- qcom,saw = <&saw_l2>;
-
- clocks = <&kraitcc 4>;
@ -31,13 +32,14 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
};
opp_table_l2: opp_table_l2 {
@@ -1409,6 +1399,16 @@
@@ -1409,6 +1399,17 @@
#reset-cells = <1>;
};
+ L2: l2-cache {
+ compatible = "cache", "qcom,krait-cache";
+ cache-level = <2>;
+ cache-unified;
+ qcom,saw = <&saw_l2>;
+
+ clocks = <&kraitcc 4>;

View File

@ -8,11 +8,11 @@ fabric clk.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 19 +++++++++++++++++++
arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -170,6 +170,18 @@
};
};

View File

@ -16,22 +16,21 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
@@ -97,53 +97,58 @@ const struct clk_ops krait_mux_clk_ops =
@@ -97,53 +97,57 @@ const struct clk_ops krait_mux_clk_ops =
EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
/* The divider can divide by 2, 4, 6 and 8. But we only really need div-2. */
-static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
+static long krait_div_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
-static int krait_div2_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
+static int krait_div_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
{
- *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
- return DIV_ROUND_UP(*parent_rate, 2);
- req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), req->rate * 2);
- req->rate = DIV_ROUND_UP(req->best_parent_rate, 2);
+ struct krait_div_clk *d = to_krait_div_clk(hw);
+
+ *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
+ rate * d->divisor);
+
+ return DIV_ROUND_UP(*parent_rate, d->divisor);
+ req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
+ req->rate * d->divisor);
+ req->rate = DIV_ROUND_UP(req->best_parent_rate, d->divisor);
return 0;
}
-static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate,
@ -91,11 +90,11 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
}
-const struct clk_ops krait_div2_clk_ops = {
- .round_rate = krait_div2_round_rate,
- .determine_rate = krait_div2_determine_rate,
- .set_rate = krait_div2_set_rate,
- .recalc_rate = krait_div2_recalc_rate,
+const struct clk_ops krait_div_clk_ops = {
+ .round_rate = krait_div_round_rate,
+ .determine_rate = krait_div_determine_rate,
+ .set_rate = krait_div_set_rate,
+ .recalc_rate = krait_div_recalc_rate,
};