openwrt/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7628an.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "wiznet,wizfi630s", "mediatek,mt7628an-soc";
	model = "WIZnet WizFi630S";

	chosen {
		bootargs = "console=ttyS1,115200";
	};

	aliases {
		led-boot = &led_run;
		led-failsafe = &led_run;
		led-running = &led_run;
		led-upgrade = &led_run;
		serial0 = &uart1;
		serial1 = &uartlite;
	};

	leds {
		compatible = "gpio-leds";

		led_run: run {
			label = "green:run";
			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
		};

		ledwps {
			function = LED_FUNCTION_WPS;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
		};

		leduart1 {
			label = "green:uart1";
			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
		};

		leduart2 {
			label = "green:uart2";
			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};

		scm1 {
			label = "SCM1";
			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_1>;
			linux,input-type = <EV_SW>;
		};

		scm2 {
			label = "SCM2";
			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_2>;
			linux,input-type = <EV_SW>;
		};
	};
};

&state_default {
	gpio {
		groups = "gpio", "i2s", "i2c", "wdt", "refclk", "p1led_an", "p2led_an";
		function = "gpio";
	};
};

&spi0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;
		broken-flash-reset;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_factory_0: eeprom@0 {
						reg = <0x0 0x400>;
					};

					macaddr_factory_2e: macaddr@2e {
						reg = <0x2e 0x6>;
					};
				};
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0x1fb0000>;
			};
		};
	};
};

&uart1 {
	status = "okay";
};

&uart2 {
	status = "okay";
};

&pwm {
	status = "okay";
};

&ethernet {
	nvmem-cells = <&macaddr_factory_2e>;
	nvmem-cell-names = "mac-address";
};

&esw {
	mediatek,portmap = <0x3e>;
	mediatek,portdisable = <0x26>;
};

&sdhci {
	status = "okay";
	mediatek,cd-high;
};

&wmac {
	status = "okay";

	nvmem-cells = <&eeprom_factory_0>;
	nvmem-cell-names = "eeprom";
};