2023-05-22 21:13:08 +00:00
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From 7358d42dfbdfdb5d4f1d0d4c2e5c2bb4143a29b0 Mon Sep 17 00:00:00 2001
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:06 +0530
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Subject: [PATCH] remoteproc: qcom: Add secure PIL support
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IPQ8074 uses secure PIL. Hence, adding the support for the same.
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Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
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---
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drivers/remoteproc/qcom_q6v5_wcss.c | 43 +++++++++++++++++++++++++++--
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1 file changed, 40 insertions(+), 3 deletions(-)
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--- a/drivers/remoteproc/qcom_q6v5_wcss.c
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+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
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@@ -18,6 +18,7 @@
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <linux/soc/qcom/mdt_loader.h>
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2024-02-29 21:04:52 +00:00
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+#include <linux/firmware/qcom/qcom_scm.h>
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2023-05-22 21:13:08 +00:00
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#include "qcom_common.h"
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#include "qcom_pil_info.h"
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#include "qcom_q6v5.h"
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@@ -86,6 +87,9 @@
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#define TCSR_WCSS_CLK_ENABLE 0x14
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#define MAX_HALT_REG 3
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+
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+#define WCNSS_PAS_ID 6
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+
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enum {
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WCSS_IPQ8074,
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WCSS_QCS404,
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@@ -134,6 +138,7 @@ struct q6v5_wcss {
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unsigned int crash_reason_smem;
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u32 version;
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bool requires_force_stop;
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+ bool need_mem_protection;
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struct qcom_rproc_glink glink_subdev;
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struct qcom_rproc_ssr ssr_subdev;
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@@ -152,6 +157,7 @@ struct wcss_data {
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int ssctl_id;
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const struct rproc_ops *ops;
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bool requires_force_stop;
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+ bool need_mem_protection;
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};
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static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
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@@ -251,6 +257,15 @@ static int q6v5_wcss_start(struct rproc
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qcom_q6v5_prepare(&wcss->q6v5);
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+ if (wcss->need_mem_protection) {
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+ ret = qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID);
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+ if (ret) {
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+ dev_err(wcss->dev, "wcss_reset failed\n");
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+ return ret;
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+ }
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+ goto wait_for_reset;
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+ }
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+
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/* Release Q6 and WCSS reset */
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ret = reset_control_deassert(wcss->wcss_reset);
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if (ret) {
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@@ -285,6 +300,7 @@ static int q6v5_wcss_start(struct rproc
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if (ret)
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goto wcss_q6_reset;
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+wait_for_reset:
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ret = qcom_q6v5_wait_for_start(&wcss->q6v5, 5 * HZ);
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if (ret == -ETIMEDOUT)
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dev_err(wcss->dev, "start timed out\n");
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@@ -718,6 +734,15 @@ static int q6v5_wcss_stop(struct rproc *
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struct q6v5_wcss *wcss = rproc->priv;
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int ret;
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+ if (wcss->need_mem_protection) {
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+ ret = qcom_scm_pas_shutdown(WCNSS_PAS_ID);
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+ if (ret) {
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+ dev_err(wcss->dev, "not able to shutdown\n");
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+ return ret;
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+ }
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+ goto pas_done;
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+ }
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+
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/* WCSS powerdown */
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if (wcss->requires_force_stop) {
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ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
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@@ -742,6 +767,7 @@ static int q6v5_wcss_stop(struct rproc *
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return ret;
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}
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+pas_done:
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clk_disable_unprepare(wcss->prng_clk);
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qcom_q6v5_unprepare(&wcss->q6v5);
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@@ -765,9 +791,15 @@ static int q6v5_wcss_load(struct rproc *
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struct q6v5_wcss *wcss = rproc->priv;
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int ret;
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- ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware,
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- 0, wcss->mem_region, wcss->mem_phys,
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- wcss->mem_size, &wcss->mem_reloc);
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+ if (wcss->need_mem_protection)
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+ ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
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+ WCNSS_PAS_ID, wcss->mem_region,
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+ wcss->mem_phys, wcss->mem_size,
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+ &wcss->mem_reloc);
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+ else
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+ ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware,
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+ 0, wcss->mem_region, wcss->mem_phys,
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+ wcss->mem_size, &wcss->mem_reloc);
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if (ret)
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return ret;
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2024-03-22 10:08:54 +00:00
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@@ -1035,6 +1067,9 @@ static int q6v5_wcss_probe(struct platfo
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2023-05-22 21:13:08 +00:00
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if (!desc)
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return -EINVAL;
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+ if (desc->need_mem_protection && !qcom_scm_is_available())
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+ return -EPROBE_DEFER;
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+
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rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
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desc->firmware_name, sizeof(*wcss));
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if (!rproc) {
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2024-03-22 10:08:54 +00:00
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@@ -1048,6 +1083,7 @@ static int q6v5_wcss_probe(struct platfo
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2023-05-22 21:13:08 +00:00
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wcss->version = desc->version;
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wcss->requires_force_stop = desc->requires_force_stop;
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+ wcss->need_mem_protection = desc->need_mem_protection;
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ret = q6v5_wcss_init_mmio(wcss, pdev);
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if (ret)
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2024-03-22 10:08:54 +00:00
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@@ -1117,6 +1153,7 @@ static const struct wcss_data wcss_ipq80
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2023-05-22 21:13:08 +00:00
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.wcss_q6_reset_required = true,
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.ops = &q6v5_wcss_ipq8074_ops,
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.requires_force_stop = true,
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+ .need_mem_protection = true,
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};
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static const struct wcss_data wcss_qcs404_res_init = {
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