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40 lines
1.4 KiB
Diff
40 lines
1.4 KiB
Diff
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From 2a7fa96feddb63d36d64336a994dc4132e8a5cd4 Mon Sep 17 00:00:00 2001
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From: Shengjiu Wang <shengjiu.wang@freescale.com>
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Date: Mon, 29 Dec 2014 13:40:08 +0800
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Subject: [PATCH] MLK-9974: ASoC: fsl_sai: There is underrun detected in the
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beginning sometimes
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Write initial words to SAI FIFO to reduce underrun error
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Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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(cherry picked from commit 7ba8ae883d84540fac5ed4147d124399537bc0b3)
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(cherry picked from commit f4435f35aa2a97551d2c4a12ca316c354a880f85)
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---
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sound/soc/fsl/fsl_sai.c | 7 +++++++
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1 file changed, 7 insertions(+)
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--- a/sound/soc/fsl/fsl_sai.c
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+++ b/sound/soc/fsl/fsl_sai.c
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@@ -506,7 +506,9 @@ static int fsl_sai_trigger(struct snd_pc
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{
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struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
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bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
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+ u8 channels = substream->runtime->channels;
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u32 xcsr, count = 100;
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+ int i;
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/*
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* Asynchronous mode: Clear SYNC for both Tx and Rx.
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@@ -529,6 +531,11 @@ static int fsl_sai_trigger(struct snd_pc
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regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
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FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
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+ for (i = 0; tx && i < channels; i++)
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+ regmap_write(sai->regmap, FSL_SAI_TDR, 0x0);
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+ if (tx)
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+ udelay(10);
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+
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regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
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FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
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regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
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