2020-04-10 02:47:05 +00:00
|
|
|
From e0afa16cad94b26e13d673647b781dd336cb30bc Mon Sep 17 00:00:00 2001
|
|
|
|
|
From: Wen He <wen.he_1@nxp.com>
|
|
|
|
|
Date: Mon, 14 Oct 2019 14:25:42 +0800
|
|
|
|
|
Subject: [PATCH] arm64: dts: ls1028a: Add properties for HD Display controller
|
|
|
|
|
node
|
|
|
|
|
|
|
|
|
|
The HD Display controller includes DP TX CTRL and DPHY, their offers
|
|
|
|
|
multi-protocol support of standards such as DisplayPort and eDP, with
|
|
|
|
|
one of these standards supported at a time.
|
|
|
|
|
|
|
|
|
|
This patch enables the HD Display controller driver on the LS1028A.
|
|
|
|
|
|
|
|
|
|
Signed-off-by: Wen He <wen.he_1@nxp.com>
|
|
|
|
|
---
|
|
|
|
|
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 16 ++++++++++++++++
|
|
|
|
|
1 file changed, 16 insertions(+)
|
|
|
|
|
|
|
|
|
|
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
|
|
|
|
|
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
|
2021-10-22 20:09:16 +00:00
|
|
|
@@ -854,7 +854,23 @@
|
2020-04-10 02:47:05 +00:00
|
|
|
|
|
|
|
|
port {
|
|
|
|
|
dp0_out: endpoint {
|
|
|
|
|
+ remote-endpoint = <&dp1_out>;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
|
|
|
|
|
+ hdptx0: display@f200000 {
|
|
|
|
|
+ compatible = "cdn,ls1028a-dp";
|
|
|
|
|
+ reg = <0x0 0xf200000 0x0 0xfffff>;
|
|
|
|
|
+ interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
+ clocks = <&clockgen 2 2>, <&clockgen 2 2>, <&clockgen 2 2>,
|
|
|
|
|
+ <&clockgen 2 2>, <&clockgen 2 2>, <&dpclk>;
|
|
|
|
|
+ clock-names = "clk_core", "pclk", "sclk",
|
|
|
|
|
+ "cclk", "clk_vif", "clk_pxl";
|
|
|
|
|
+
|
|
|
|
|
+ port {
|
|
|
|
|
+ dp1_out: endpoint {
|
|
|
|
|
+ remote-endpoint = <&dp0_out>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
