mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 01:59:02 +00:00
51 lines
2.3 KiB
Diff
51 lines
2.3 KiB
Diff
|
From eab19e7bde679f56241db0c51f94f056fcffd6a9 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
|
||
|
|
Date: Wed, 4 Sep 2024 19:28:50 +0100
|
||
|
|
Subject: [PATCH 1252/1350] drivers: drm: rp1-vec: Increase width limit, for
|
||
|
|
PAL 16:9 @ 18MHz
|
||
|
|
|
||
|
|
There was no technical reason for the DRM mode's width limit of 848;
|
||
|
|
increase it to 960 (720*18MHz/13.5MHz) to support ~square pixels on
|
||
|
|
16:9 screens. Tweak the PAL active window to start slightly earlier.
|
||
|
|
(The maximum number of visible columns at 18MHz is about 942.)
|
||
|
|
|
||
|
|
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
|
||
|
|
---
|
||
|
|
drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c | 4 ++--
|
||
|
|
drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c | 4 ++--
|
||
|
|
2 files changed, 4 insertions(+), 4 deletions(-)
|
||
|
|
|
||
|
|
--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
|
||
|
|
+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
|
||
|
|
@@ -508,8 +508,8 @@ static int rp1vec_platform_probe(struct
|
||
|
|
|
||
|
|
vec->drm.mode_config.min_width = 256;
|
||
|
|
vec->drm.mode_config.min_height = 128;
|
||
|
|
- vec->drm.mode_config.max_width = 848; /* for System E */
|
||
|
|
- vec->drm.mode_config.max_height = 738; /* for System E */
|
||
|
|
+ vec->drm.mode_config.max_width = 960; /* for "widescreen" @ 18MHz */
|
||
|
|
+ vec->drm.mode_config.max_height = 738; /* for System E only */
|
||
|
|
vec->drm.mode_config.preferred_depth = 32;
|
||
|
|
vec->drm.mode_config.prefer_shadow = 0;
|
||
|
|
vec->drm.mode_config.quirk_addfb_prefer_host_byte_order = true;
|
||
|
|
--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
|
||
|
|
+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
|
||
|
|
@@ -195,7 +195,7 @@ static const struct rp1vec_hwmode rp1vec
|
||
|
|
.misc = 0x00091c01, /* 5-tap FIR, SEQ_EN, 8 fld sync, PAL */
|
||
|
|
.nco_freq = 0x0a8262b2cc48c1d1,
|
||
|
|
.timing_regs = {
|
||
|
|
- 0x046e0cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
|
||
|
|
+ 0x04660cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
|
||
|
|
0x026c0270, 0x00000004, 0x00050009, 0x00070135,
|
||
|
|
0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||
|
|
0x00170136, 0x00000000,
|
||
|
|
@@ -218,7 +218,7 @@ static const struct rp1vec_hwmode rp1vec
|
||
|
|
.misc = 0x0009dc03, /* 5-tap FIR, SEQ_EN, 4 flds, 8 fld sync, ilace, PAL */
|
||
|
|
.nco_freq = 0x0a8262b2cc48c1d1,
|
||
|
|
.timing_regs = {
|
||
|
|
- 0x046e0cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
|
||
|
|
+ 0x04660cee, 0x0d8001fb, 0x025c034f, 0x00fd0b84,
|
||
|
|
0x026c0270, 0x00000004, 0x00050009, 0x00070135,
|
||
|
|
0x013f026d, 0x00060136, 0x0140026e, 0x0150026e,
|
||
|
|
0x00180136, 0x026f0017,
|