openwrt/target/linux/layerscape/patches-5.4/806-dma-0007-MLK-15330-1-dma-fsl-edma-v3-combine-two-cells-into-o.patch

From bae75b5a56bc2c8768541b4b61edb28609486357 Mon Sep 17 00:00:00 2001
From: Robin Gong <yibin.gong@nxp.com>
Date: Tue, 4 Jul 2017 14:45:25 +0800
Subject: [PATCH] MLK-15330-1: dma: fsl-edma-v3: combine two cells into one

For dual fifo case, fsl-edma-v3 need add another cell. It's not friendly
for user and it's possible other cells maybe added to other use cases,
so combine two cells into one now, and for some special use cases such as
dual fifo property can directly be passed by one bit of cell3 rather than
another cell.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 3ecd1b3382e2c746728842fb2c084fbb030eb5de)
---
 Documentation/devicetree/bindings/dma/fsl-edma-v3.txt | 13 +++++++------
 drivers/dma/fsl-edma-v3.c                             |  9 ++++++---
 2 files changed, 13 insertions(+), 9 deletions(-)

--- a/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt
@@ -14,12 +14,13 @@ Required properties:
 - interrupts : A list of interrupt-specifiers, each channel has one interrupt.
 - interrupt-names : Should contain:
 	"edma-chan12-tx" - the channel12 transmission interrupt
-- #dma-cells : Must be <4>.
+- #dma-cells : Must be <3>.
 	The 1st cell specifies the channel ID.
 	The 2nd cell specifies the channel priority.
-	The 3rd cell specifies the channel type like for transmit or receive:
+	The 3rd cell specifies the channel attributes which include below:
+	BIT(0): transmit or receive:
 		0: transmit, 1: receive.
-	The 4th cell specifies the local access or remote access:
+	BIT(1): local or remote access:
 		0: local, 1: remote.
 	See the SoC's reference manual for all the supported request sources.
 - dma-channels : Number of channels supported by the controller
@@ -31,7 +32,7 @@ edma0: dma-controller@40018000 {
 	      <0x0 0x5a2d0000 0x0 0x10000>, /* channel13 UART0 tx */
 	      <0x0 0x5a2e0000 0x0 0x10000>, /* channel14 UART1 rx */
 	      <0x0 0x5a2f0000 0x0 0x10000>; /* channel15 UART1 tx */
-	#dma-cells = <4>;
+	#dma-cells = <3>;
 	dma-channels = <4>;
 	interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
 		     <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
@@ -60,7 +61,7 @@ lpuart1: serial@5a070000 {
 	assigned-clock-rates = <80000000>;
 	power-domains = <&pd_dma_lpuart1>;
 	dma-names = "tx","rx";
-	dmas = <&edma0 15 0 0 0>,
-		<&edma0 14 0 1 0>;
+	dmas = <&edma0 15 0 0>,
+		<&edma0 14 0 1>;
 	status = "disabled";
 };
--- a/drivers/dma/fsl-edma-v3.c
+++ b/drivers/dma/fsl-edma-v3.c
@@ -100,6 +100,9 @@
 				BIT(DMA_SLAVE_BUSWIDTH_8_BYTES) | \
 				BIT(DMA_SLAVE_BUSWIDTH_16_BYTES))
 
+#define ARGS_RX				BIT(0)
+#define ARGS_REMOTE			BIT(1)
+
 struct fsl_edma3_hw_tcd {
 	__le32	saddr;
 	__le16	soff;
@@ -696,7 +699,7 @@ static struct dma_chan *fsl_edma3_xlate(
 	struct dma_chan *chan, *_chan;
 	struct fsl_edma3_chan *fsl_chan;
 
-	if (dma_spec->args_count != 4)
+	if (dma_spec->args_count != 3)
 		return NULL;
 
 	mutex_lock(&fsl_edma3->fsl_edma3_mutex);
@@ -710,8 +713,8 @@ static struct dma_chan *fsl_edma3_xlate(
 			chan = dma_get_slave_channel(chan);
 			chan->device->privatecnt++;
 			fsl_chan->priority = dma_spec->args[1];
-			fsl_chan->is_rxchan = dma_spec->args[2];
-			fsl_chan->is_remote = dma_spec->args[3];
+			fsl_chan->is_rxchan = dma_spec->args[2] & ARGS_RX;
+			fsl_chan->is_remote = dma_spec->args[2] & ARGS_REMOTE;
 			mutex_unlock(&fsl_edma3->fsl_edma3_mutex);
 			return chan;
 		}