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https://github.com/open-sdr/openwifi.git
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69 lines
1.4 KiB
Plaintext
69 lines
1.4 KiB
Plaintext
# Generated with AD9361 Filter Design Wizard 16.1.3
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# MATLAB 9.10.0.1602886 (R2021a), 18-Nov-2021 11:34:55
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# Rx setting:
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# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
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# PLL Div 4x, PLL (MHz) 1280
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# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
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# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 15.6896, RF Bandwidth 22.4138
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# AD936x Decimation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
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# Tx setting:
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# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
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# PLL Div 4x, PLL (MHz) 1280
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# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
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# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 17.6508, RF Bandwidth 22.0636
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# AD936x Interpolation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
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TX 3 GAIN -6 INT 1
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RX 3 GAIN -6 DEC 1
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RTX 1280000000 320000000 160000000 80000000 40000000 40000000
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RRX 1280000000 320000000 160000000 80000000 40000000 40000000
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BWTX 25215414
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BWRX 25215513
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41,56
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31,70
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-187,-148
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-496,-500
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-395,-434
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183,169
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412,436
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-201,-208
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-619,-674
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148,137
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886,956
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-38,-14
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-1232,-1325
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-166,-214
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1680,1799
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513,598
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-2284,-2437
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-1107,-1255
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3197,3389
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2238,2507
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-4904,-5127
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-5068,-5623
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10562,10560
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28812,29674
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28812,29674
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10562,10560
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-5068,-5623
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-4904,-5127
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2238,2507
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3197,3389
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-1107,-1255
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-2284,-2437
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513,598
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1680,1799
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-166,-214
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-1232,-1325
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-38,-14
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886,956
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148,137
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-619,-674
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-201,-208
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412,436
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183,169
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-395,-434
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-496,-500
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-187,-148
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31,70
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41,56
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