47 Commits

Author	SHA1	Message	Date
Jiao Xianjun	db036a321c	Update csi.md	2020-10-08 22:50:59 +02:00
Jiao Xianjun	1f919d9f70	Update csi.md	2020-10-08 22:49:36 +02:00
Xianjun Jiao	a16f5b107a	update csi architecture picture	2020-10-08 22:45:55 +02:00
Xianjun Jiao	bbe9698424	update csi architecture picture	2020-10-08 22:28:01 +02:00
Xianjun Jiao	4a170e7054	update csi architecture picture	2020-10-08 22:26:38 +02:00
Jiao Xianjun	d37eefc6ff	Update csi.md	2020-10-08 21:09:10 +02:00
Jiao Xianjun	6dfa79bdf2	Update csi.md	2020-10-08 17:39:51 +02:00
Xianjun Jiao	22dd0cc486	the side channel (timestamp, frequency offset, CSI, equalizer) feature	2020-10-08 15:07:57 +02:00
Jiao Xianjun	bf6ebc2812	Update README.md	2020-09-06 20:27:11 +02:00
Xianjun Jiao	9c1c62f12d	add app note: Communication between two SDR boards under ad-hoc mode	2020-09-06 16:49:04 +02:00
Xianjun Jiao	1a95bb336f	add app note: Communication between two SDR boards under AP and client mode	2020-09-06 16:26:30 +02:00
Xianjun Jiao	9e514886fe	initial commit on application notes	2020-09-06 15:57:48 +02:00
Jiao Xianjun	e1d42e155b	Update README.md	2020-09-04 17:14:54 +02:00
Jiao Xianjun	e240bea2c8	Update README.md	2020-09-04 17:14:11 +02:00
Jiao Xianjun	95d09ab9f2	Update README.md	2020-08-18 10:31:44 +02:00
Jiao Xianjun	4160411d33	Update README.md	2020-08-18 10:31:01 +02:00
Jiao Xianjun	4ecf49bb3e	4 fpga queues and better driver/fpga flow control to avoid crash. improved slice cfg and printing (#23)	2020-06-12 11:11:47 +02:00
Jiao Xianjun	459c61501f	Update README.md	2020-05-21 14:16:10 +02:00
Xianjun Jiao	e63d1ec300	Jetmir: add tsf set command to sdrctl	2020-03-05 08:50:41 +01:00
Xianjun Jiao	b73660ad79	prepare for release	2020-03-04 19:39:12 +01:00
Jiao Xianjun	404ff4e063	Update README.md	2020-01-28 09:04:58 +01:00
Jiao Xianjun	5ea63bede1	Update README.md	2020-01-20 08:53:33 +01:00
Jiao Xianjun	4f2d13c77e	Update README.md	2020-01-19 22:42:49 +01:00
Jiao Xianjun	0168c125b2	Update README.md	2020-01-19 22:40:06 +01:00
Xianjun Jiao	bb70f8cf41	add two pictures for frequency and digital IF section	2020-01-19 22:36:48 +01:00
Jiao Xianjun	da2a8350be	Update README.md	2020-01-19 22:35:12 +01:00
Jiao Xianjun	88c09b72fd	Update README.md	2020-01-19 17:21:34 +01:00
Jiao Xianjun	9d96e69257	add more reminder of channel list change	2020-01-05 14:24:04 +01:00
Jiao Xianjun	0273d86243	change monitor mode description and add regulation and frequency config	2020-01-05 14:20:36 +01:00
Jiao Xianjun	365a7066be	Update README.md	2020-01-03 15:58:59 +01:00
Xianjun Jiao	517e5abeb0	update figures to more presise status	2019-12-24 23:35:44 +01:00
Xianjun Jiao	3fa79e43d4	update figures to more presise status	2019-12-24 23:21:02 +01:00
Jiao Xianjun	0669334ca5	Update README.md	2019-12-23 09:55:20 +01:00
Jiao Xianjun	7750643c45	Update README.md	2019-12-20 17:34:57 +01:00
Jiao Xianjun	1bbbbdc7f1	Update README.md	2019-12-20 17:31:07 +01:00
Jiao Xianjun	d288774fd4	Merge pull request #3 from weiliu1011/patch-4 ... Update README.md	2019-12-20 17:23:45 +01:00
weiliu1011	62591d266a	Update README.md	2019-12-20 11:25:22 +01:00
weiliu1011	6a6fa9b48f	minor fix	2019-12-20 10:50:59 +01:00
Xianjun Jiao	20101e8202	update the detailed architecture figure	2019-12-19 09:10:24 +01:00
Xianjun Jiao	03cffd2a57	update the detailed architecture figure	2019-12-19 09:07:28 +01:00
Xianjun Jiao	08d06a7637	update the detailed architecture figure	2019-12-19 08:47:29 +01:00
Jiao Xianjun	4f977aa976	Update README.md	2019-12-18 20:36:15 +01:00
Jiao Xianjun	c3d9cd01f2	Update README.md	2019-12-17 16:51:19 +01:00
Jiao Xianjun	2309afd47c	add debug section	2019-12-13 09:51:51 +01:00
Jiao Xianjun	10d539bee3	update document	2019-12-12 12:16:06 +01:00
Jiao Xianjun	5f436b3c82	update document	2019-12-12 10:10:10 +01:00
Xianjun Jiao	2ee6717882	initial commit	2019-12-10 14:03:47 +01:00