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Add sysfs to support xpu reg 6 bit27 26:
bit27 to disable eifs triggered by last rx fail bit26 to disable eifs triggered by last tx fail
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@ -990,10 +990,12 @@ static ssize_t csma_cfg0_show(struct device *input_dev, struct device_attribute
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reg_val = xpu_api->XPU_REG_FORCE_IDLE_MISC_read();
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priv->stat.csma_cfg0 = reg_val;
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return sprintf(buf, "nav_disable %d difs_disable %d eifs_disable %d cw_override %d cw override val %d wait_after_decode_top %d\n",
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return sprintf(buf, "nav_disable %d difs_disable %d eifs_disable %d eifs_by_rx_fail_disable %d eifs_by_tx_fail_disable %d cw_override %d cw override val %d wait_after_decode_top %d\n",
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(reg_val>>31)&1,
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(reg_val>>30)&1,
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(reg_val>>29)&1,
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(reg_val>>27)&1,
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(reg_val>>26)&1,
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(reg_val>>28)&1,
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(reg_val>>16)&0xf,
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(reg_val>>0)&0xff);
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