From aaceb807fda736b58157edf0f7166dcb0b2a8a47 Mon Sep 17 00:00:00 2001 From: Xianjun Jiao Date: Mon, 27 Feb 2023 19:56:32 +0100 Subject: [PATCH] Add sysfs to support xpu reg 6 bit27 26: bit27 to disable eifs triggered by last rx fail bit26 to disable eifs triggered by last tx fail --- driver/sysfs_intf.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver/sysfs_intf.c b/driver/sysfs_intf.c index fe4dab0..1434f4c 100644 --- a/driver/sysfs_intf.c +++ b/driver/sysfs_intf.c @@ -990,10 +990,12 @@ static ssize_t csma_cfg0_show(struct device *input_dev, struct device_attribute reg_val = xpu_api->XPU_REG_FORCE_IDLE_MISC_read(); priv->stat.csma_cfg0 = reg_val; - return sprintf(buf, "nav_disable %d difs_disable %d eifs_disable %d cw_override %d cw override val %d wait_after_decode_top %d\n", + return sprintf(buf, "nav_disable %d difs_disable %d eifs_disable %d eifs_by_rx_fail_disable %d eifs_by_tx_fail_disable %d cw_override %d cw override val %d wait_after_decode_top %d\n", (reg_val>>31)&1, (reg_val>>30)&1, (reg_val>>29)&1, + (reg_val>>27)&1, + (reg_val>>26)&1, (reg_val>>28)&1, (reg_val>>16)&0xf, (reg_val>>0)&0xff);