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faq
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Readme.rst
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Readme.rst
@ -34,3 +34,30 @@ License
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`Apache License 2.0 <https://www.apache.org/licenses/LICENSE-2.0>`_
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`Apache License 2.0 <https://www.apache.org/licenses/LICENSE-2.0>`_
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FAQs
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----
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**Q: Is there any need to change host driver UHD to incorporate new changes in
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FPGA?**
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A: No. In fact OpenOFDM relies on the current UHD-USRP communication mechanism.
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However, since the logic of the FPGA is changed in OpenOFDM, its behavior is
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also different. For instance, utilities such as ``rx_samples_to_file`` do not
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work as expected since the FPGA in OpenOFDM does not dumping RF signals back to
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host.
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**Q: Any example code to communicate with OFDM core in FPGA from host?**
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A: OpenOFDM FPGA module is configurable via USRP user setting registers
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(``set_user_reg`` function). The
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register address definition is in `common_params.v
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<https://github.com/jhshi/openofdm/blob/master/verilog/common_params.v>`_. The
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whole OpenOFM FPGA module takes 32 bit I/Q samples and outputs decoded bytes. It
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is supposed to be placed in the receive chain of the USRP (e.g.,
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``custom_dsp_rx.v``.
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**Q: Is there any change in ZPU firmware?**
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A: No.
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